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@@ -23,7 +23,6 @@ / {
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aliases {
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ethernet0 = &gmac0;
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- ethernet1 = &gmac1;
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gpio0 = &gpio0;
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gpio1 = &gpio1;
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gpio2 = &gpio2;
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@@ -93,7 +92,7 @@ cmamem: linux,cma {
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};
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};
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- thermal-zones {
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+ thermal_zones: thermal-zones {
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cpu-thermal-zone {
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polling-delay-passive = <250>;
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polling-delay = <2000>;
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@@ -166,8 +165,6 @@ c910_0: cpu@0 {
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<&clk CPU_PLL0_FOUTPOSTDIV>;
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clock-names = "c910_cclk", "c910_cclk_i0",
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"cpu_pll1_foutpostdiv", "cpu_pll0_foutpostdiv";
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- dvdd-supply = <&dvdd_cpu_reg>;
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- dvddm-supply = <&dvddm_cpu_reg>;
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cpu0_intc: interrupt-controller {
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#interrupt-cells = <1>;
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@@ -178,7 +175,7 @@ cpu0_intc: interrupt-controller {
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c910_1: cpu@1 {
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device_type = "cpu";
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reg = <1>;
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- status = "okay";
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+ status = "disabled";
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compatible = "riscv";
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riscv,isa = "rv64imafdcvsu";
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mmu-type = "riscv,sv39";
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@@ -212,8 +209,6 @@ c910_1: cpu@1 {
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<&clk CPU_PLL0_FOUTPOSTDIV>;
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clock-names = "c910_cclk", "c910_cclk_i0",
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"cpu_pll1_foutpostdiv", "cpu_pll0_foutpostdiv";
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- dvdd-supply = <&dvdd_cpu_reg>;
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- dvddm-supply = <&dvddm_cpu_reg>;
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cpu1_intc: interrupt-controller {
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#interrupt-cells = <1>;
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@@ -224,7 +219,7 @@ cpu1_intc: interrupt-controller {
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c910_2: cpu@2 {
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device_type = "cpu";
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reg = <2>;
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- status = "okay";
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+ status = "disabled";
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compatible = "riscv";
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riscv,isa = "rv64imafdcvsu";
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mmu-type = "riscv,sv39";
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@@ -258,8 +253,6 @@ c910_2: cpu@2 {
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<&clk CPU_PLL0_FOUTPOSTDIV>;
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clock-names = "c910_cclk", "c910_cclk_i0",
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"cpu_pll1_foutpostdiv", "cpu_pll0_foutpostdiv";
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- dvdd-supply = <&dvdd_cpu_reg>;
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- dvddm-supply = <&dvddm_cpu_reg>;
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cpu2_intc: interrupt-controller {
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#interrupt-cells = <1>;
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@@ -270,7 +263,7 @@ cpu2_intc: interrupt-controller {
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c910_3: cpu@3 {
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device_type = "cpu";
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reg = <3>;
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- status = "okay";
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+ status = "disabled";
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compatible = "riscv";
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riscv,isa = "rv64imafdcvsu";
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mmu-type = "riscv,sv39";
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@@ -304,8 +297,6 @@ c910_3: cpu@3 {
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<&clk CPU_PLL0_FOUTPOSTDIV>;
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clock-names = "c910_cclk", "c910_cclk_i0",
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"cpu_pll1_foutpostdiv", "cpu_pll0_foutpostdiv";
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- dvdd-supply = <&dvdd_cpu_reg>;
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- dvddm-supply = <&dvddm_cpu_reg>;
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cpu3_intc: interrupt-controller {
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#interrupt-cells = <1>;
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@@ -315,7 +306,7 @@ cpu3_intc: interrupt-controller {
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};
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};
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- display-subsystem {
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+ display_subsystem: display-subsystem {
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compatible = "verisilicon,display-subsystem";
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ports = <&dpu_disp0>, <&dpu_disp1>;
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status = "disabled";
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@@ -421,7 +412,7 @@ clocks {
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dummy_clock_apb: apb-clock@0 {
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compatible = "fixed-clock";
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reg = <0>; /* Not address, just for index */
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- clock-frequency = <62500000>;
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+ clock-frequency = <50000000>;
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clock-output-names = "dummy_clock_apb";
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#clock-cells = <0>;
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};
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@@ -469,7 +460,7 @@ dummy_clock_gpu: gpu-clock@6 {
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dummy_clock_dphy_ref: dphy-ref-clock@7 {
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compatible = "fixed-clock";
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reg = <7>; /* Not address, just for index */
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- clock-frequency = <24000000>;
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+ clock-frequency = <40000000>;
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clock-output-names = "dummy_clock_dphy_ref";
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#clock-cells = <0>;
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};
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@@ -477,7 +468,7 @@ dummy_clock_dphy_ref: dphy-ref-clock@7 {
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dummy_clock_dphy_cfg: dphy-cfg-clock@8 {
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compatible = "fixed-clock";
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reg = <8>; /* Not address, just for index */
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- clock-frequency = <24000000>;
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+ clock-frequency = <40000000>;
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clock-output-names = "dummy_clock_dphy_cfg";
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#clock-cells = <0>;
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};
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@@ -485,7 +476,7 @@ dummy_clock_dphy_cfg: dphy-cfg-clock@8 {
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dummy_clock_dpu_pixel0: dpu-pixel-clock@9 {
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compatible = "fixed-clock";
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reg = <9>;
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- clock-frequency = <72000000>;
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+ clock-frequency = <25200000>;
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clock-output-names = "dummy_clock_dpu_pixel0";
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#clock-cells = <0>;
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};
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@@ -493,7 +484,7 @@ dummy_clock_dpu_pixel0: dpu-pixel-clock@9 {
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dummy_clock_dpu_pixel1: dpu-pixel-clock@10 {
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compatible = "fixed-clock";
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reg = <10>;
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- clock-frequency = <74250000>;
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+ clock-frequency = <25200000>;
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clock-output-names = "dummy_clock_dpu_pixel1";
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#clock-cells = <0>;
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};
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@@ -525,7 +516,7 @@ rc_24m: clock-rc-24m@13 {
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dummy_clock_eip: eip-clock@14 {
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compatible = "fixed-clock";
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reg = <14>; /* Not address, just for index */
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- clock-frequency = <400000000>;
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+ clock-frequency = <30000000>;
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clock-output-names = "dummy_clock_eip";
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#clock-cells = <0>;
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};
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@@ -533,7 +524,7 @@ dummy_clock_eip: eip-clock@14 {
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dummy_clock_spi: spi-clock@15 {
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compatible = "fixed-clock";
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reg = <15>; /* Not address, just for index */
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- clock-frequency = <396000000>;
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+ clock-frequency = <50000000>;
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clock-output-names = "dummy_clock_spi";
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#clock-cells = <0>;
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};
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@@ -541,7 +532,7 @@ dummy_clock_spi: spi-clock@15 {
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dummy_clock_qspi: spi-clock@16 {
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compatible = "fixed-clock";
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reg = <15>; /* Not address, just for index */
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- clock-frequency = <792000000>;
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+ clock-frequency = <50000000>;
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clock-output-names = "dummy_clock_qspi";
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#clock-cells = <0>;
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};
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@@ -549,7 +540,7 @@ dummy_clock_qspi: spi-clock@16 {
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dummy_gmac_ahb: gmac-ahb-clock@16 {
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compatible = "fixed-clock";
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reg = <16>;
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- clock-frequency = <250000000>;
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+ clock-frequency = <50000000>;
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clock-output-names = "dummy_gmac_ahb";
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#clock-cells = <0>;
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};
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@@ -557,7 +548,7 @@ dummy_gmac_ahb: gmac-ahb-clock@16 {
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dummy_clock_gmac: gmac-clock@17 {
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compatible = "fixed-clock";
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reg = <17>;
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- clock-frequency = <500000000>;
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+ clock-frequency = <50000000>;
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clock-output-names = "dummy_clock_gmac";
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#clock-cells = <0>;
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};
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@@ -565,7 +556,7 @@ dummy_clock_gmac: gmac-clock@17 {
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dummy_clock_sdhci: sdhci-clock@18 {
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compatible = "fixed-clock";
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reg = <18>; /* Not address, just for index */
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- clock-frequency = <198000000>;
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+ clock-frequency = <50000000>;
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clock-output-names = "dummy_clock_sdhci";
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#clock-cells = <0>;
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};
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@@ -573,16 +564,16 @@ dummy_clock_sdhci: sdhci-clock@18 {
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dummy_clock_aonsys_clk: aonsys-clk-clock@19 {
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compatible = "fixed-clock";
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reg = <19>; /* Not address, just for index */
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- clock-frequency = <73728000>;
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+ clock-frequency = <24000000>;
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clock-output-names = "dummy_clock_aonsys_clk";
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#clock-cells = <0>;
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};
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- dummy_clock_uart_sclk: uart-sclk-clock@20 {
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+ dummy_clock_uart: uart-sclk-clock@20 {
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compatible = "fixed-clock";
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reg = <20>; /* Not address, just for index */
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- clock-frequency = <100000000>;
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- clock-output-names = "dummy_clock_uart_sclk";
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+ clock-frequency = <50000000>;
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+ clock-output-names = "dummy_clock_uart";
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#clock-cells = <0>;
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};
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@@ -592,6 +583,20 @@ dummy_clock_visys: visys-dummy-clock@21 {
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clock-frequency = <24000000>;
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#clock-cells = <0>;
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};
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+
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+ dummy_clock_vipre: vipre-dummy-clock@22 {
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+ compatible = "fixed-clock";
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+ reg = <22>;
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+ clock-frequency = <13000000>;
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+ #clock-cells = <0>;
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+ };
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+
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+ dummy_clock_vpsys: vpsys-dummy-clock@23 {
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+ compatible = "fixed-clock";
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+ reg = <23>;
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+ clock-frequency = <24000000>;
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+ #clock-cells = <0>;
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+ };
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};
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iso7816: iso7816-card@fff7f30000 {
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@@ -644,9 +649,6 @@ gmac0_mac_address: mac-address@176 {
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reg = <0xb0 6>;
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};
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- gmac1_mac_address: mac-address@184 {
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- reg = <0xb8 6>;
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- };
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};
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misc_sysreg: misc_sysreg@ffec02c000 {
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@@ -797,9 +799,8 @@ pwm: pwm@ffec01c000 {
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compatible = "thead,pwm-light";
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reg = <0xff 0xec01c000 0x0 0x4000>;
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#pwm-cells = <2>;
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- clocks = <&clk CLKGEN_PWM_PCLK>,
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- <&clk CLKGEN_PWM_CCLK>;
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- clock-names = "pclk", "cclk";
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+ clocks = <&dummy_clock_apb>;
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+ clock-names = "pwm";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm>;
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};
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@@ -809,7 +810,7 @@ timer0: timer@ffefc32000 {
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reg = <0xff 0xefc32000 0x0 0x14>;
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clocks = <&dummy_clock_apb>;
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clock-names = "timer";
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- clock-frequency = <62500000>;
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+ clock-frequency = <50000000>;
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interrupts = <16>;
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interrupt-parent = <&intc>;
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status = "okay";
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@@ -820,7 +821,7 @@ timer1: timer@ffefc32014 {
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reg = <0xff 0xefc32014 0x0 0x14>;
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clocks = <&dummy_clock_apb>;
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clock-names = "timer";
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- clock-frequency = <62500000>;
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+ clock-frequency = <50000000>;
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interrupts = <17>;
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interrupt-parent = <&intc>;
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status = "okay";
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@@ -831,7 +832,7 @@ timer2: timer@ffefc32028 {
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reg = <0xff 0xefc32028 0x0 0x14>;
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clocks = <&dummy_clock_apb>;
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clock-names = "timer";
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- clock-frequency = <62500000>;
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+ clock-frequency = <50000000>;
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interrupts = <18>;
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interrupt-parent = <&intc>;
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status = "disabled";
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@@ -842,7 +843,7 @@ timer3: timer@ffefc3203c {
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reg = <0xff 0xefc3203c 0x0 0x14>;
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clocks = <&dummy_clock_apb>;
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clock-names = "timer";
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- clock-frequency = <62500000>;
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+ clock-frequency = <50000000>;
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interrupts = <19>;
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interrupt-parent = <&intc>;
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status = "disabled";
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@@ -851,7 +852,7 @@ timer3: timer@ffefc3203c {
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padctrl_aosys: padctrl-aosys@fffff4a000 {
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compatible = "thead,light-fm-aon-pinctrl";
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reg = <0xff 0xfff4a000 0x0 0x2000>;
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- status = "okay";
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+ status = "disabled";
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};
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timer4: timer@ffffc33000 {
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@@ -859,7 +860,7 @@ timer4: timer@ffffc33000 {
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reg = <0xff 0xffc33000 0x0 0x14>;
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clocks = <&dummy_clock_apb>;
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clock-names = "timer";
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- clock-frequency = <62500000>;
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+ clock-frequency = <50000000>;
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interrupts = <20>;
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interrupt-parent = <&intc>;
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status = "disabled";
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@@ -870,7 +871,7 @@ timer5: timer@ffffc33014 {
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reg = <0xff 0xffc33014 0x0 0x14>;
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clocks = <&dummy_clock_apb>;
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clock-names = "timer";
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- clock-frequency = <62500000>;
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+ clock-frequency = <50000000>;
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interrupts = <21>;
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interrupt-parent = <&intc>;
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status = "disabled";
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@@ -881,7 +882,7 @@ timer6: timer@ffffc33028 {
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reg = <0xff 0xffc33028 0x0 0x14>;
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clocks = <&dummy_clock_apb>;
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clock-names = "timer";
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- clock-frequency = <62500000>;
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+ clock-frequency = <50000000>;
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interrupts = <22>;
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interrupt-parent = <&intc>;
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status = "disabled";
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@@ -892,7 +893,7 @@ timer7: timer@ffffc3303c {
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reg = <0xff 0xffc3303c 0x0 0x14>;
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clocks = <&dummy_clock_apb>;
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clock-names = "timer";
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- clock-frequency = <62500000>;
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+ clock-frequency = <50000000>;
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interrupts = <23>;
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interrupt-parent = <&intc>;
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status = "disabled";
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@@ -903,7 +904,7 @@ uart0: serial@ffe7014000 { /* Normal serial, for C910 log */
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reg = <0xff 0xe7014000 0x0 0x4000>;
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interrupt-parent = <&intc>;
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interrupts = <36>;
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- clocks = <&clk CLKGEN_UART0_SCLK>;
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+ clocks = <&dummy_clock_uart>;
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clock-names = "baudclk";
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reg-shift = <2>;
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reg-io-width = <4>;
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@@ -916,7 +917,7 @@ uart1: serial@ffe7f00000 { /* Normal serial, for C902 log */
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reg = <0xff 0xe7f00000 0x0 0x4000>;
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interrupt-parent = <&intc>;
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interrupts = <37>;
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- clocks = <&clk CLKGEN_UART1_SCLK>;
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+ clocks = <&dummy_clock_uart>;
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clock-names = "baudclk";
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reg-shift = <2>;
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reg-io-width = <4>;
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@@ -929,7 +930,7 @@ uart2: serial@ffec010000 { /* IRDA supported serial, not in 85P bit */
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reg = <0xff 0xec010000 0x0 0x4000>;
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interrupt-parent = <&intc>;
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interrupts = <38>;
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- clocks = <&clk CLKGEN_UART2_SCLK>;
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+ clocks = <&dummy_clock_uart>;
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clock-names = "baudclk";
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reg-shift = <2>;
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reg-io-width = <4>;
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@@ -942,7 +943,7 @@ uart3: serial@ffe7f04000 { /* IRDA supported serial, not in 85P bit */
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reg = <0xff 0xe7f04000 0x0 0x4000>;
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interrupt-parent = <&intc>;
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interrupts = <39>;
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- clocks = <&clk CLKGEN_UART3_SCLK>;
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+ clocks = <&dummy_clock_uart>;
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clock-names = "baudclk";
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reg-shift = <2>;
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reg-io-width = <4>;
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@@ -955,7 +956,7 @@ uart4: serial@fff7f08000 { /* High Speed with Flow Ctrol serial */
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reg = <0xff 0xf7f08000 0x0 0x4000>;
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interrupt-parent = <&intc>;
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interrupts = <40>;
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- clocks = <&clk CLKGEN_UART4_SCLK>;
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+ clocks = <&dummy_clock_uart>;
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clock-names = "baudclk";
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reg-shift = <2>;
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reg-io-width = <4>;
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@@ -968,7 +969,7 @@ uart5: serial@fff7f0c000 { /* Normal serial, for external SE, not in 85P bit */
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reg = <0xff 0xf7f0c000 0x0 0x4000>;
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interrupt-parent = <&intc>;
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interrupts = <41>;
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- clocks = <&clk CLKGEN_UART5_SCLK>;
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+ clocks = <&dummy_clock_uart>;
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clock-names = "baudclk";
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reg-shift = <2>;
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reg-io-width = <4>;
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@@ -1030,9 +1031,9 @@ g2d: gc620@ffecc80000 {
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interrupt-parent = <&intc>;
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interrupts = <101>;
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interrupt-names = "irq_2d";
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- clocks = <&vpsys_clk_gate LIGHT_VPSYS_G2D_PCLK>,
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- <&vpsys_clk_gate LIGHT_VPSYS_G2D_ACLK>,
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- <&vpsys_clk_gate LIGHT_VPSYS_G2D_CCLK>;
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+ clocks = <&dummy_clock_vpsys>,
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+ <&dummy_clock_vpsys>,
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+ <&dummy_clock_vpsys>;
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clock-names = "pclk", "aclk", "cclk";
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status = "okay";
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};
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@@ -1046,11 +1047,11 @@ dphy_0: dsi0-dphy {
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compatible = "thead,light-mipi-dphy";
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regmap = <&dsi0>;
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vosys-regmap = <&vosys_reg>;
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- clocks = <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI0_REFCLK>,
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- <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI0_CFG_CLK>,
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- <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI0_PCLK>,
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- <&clk OSC_24M>,
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- <&clk OSC_24M>;
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+ clocks = <&dummy_clock_dphy_ref>,
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+ <&dummy_clock_dphy_cfg>,
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+ <&dummy_clock_dphy_ref>,
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+ <&dummy_clock_dpu_pixel0>,
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+ <&dummy_clock_dphy_cfg>;
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clock-names = "refclk", "cfgclk", "pclk", "prefclk", "pcfgclk";
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#phy-cells = <0>;
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};
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@@ -1060,8 +1061,8 @@ dhost_0: dsi0-host {
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regmap = <&dsi0>;
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interrupt-parent = <&intc>;
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interrupts = <129>;
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- clocks = <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI0_PCLK>,
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- <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI0_PIXCLK>;
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+ clocks = <&dummy_clock_dphy_cfg>,
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+ <&dummy_clock_dpu_pixel0>;
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clock-names = "pclk", "pixclk";
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phys = <&dphy_0>;
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phy-names = "dphy";
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@@ -1079,11 +1080,11 @@ dphy_1: dsi1-dphy {
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compatible = "thead,light-mipi-dphy";
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regmap = <&dsi1>;
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vosys-regmap = <&vosys_reg>;
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- clocks = <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI1_REFCLK>,
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- <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI1_CFG_CLK>,
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- <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI1_PCLK>,
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- <&clk OSC_24M>,
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- <&clk OSC_24M>;
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+ clocks = <&dummy_clock_dphy_ref>,
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+ <&dummy_clock_dphy_cfg>,
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+ <&dummy_clock_dphy_ref>,
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+ <&dummy_clock_dpu_pixel1>,
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+ <&dummy_clock_dphy_cfg>;
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clock-names = "refclk", "cfgclk", "pclk", "prefclk", "pcfgclk";
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#phy-cells = <0>;
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};
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@@ -1093,8 +1094,8 @@ dhost_1: dsi1-host {
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regmap = <&dsi1>;
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interrupt-parent = <&intc>;
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interrupts = <129>;
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- clocks = <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI1_PCLK>,
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- <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI1_PIXCLK>;
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+ clocks = <&dummy_clock_dphy_cfg>,
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+ <&dummy_clock_dpu_pixel1>;
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clock-names = "pclk", "pixclk";
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phys = <&dphy_1>;
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phy-names = "dphy";
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@@ -1114,11 +1115,11 @@ hdmi_tx: dw-hdmi-tx@ffef540000 {
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reg = <0xff 0xef540000 0x0 0x40000>;
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interrupt-parent = <&intc>;
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interrupts = <111>;
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- clocks = <&vosys_clk_gate LIGHT_CLKGEN_HDMI_PCLK>,
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- <&vosys_clk_gate LIGHT_CLKGEN_HDMI_SFR_CLK>,
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- <&vosys_clk_gate LIGHT_CLKGEN_HDMI_CEC_CLK>,
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- <&vosys_clk_gate LIGHT_CLKGEN_HDMI_PIXCLK>,
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- <&vosys_clk_gate LIGHT_CLKGEN_HDMI_I2S_CLK>;
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+ clocks = <&dummy_clock_dpu_pixel0>,
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+ <&dummy_clock_dpu_pixel0>,
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+ <&dummy_clock_dpu_pixel0>,
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+ <&dummy_clock_dpu_pixel0>,
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+ <&dummy_clock_dpu_pixel0>;
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clock-names = "iahb", "isfr", "cec", "pixclk", "i2s";
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reg-io-width = <4>;
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phy_version = <301>;
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@@ -1135,19 +1136,19 @@ dpu: dc8200@ffef600000 {
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<0xff 0xef630010 0x0 0x60>;
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interrupt-parent = <&intc>;
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interrupts = <93>;
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- clocks = <&vosys_clk_gate LIGHT_CLKGEN_DPU_CCLK>,
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- <&vosys_clk_gate LIGHT_CLKGEN_DPU_PIXCLK0>,
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- <&vosys_clk_gate LIGHT_CLKGEN_DPU_PIXCLK1>,
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- <&vosys_clk_gate LIGHT_CLKGEN_DPU_ACLK>,
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- <&vosys_clk_gate LIGHT_CLKGEN_DPU_HCLK>,
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- <&clk DPU0_PLL_DIV_CLK>,
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- <&clk DPU1_PLL_DIV_CLK>,
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- <&clk DPU0_PLL_FOUTPOSTDIV>,
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- <&clk DPU1_PLL_FOUTPOSTDIV>;
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+ clocks = <&dummy_clock_dpu_pixel0>,
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+ <&dummy_clock_dpu_pixel0>,
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+ <&dummy_clock_dpu_pixel0>,
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+ <&dummy_clock_dpu_pixel0>,
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+ <&dummy_clock_dpu_pixel0>,
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+ <&dummy_clock_dpu_pixel0>,
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+ <&dummy_clock_dpu_pixel0>,
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+ <&dummy_clock_dpu_pixel0>,
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+ <&dummy_clock_dpu_pixel0>;
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clock-names = "core_clk", "pix_clk0", "pix_clk1",
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- "axi_clk", "cfg_clk", "pixclk0",
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- "pixclk1", "dpu0_pll_foutpostdiv",
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- "dpu1_pll_foutpostdiv";
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+ "axi_clk", "cfg_clk", "pixclk0",
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+ "pixclk1", "dpu0_pll_foutpostdiv",
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+ "dpu1_pll_foutpostdiv";
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status = "disabled";
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dpu_disp0: port@0 {
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@@ -1172,7 +1173,7 @@ watchdog0: watchdog@ffefc30000 {
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reg = <0xff 0xefc30000 0x0 0x1000>;
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interrupt-parent = <&intc>;
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interrupts = <24>;
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- clocks = <&clk CLKGEN_WDT0_PCLK>;
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+ clocks = <&dummy_clock_apb>;
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clock-names = "tclk";
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resets = <&rst LIGHT_RESET_WDT0>;
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status = "okay";
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@@ -1183,7 +1184,7 @@ watchdog1: watchdog@ffefc31000 {
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reg = <0xff 0xefc31000 0x0 0x1000>;
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interrupt-parent = <&intc>;
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interrupts = <25>;
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- clocks = <&clk CLKGEN_WDT1_PCLK>;
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+ clocks = <&dummy_clock_apb>;
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clock-names = "tclk";
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resets = <&rst LIGHT_RESET_WDT1>;
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status = "okay";
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@@ -1221,7 +1222,7 @@ usb: dwc3@ffe7040000 {
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dma-mask = <0xf 0xffffffff>;
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snps,usb3_lpm_capable;
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snps,usb_sofitpsync;
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- status = "okay";
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+ status = "disabled";
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};
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};
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@@ -1323,7 +1324,7 @@ gmac0: ethernet@ffe7070000 {
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interrupt-parent = <&intc>;
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interrupts = <66>;
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interrupt-names = "macirq";
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- clocks = <&clk CLKGEN_GMAC0_CCLK>;
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+ clocks = <&dummy_clock_gmac>;
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clock-names = "gmac_pll_clk";
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snps,pbl = <32>;
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snps,fixed-burst;
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@@ -1332,25 +1333,6 @@ gmac0: ethernet@ffe7070000 {
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nvmem-cell-names = "mac-address";
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};
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- gmac1: ethernet@ffe7060000 {
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- compatible = "thead,light-dwmac";
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- reg = <0xff 0xe7060000 0x0 0x2000
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- 0xff 0xec00401c 0x0 0x4
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- 0xff 0xec004020 0x0 0x4
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- 0xff 0xec004000 0x0 0x1c>;
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- reg-names = "gmac", "phy_if_reg", "txclk_dir_reg", "clk_mgr_reg";
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- interrupt-parent = <&intc>;
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- interrupts = <67>;
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- interrupt-names = "macirq";
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- clocks = <&clk CLKGEN_GMAC1_CCLK>;
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- clock-names = "gmac_pll_clk";
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- snps,pbl = <32>;
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- snps,fixed-burst;
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- snps,axi-config = <&stmmac_axi_setup>;
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- nvmem-cells = <&gmac1_mac_address>;
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- nvmem-cell-names = "mac-address";
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- };
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-
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emmc: sdhci@ffe7080000 {
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compatible = "snps,dwcmshc-sdhci";
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reg = <0xff 0xe7080000 0x0 0x10000
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@@ -1397,11 +1379,11 @@ gpu: gpu@ffef400000 {
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interrupts = <102>;
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interrupt-names = "gpuirq";
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vosys-regmap = <&vosys_reg>;
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- power-domains = <&pd LIGHT_AON_GPU_PD>;
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- clocks = <&vosys_clk_gate LIGHT_CLKGEN_GPU_CORE_CLK>,
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- <&vosys_clk_gate LIGHT_CLKGEN_GPU_CFG_ACLK>;
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- clock-names = "cclk", "aclk";
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- gpu_clk_rate = <18000000>;
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+ //power-domains = <&pd LIGHT_AON_GPU_PD>;
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+ clocks = <&dummy_clock_gpu>,
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+ <&dummy_clock_gpu>;
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+ clock-names = "cclk", "aclk";
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+ gpu_clk_rate = <18000000>;
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dma-mask = <0xf 0xffffffff>;
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status = "disabled";
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};
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@@ -1411,10 +1393,10 @@ vdec: vdec@ffecc00000 {
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reg = <0xff 0xecc00000 0x0 0x8000>;
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interrupt-parent = <&intc>;
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interrupts = <131>;
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- power-domains = <&pd LIGHT_AON_VDEC_PD>;
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- clocks = <&vpsys_clk_gate LIGHT_VPSYS_VDEC_ACLK>,
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- <&vpsys_clk_gate LIGHT_VPSYS_VDEC_CCLK>,
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- <&vpsys_clk_gate LIGHT_VPSYS_VDEC_PCLK>;
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+ //power-domains = <&pd LIGHT_AON_VDEC_PD>;
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+ clocks = <&dummy_clock_vpsys>,
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+ <&dummy_clock_vpsys>,
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+ <&dummy_clock_vpsys>;
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clock-names = "aclk", "cclk", "pclk";
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status = "disabled";
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};
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@@ -1424,10 +1406,10 @@ venc: venc@ffecc10000 {
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reg = <0xff 0xecc10000 0x0 0x8000>;
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interrupt-parent = <&intc>;
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interrupts = <133>;
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- power-domains = <&pd LIGHT_AON_VENC_PD>;
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- clocks = <&vpsys_clk_gate LIGHT_VPSYS_VENC_ACLK>,
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- <&vpsys_clk_gate LIGHT_VPSYS_VENC_CCLK>,
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- <&vpsys_clk_gate LIGHT_VPSYS_VENC_PCLK>;
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+ //power-domains = <&pd LIGHT_AON_VENC_PD>;
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+ clocks = <&dummy_clock_vpsys>,
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+ <&dummy_clock_vpsys>,
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+ <&dummy_clock_vpsys>;
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clock-names = "aclk", "cclk", "pclk";
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status = "disabled";
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};
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@@ -1443,7 +1425,7 @@ isp_venc_shake: shake@ffe4078000 {
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vidmem: vidmem@ffecc08000 {
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compatible = "thead,light-vidmem";
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reg = <0xff 0xecc08000 0x0 0x1000>;
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- status = "disabled";
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+ status = "okay";
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};
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light_i2s: light_i2s@ffe7034000 {
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@@ -1532,7 +1514,7 @@ pvt: pvt@fffff4e000 {
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reg-names = "common", "ts", "pd", "vm";
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clocks = <&dummy_clock_aonsys_clk>;
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#thermal-sensor-cells = <1>;
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- status = "okay";
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+ status = "disabled";
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};
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i2c0: i2c@ffe7f20000 {
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@@ -1660,10 +1642,10 @@ isp0: isp@ffe4100000 {
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reg = <0xff 0xe4100000 0x0 0x10000>;
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interrupt-parent = <&intc>;
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interrupts = <117>,<118>;
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- clocks = <&visys_clk_gate LIGHT_CLKGEN_ISP0_ACLK>,
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- <&visys_clk_gate LIGHT_CLKGEN_ISP0_HCLK>,
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- <&visys_clk_gate LIGHT_CLKGEN_ISP0_PIXELCLK>,
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- <&visys_clk_gate LIGHT_CLKGEN_ISP0_CLK>;
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+ clocks = <&dummy_clock_visys>,
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+ <&dummy_clock_visys>,
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+ <&dummy_clock_visys>,
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+ <&dummy_clock_visys>;
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clock-names = "aclk", "hclk", "isp0_pclk", "cclk";
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status = "disabled";
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};
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@@ -1673,11 +1655,11 @@ isp1: isp@ffe4110000 {
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reg = <0xff 0xe4110000 0x0 0x10000>;
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interrupt-parent = <&intc>;
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interrupts = <120>,<121>;
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- clocks = <&visys_clk_gate LIGHT_CLKGEN_ISP0_ACLK>,
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- <&visys_clk_gate LIGHT_CLKGEN_ISP0_HCLK>,
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- <&visys_clk_gate LIGHT_CLKGEN_ISP0_PIXELCLK>,
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- <&visys_clk_gate LIGHT_CLKGEN_ISP1_CLK>,
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- <&visys_clk_gate LIGHT_CLKGEN_ISP1_PIXELCLK>;
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+ clocks = <&dummy_clock_visys>,
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+ <&dummy_clock_visys>,
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+ <&dummy_clock_visys>,
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+ <&dummy_clock_visys>,
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+ <&dummy_clock_visys>;
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clock-names = "aclk", "hclk", "isp0_pclk", "cclk", "isp1_pclk";
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status = "disabled";
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};
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@@ -1687,9 +1669,9 @@ isp_ry0: isp_ry@ffe4120000 {
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reg = <0xff 0xe4120000 0x0 0x10000>;
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interrupt-parent = <&intc>;
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interrupts = <123>,<124>;
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- clocks = <&visys_clk_gate LIGHT_CLKGEN_ISP_RY_ACLK>,
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- <&visys_clk_gate LIGHT_CLKGEN_ISP_RY_HCLK>,
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- <&visys_clk_gate LIGHT_CLKGEN_ISP_RY_CCLK>;
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+ clocks = <&dummy_clock_visys>,
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+ <&dummy_clock_visys>,
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+ <&dummy_clock_visys>;
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clock-names = "aclk", "hclk", "cclk";
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status = "disabled";
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};
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@@ -1699,10 +1681,10 @@ dewarp: dewarp@ffe4130000 {
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reg = <0xff 0xe4130000 0x0 0x10000>;
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interrupt-parent = <&intc>;
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interrupts = <98>,<99>;
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- clocks = <&visys_clk_gate LIGHT_CLKGEN_DW200_ACLK>,
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- <&visys_clk_gate LIGHT_CLKGEN_DW200_HCLK>,
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- <&visys_clk_gate LIGHT_CLKGEN_DW200_CLK_VSE>,
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- <&visys_clk_gate LIGHT_CLKGEN_DW200_CLK_DWE>;
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+ clocks = <&dummy_clock_visys>,
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+ <&dummy_clock_visys>,
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+ <&dummy_clock_visys>,
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+ <&dummy_clock_visys>;
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clock-names = "aclk", "hclk", "vseclk", "dweclk";
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status = "disabled";
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};
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@@ -1738,10 +1720,10 @@ bm_csi0: csi@ffe4000000{ //CSI2
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interrupts = <128>;
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dphyglueiftester = <0x180>;
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sysreg_mipi_csi_ctrl = <0x140>;
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- clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_PCLK>,
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- <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_PIXCLK>,
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- <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_CFG_CLK>;
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- clock-names = "pclk", "pixclk", "cfg_clk";
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+ clocks = <&dummy_clock_visys>,
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+ <&dummy_clock_visys>,
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+ <&dummy_clock_visys>;
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+ clock-names = "pclk", "pixclk", "cfg_clk";
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phy_name = "CSI_4LANE";
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status = "disabled";
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};
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@@ -1761,10 +1743,10 @@ bm_csi1: csi@ffe4010000{ //CSI2X2_B
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sysreg_mipi_csi_ctrl = <0x148>;
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visys-regmap = <&visys_reg>;
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csia-regmap = <&csia_reg>;
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- clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PCLK>,
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- <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PIXCLK>,
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- <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_CFG_CLK>;
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- clock-names = "pclk", "pixclk", "cfg_clk";
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+ clocks = <&dummy_clock_visys>,
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+ <&dummy_clock_visys>,
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+ <&dummy_clock_visys>;
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+ clock-names = "pclk", "pixclk", "cfg_clk";
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phy_name = "CSI_B";
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status = "disabled";
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};
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|
@@ -1776,10 +1758,10 @@ bm_csi2: csi@ffe4020000{ //CSI2X2_A
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interrupts = <127>;
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dphyglueiftester = <0x184>;
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sysreg_mipi_csi_ctrl = <0x144>;
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|
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- clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_PCLK>,
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- <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_PIXCLK>,
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|
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- <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_CFG_CLK>;
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|
|
- clock-names = "pclk", "pixclk", "cfg_clk";
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|
|
+ clocks = <&dummy_clock_visys>,
|
|
|
+ <&dummy_clock_visys>,
|
|
|
+ <&dummy_clock_visys>;
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|
|
+ clock-names = "pclk", "pixclk", "cfg_clk";
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|
|
phy_name = "CSI_A";
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|
|
status = "disabled";
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|
|
};
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|
@@ -1808,9 +1790,9 @@ vi_pre: vi_pre@ffe4030000 {
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reg = <0xff 0xe4030000 0x0 0x1000>;
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|
|
interrupt-parent = <&intc>;
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|
|
interrupts = <134>;
|
|
|
- clocks = <&visys_clk_gate LIGHT_CLKGEN_VIPRE_ACLK>,
|
|
|
- <&visys_clk_gate LIGHT_CLKGEN_VIPRE_PCLK>,
|
|
|
- <&visys_clk_gate LIGHT_CLKGEN_VIPRE_PIXELCLK>;
|
|
|
+ clocks = <&dummy_clock_vipre>,
|
|
|
+ <&dummy_clock_vipre>,
|
|
|
+ <&dummy_clock_vipre>;
|
|
|
clock-names ="aclk", "pclk", "pixclk";
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|
|
status = "disabled";
|
|
|
};
|
|
@@ -2016,11 +1998,6 @@ dsp@0 {
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|
|
};
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|
|
};
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|
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|
|
|
- pmp: pmp@ffdc020000 {
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|
|
- compatible = "pmp";
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|
|
- reg = <0xff 0xdc020000 0x0 0x1000>;
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|
|
- };
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|
|
-
|
|
|
mrvbr: mrvbr@ffff018050 {
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|
|
compatible = "mrvbr";
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|
|
reg = <0xff 0xff019050 0x0 0x1000>;
|
|
@@ -2056,6 +2033,7 @@ mbox_910t: mbox@ffffc38000 {
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|
|
clock-names = "ipg";
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|
|
icu_cpu_id = <0>;
|
|
|
#mbox-cells = <2>;
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|
|
+ status = "disabled";
|
|
|
};
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|
|
|
|
|
trng: rng@ffff300000 {
|