fire-crash.dts 14 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
  4. */
  5. /dts-v1/;
  6. #include "fire.dtsi"
  7. #include <dt-bindings/input/linux-event-codes.h>
  8. #include <dt-bindings/gpio/gpio.h>
  9. #include "light-vi-devices.dtsi"
  10. / {
  11. model = "T-HEAD fire fpga board";
  12. compatible = "thead,fire-emu", "thead,fire";
  13. chosen {
  14. bootargs = "console=ttyS0,115200 earlycon";
  15. stdout-path = "serial0:115200n8";
  16. };
  17. leds {
  18. compatible = "gpio-leds";
  19. status = "disabled";
  20. led0 {
  21. label = "SYS_STATUS";
  22. gpios = <&gpio1_porta 15 0>; /* GPIO_ACTIVE_HIGH: 0 */
  23. default-state = "off";
  24. };
  25. };
  26. display-subsystem {
  27. status = "okay";
  28. };
  29. lcd0_backlight: pwm-backlight@0 {
  30. status = "disabled";
  31. compatible = "pwm-backlight";
  32. pwms = <&pwm 0 5000000>;
  33. brightness-levels = <0 4 8 16 32 64 128 255>;
  34. default-brightness-level = <7>;
  35. };
  36. light_iopmp: iopmp {
  37. status = "disabled";
  38. compatible = "thead,light-iopmp";
  39. /* config#1: multiple valid regions */
  40. iopmp_emmc: IOPMP_EMMC {
  41. regions = <0x000000 0x100000>,
  42. <0x100000 0x200000>;
  43. attr = <0xFFFFFFFF>;
  44. dummy_slave= <0x800000>;
  45. };
  46. /* config#2: iopmp bypass */
  47. iopmp_sdio0: IOPMP_SDIO0 {
  48. bypass_en;
  49. };
  50. /* config#3: iopmp default region set */
  51. iopmp_sdio1: IOPMP_SDIO1 {
  52. attr = <0xFFFFFFFF>;
  53. is_default_region;
  54. };
  55. iopmp_usb0: IOPMP_USB0 {
  56. attr = <0xFFFFFFFF>;
  57. is_default_region;
  58. };
  59. iopmp_ao: IOPMP_AO {
  60. is_default_region;
  61. };
  62. iopmp_aud: IOPMP_AUD {
  63. is_default_region;
  64. };
  65. iopmp_chip_dbg: IOPMP_CHIP_DBG {
  66. is_default_region;
  67. };
  68. iopmp_eip120i: IOPMP_EIP120I {
  69. is_default_region;
  70. };
  71. iopmp_eip120ii: IOPMP_EIP120II {
  72. is_default_region;
  73. };
  74. iopmp_eip120iii: IOPMP_EIP120III {
  75. is_default_region;
  76. };
  77. iopmp_isp0: IOPMP_ISP0 {
  78. is_default_region;
  79. };
  80. iopmp_isp1: IOPMP_ISP1 {
  81. is_default_region;
  82. };
  83. iopmp_dw200: IOPMP_DW200 {
  84. is_default_region;
  85. };
  86. iopmp_vipre: IOPMP_VIPRE {
  87. is_default_region;
  88. };
  89. iopmp_venc: IOPMP_VENC {
  90. is_default_region;
  91. };
  92. iopmp_vdec: IOPMP_VDEC {
  93. is_default_region;
  94. };
  95. iopmp_g2d: IOPMP_G2D {
  96. is_default_region;
  97. };
  98. iopmp0_dpu: IOPMP0_DPU {
  99. bypass_en;
  100. };
  101. iopmp1_dpu: IOPMP1_DPU {
  102. bypass_en;
  103. };
  104. iopmp_gpu: IOPMP_GPU {
  105. is_default_region;
  106. };
  107. iopmp_gmac1: IOPMP_GMAC1 {
  108. is_default_region;
  109. };
  110. iopmp_gmac2: IOPMP_GMAC2 {
  111. is_default_region;
  112. };
  113. iopmp_dmac: IOPMP_DMAC {
  114. is_default_region;
  115. };
  116. iopmp_tee_dmac: IOPMP_TEE_DMAC {
  117. is_default_region;
  118. };
  119. iopmp_dsp0: IOPMP_DSP0 {
  120. is_default_region;
  121. };
  122. iopmp_dsp1: IOPMP_DSP1 {
  123. is_default_region;
  124. };
  125. };
  126. mbox_910t_client1: mbox_910t_client1 {
  127. compatible = "thead,light-mbox-client";
  128. mbox-names = "902";
  129. mboxes = <&mbox_910t 1 0>;
  130. status = "disabled";
  131. };
  132. mbox_910t_client2: mbox_910t_client2 {
  133. compatible = "thead,light-mbox-client";
  134. mbox-names = "906";
  135. mboxes = <&mbox_910t 2 0>;
  136. status = "disabled";
  137. };
  138. lightsound: lightsound@1 {
  139. compatible = "simple-audio-card";
  140. simple-audio-card,name = "Light-Sound-Card";
  141. #address-cells = <1>;
  142. #size-cells = <0>;
  143. status = "disabled";
  144. };
  145. dummy_codec: dummy_codec {
  146. #sound-dai-cells = <1>;
  147. compatible = "linux,bt-sco";
  148. status = "okay";
  149. };
  150. wcn_wifi: wireless-wlan {
  151. compatible = "wlan-platdata";
  152. clock-names = "clk_wifi";
  153. ref-clock-frequency = <24000000>;
  154. keep_wifi_power_on;
  155. pinctrl-names = "default";
  156. wifi_chip_type = "rtl8723ds";
  157. WIFI,poweren_gpio = <&gpio2_porta 26 0>;
  158. WIFI,reset_n = <&gpio2_porta 28 0>;
  159. status = "disabled";
  160. };
  161. wcn_bt: wireless-bluetooth {
  162. compatible = "bluetooth-platdata";
  163. pinctrl-names = "default", "rts_gpio";
  164. BT,power_gpio = <&gpio2_porta 29 0>;
  165. status = "disabled";
  166. };
  167. gpio_keys: gpio_keys{
  168. compatible = "gpio-keys";
  169. pinctrl-names = "default";
  170. status = "disabled";
  171. key-volumedown {
  172. label = "Volume Down Key";
  173. linux,code = <KEY_1>;
  174. debounce-interval = <2>;
  175. gpios = <&ao_gpio_porta 4 GPIO_ACTIVE_LOW>;
  176. };
  177. key-volumeup {
  178. label = "Volume Up Key";
  179. linux,code = <KEY_2>;
  180. debounce-interval = <2>;
  181. gpios = <&ao_gpio_porta 5 GPIO_ACTIVE_LOW>;
  182. };
  183. };
  184. aon: light-aon {
  185. compatible = "thead,light-aon";
  186. mbox-names = "aon";
  187. mboxes = <&mbox_910t 1 0>;
  188. status = "disabled";
  189. pd: light-aon-pd {
  190. compatible = "thead,light-aon-pd";
  191. #power-domain-cells = <1>;
  192. status = "disabled";
  193. };
  194. aon_reg_dialog: light-dialog-reg {
  195. compatible = "thead,light-dialog-pmic";
  196. status = "disabled";
  197. };
  198. c910_cpufreq {
  199. compatible = "thead,light-mpw-cpufreq";
  200. status = "disabled";
  201. };
  202. test: light-aon-test {
  203. compatible = "thead,light-aon-test";
  204. status = "disabled";
  205. };
  206. };
  207. };
  208. &resmem {
  209. #address-cells = <2>;
  210. #size-cells = <2>;
  211. ranges;
  212. tee_mem: memory@1a000000 {
  213. reg = <0x0 0x1a000000 0 0x4000000>;
  214. no-map;
  215. };
  216. dsp0_mem: memory@20000000 { /**0x2000_0000~0x2040_0000 4M**/
  217. reg = <0x0 0x20000000 0x0 0x00280000 /* DSP FW code&data section 2.5M*/
  218. 0x0 0x20280000 0x0 0x00001000 /* DSP communication area 4K*/
  219. 0x0 0x20281000 0x0 0x00007000 /* Panic/log page 28K */
  220. 0x0 0x20288000 0x0 0x00178000>; /* DSP shared memory 1.5M-32K*/
  221. no-map;
  222. };
  223. dsp1_mem: memory@20400000 { /**0x2040_0000~0x2080_0000 4M**/
  224. reg = <0x0 0x20400000 0x0 0x00280000 /* DSP FW code&data section */
  225. 0x0 0x20680000 0x0 0x00001000 /* DSP communication area */
  226. 0x0 0x20681000 0x0 0x00007000 /* Panic/log page*/
  227. 0x0 0x20688000 0x0 0x00178000>; /* DSP shared memory */
  228. no-map;
  229. };
  230. vi_mem: framebuffer@0f800000 {
  231. reg = <0x0 0x0F800000 0x0 0x05400000 /* vi_mem_pool_region[0] 84 MB (default) */
  232. 0x0 0x14C00000 0x0 0x01D00000 /* vi_mem_pool_region[1] 29 MB */
  233. 0x0 0x16900000 0x0 0x03200000>; /* vi_mem_pool_region[2] 50 MB */
  234. no-map;
  235. };
  236. facelib_mem: memory@22000000 {
  237. reg = <0x0 0x22000000 0x0 0x10000000>;
  238. no-map;
  239. };
  240. };
  241. &clk {
  242. status = "disabled";
  243. };
  244. &i2c0 {
  245. clock-frequency = <400000>;
  246. status = "okay";
  247. eeprom@50 {
  248. compatible = "atmel,24c32";
  249. reg = <0x50>;
  250. pagesize = <32>;
  251. };
  252. codec: wm8960@1a {
  253. #sound-dai-cells = <0>;
  254. compatible = "wlf,wm8960";
  255. reg = <0x1a>;
  256. wlf,shared-lrclk;
  257. wlf,hp-cfg = <3 2 3>;
  258. wlf,gpio-cfg = <1 3>;
  259. };
  260. touch@5d {
  261. #gpio-cells = <2>;
  262. compatible = "goodix,gt911";
  263. status = "disabled";
  264. reg = <0x5d>;
  265. interrupt-parent = <&gpio1_porta>;
  266. interrupts = <8 0>;
  267. irq-gpios = <&gpio1_porta 8 0>;
  268. reset-gpios = <&gpio1_porta 7 0>;
  269. touchscreen-size-x = <800>;
  270. touchscreen-size-y = <1280>;
  271. };
  272. };
  273. &audio_i2c0 {
  274. clock-frequency = <100000>;
  275. status = "disabled";
  276. es8156_audio_codec: es8156@8 {
  277. #sound-dai-cells = <0>;
  278. compatible = "everest,es8156";
  279. reg = <0x08>;
  280. };
  281. es7210_audio_codec: es7210@40 {
  282. #sound-dai-cells = <0>;
  283. compatible = "MicArray_0";
  284. reg = <0x40>;
  285. };
  286. };
  287. &i2c1 {
  288. clock-frequency = <400000>;
  289. status = "disabled";
  290. touch1@5d {
  291. #gpio-cells = <2>;
  292. compatible = "goodix,gt911";
  293. reg = <0x5d>;
  294. interrupt-parent = <&gpio1_porta>;
  295. interrupts = <12 0>;
  296. irq-gpios = <&gpio1_porta 12 0>;
  297. reset-gpios = <&gpio1_porta 11 0>;
  298. touchscreen-size-x = <800>;
  299. touchscreen-size-y = <1280>;
  300. };
  301. };
  302. &spi0 {
  303. num-cs = <1>;
  304. cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
  305. rx-sample-delay-ns = <10>;
  306. status = "okay";
  307. spi_norflash@0 {
  308. #address-cells = <1>;
  309. #size-cells = <1>;
  310. compatible = "winbond,w25q64jwm", "jedec,spi-nor";
  311. reg = <0>;
  312. spi-max-frequency = <50000000>;
  313. w25q,fast-read;
  314. status = "disabled";
  315. };
  316. spidev@1 {
  317. compatible = "spidev";
  318. #address-cells = <0x1>;
  319. #size-cells = <0x1>;
  320. reg = <0x1>;
  321. spi-max-frequency = <50000000>;
  322. };
  323. };
  324. &qspi0 {
  325. num-cs = <1>;
  326. cs-gpios = <&gpio2_porta 3 0>;
  327. rx-sample-dly = <4>;
  328. status = "disabled";
  329. spi-flash@0 {
  330. #address-cells = <1>;
  331. #size-cells = <1>;
  332. compatible = "spi-nand";
  333. spi-max-frequency = <100000000>;
  334. spi-tx-bus-width = <4>;
  335. spi-rx-bus-width = <4>;
  336. reg = <0>;
  337. partition@0 {
  338. label = "ubi1";
  339. reg = <0x00000000 0x08000000>;
  340. };
  341. };
  342. };
  343. &qspi1 {
  344. num-cs = <1>;
  345. cs-gpios = <&gpio0_porta 1 0>;
  346. status = "disabled";
  347. spi-flash@0 {
  348. #address-cells = <1>;
  349. #size-cells = <1>;
  350. compatible = "spi-nand";
  351. spi-max-frequency = <66000000>;
  352. spi-tx-bus-width = <4>;
  353. spi-rx-bus-width = <4>;
  354. reg = <0>;
  355. partition@0 {
  356. label = "ubi2";
  357. reg = <0x00000000 0x08000000>;
  358. };
  359. };
  360. };
  361. &gmac0 {
  362. phy-mode = "rgmii-id";
  363. rx-clk-delay = <0x00>; /* for RGMII */
  364. tx-clk-delay = <0x00>; /* for RGMII */
  365. phy-handle = <&phy_88E1111_0>;
  366. status = "okay";
  367. mdio0 {
  368. #address-cells = <1>;
  369. #size-cells = <0>;
  370. compatible = "snps,dwmac-mdio";
  371. phy_88E1111_0: ethernet-phy@0 {
  372. reg = <0x1>;
  373. };
  374. phy_88E1111_1: ethernet-phy@1 {
  375. reg = <0x2>;
  376. };
  377. };
  378. };
  379. &emmc {
  380. max-frequency = <198000000>;
  381. non-removable;
  382. mmc-hs400-1_8v;
  383. io_fixed_1v8;
  384. is_emmc;
  385. no-sdio;
  386. no-sd;
  387. pull_up;
  388. bus-width = <8>;
  389. status = "okay";
  390. };
  391. &sdhci0 {
  392. max-frequency = <198000000>;
  393. bus-width = <4>;
  394. pull_up;
  395. wprtn_ignore;
  396. status = "okay";
  397. };
  398. &sdhci1 {
  399. max-frequency = <100000000>;
  400. bus-width = <4>;
  401. pull_up;
  402. no-sd;
  403. no-mmc;
  404. non-removable;
  405. io_fixed_1v8;
  406. post-power-on-delay-ms = <50>;
  407. wprtn_ignore;
  408. cap-sd-highspeed;
  409. keep-power-in-suspend;
  410. wakeup-source;
  411. status = "disabled";
  412. };
  413. &padctrl0_apsys { /* right-pinctrl */
  414. light-evb-padctrl0 {
  415. /*
  416. * Pin Configuration Node:
  417. * Format: <pin_id mux_node config>
  418. */
  419. pinctrl_uart0: uart0grp {
  420. thead,pins = <
  421. FM_UART0_TXD 0x0 0x72
  422. FM_UART0_RXD 0x0 0x72
  423. >;
  424. };
  425. pinctrl_spi0: spi0grp {
  426. thead,pins = <
  427. FM_SPI_CSN 0x3 0x20a
  428. FM_SPI_SCLK 0x0 0x20a
  429. FM_SPI_MISO 0x0 0x23a
  430. FM_SPI_MOSI 0x0 0x23a
  431. >;
  432. };
  433. pinctrl_qspi0: qspi0grp {
  434. thead,pins = <
  435. FM_QSPI0_SCLK 0x0 0x20f
  436. FM_QSPI0_CSN0 0x3 0x20f
  437. FM_QSPI0_CSN1 0x0 0x20f
  438. FM_QSPI0_D0_MOSI 0x0 0x23f
  439. FM_QSPI0_D1_MISO 0x0 0x23f
  440. FM_QSPI0_D2_WP 0x0 0x23f
  441. FM_QSPI0_D3_HOLD 0x0 0x23f
  442. >;
  443. };
  444. pinctrl_audio_i2s0: i2s0grp {
  445. thead,pins = <
  446. FM_QSPI0_SCLK 0x2 0x208
  447. FM_QSPI0_CSN0 0x2 0x238
  448. FM_QSPI0_CSN1 0x2 0x208
  449. FM_QSPI0_D0_MOSI 0x2 0x238
  450. FM_QSPI0_D1_MISO 0x2 0x238
  451. FM_QSPI0_D2_WP 0x2 0x238
  452. FM_QSPI0_D3_HOLD 0x2 0x238
  453. >;
  454. };
  455. pinctrl_pwm: pwmgrp {
  456. thead,pins = <
  457. FM_GPIO3_2 0x1 0x208 /* pwm0 */
  458. FM_GPIO3_3 0x1 0x208 /* pwm1 */
  459. >;
  460. };
  461. };
  462. };
  463. &padctrl1_apsys { /* left-pinctrl */
  464. light-evb-padctrl1 {
  465. /*
  466. * Pin Configuration Node:
  467. * Format: <pin_id mux_node config>
  468. */
  469. pinctrl_uart3: uart3grp {
  470. thead,pins = <
  471. FM_UART3_TXD 0x0 0x72
  472. FM_UART3_RXD 0x0 0x72
  473. >;
  474. };
  475. pinctrl_uart4: uart4grp {
  476. thead,pins = <
  477. FM_UART4_TXD 0x0 0x72
  478. FM_UART4_RXD 0x0 0x72
  479. FM_UART4_CTSN 0x0 0x72
  480. FM_UART4_RTSN 0x0 0x72
  481. >;
  482. };
  483. pinctrl_qspi1: qspi1grp {
  484. thead,pins = <
  485. FM_QSPI1_SCLK 0x0 0x20a
  486. FM_QSPI1_CSN0 0x3 0x20a
  487. FM_QSPI1_D0_MOSI 0x0 0x23a
  488. FM_QSPI1_D1_MISO 0x0 0x23a
  489. FM_QSPI1_D2_WP 0x0 0x23a
  490. FM_QSPI1_D3_HOLD 0x0 0x23a
  491. >;
  492. };
  493. pinctrl_iso7816: iso7816grp {
  494. thead,pins = <
  495. FM_QSPI1_SCLK 0x1 0x208
  496. FM_QSPI1_D0_MOSI 0x1 0x238
  497. FM_QSPI1_D1_MISO 0x1 0x238
  498. FM_QSPI1_D2_WP 0x1 0x238
  499. FM_QSPI1_D3_HOLD 0x1 0x238
  500. >;
  501. };
  502. };
  503. };
  504. &i2c2 {
  505. clock-frequency = <400000>;
  506. status = "okay";
  507. eeprom@50 {
  508. compatible = "atmel,24c32";
  509. reg = <0x50>;
  510. pagesize = <32>;
  511. };
  512. };
  513. &i2c3 {
  514. clock-frequency = <400000>;
  515. status = "okay";
  516. eeprom@50 {
  517. compatible = "atmel,24c32";
  518. reg = <0x50>;
  519. pagesize = <32>;
  520. };
  521. };
  522. &i2c4 {
  523. clock-frequency = <400000>;
  524. status = "okay";
  525. eeprom@50 {
  526. compatible = "atmel,24c32";
  527. reg = <0x50>;
  528. pagesize = <32>;
  529. };
  530. pcal6408ahk_a: gpio@20 {
  531. compatible = "nxp,pcal9554b";
  532. reg = <0x20>;
  533. gpio-controller;
  534. #gpio-cells = <2>;
  535. };
  536. };
  537. &isp0 {
  538. status = "disabled";
  539. };
  540. &isp1 {
  541. status = "disabled";
  542. };
  543. &isp_ry0 {
  544. status = "disabled";
  545. };
  546. &dewarp {
  547. status = "disabled";
  548. };
  549. &dec400_isp0 {
  550. status = "disabled";
  551. };
  552. &dec400_isp1 {
  553. status = "disabled";
  554. };
  555. &dec400_isp2 {
  556. status = "disabled";
  557. };
  558. &bm_visys {
  559. status = "disabled";
  560. };
  561. &bm_csi0 {
  562. status = "disabled";
  563. };
  564. &bm_csi1 {
  565. status = "disabled";
  566. };
  567. &bm_csi2 {
  568. status = "disabled";
  569. };
  570. &vi_pre {
  571. //vi_pre_irq_en = <1>;
  572. status = "disabled";
  573. };
  574. &xtensa_dsp {
  575. status = "disabled";
  576. };
  577. &xtensa_dsp0 {
  578. status = "disabled";
  579. memory-region = <&dsp0_mem>;
  580. };
  581. &xtensa_dsp1{
  582. status = "disabled";
  583. memory-region = <&dsp1_mem>;
  584. };
  585. &vvcam_flash_led0{
  586. flash_led_name = "aw36413_aw36515";
  587. floodlight_i2c_bus = /bits/ 8 <2>;
  588. floodlight_en_pin = <&gpio1_porta 25 0>;
  589. //projection_i2c_bus = /bits/ 8 <2>;
  590. flash_led_touch_pin = <&gpio1_porta 27 0>; //flash led touch pin
  591. status = "disabled";
  592. };
  593. &vvcam_sensor1 {
  594. status = "disabled";
  595. };
  596. &vvcam_sensor2 {
  597. status = "disabled";
  598. };
  599. &vvcam_sensor3 {
  600. status = "disabled";
  601. };
  602. &vvcam_sensor4 {
  603. status = "disabled";
  604. };
  605. &vvcam_sensor5 {
  606. status = "disabled";
  607. };
  608. &video0{
  609. status = "disabled";
  610. };
  611. &video1{
  612. status = "disabled";
  613. };
  614. &video2{
  615. status = "disabled";
  616. };
  617. &video3{
  618. status = "disabled";
  619. };
  620. &video4{
  621. status = "disabled";
  622. };
  623. &video5{
  624. status = "disabled";
  625. };
  626. &video6{
  627. status = "disabled";
  628. };
  629. &video7{
  630. status = "disabled";
  631. };
  632. &video8{
  633. status = "disabled";
  634. };
  635. &video9{
  636. status = "disabled";
  637. };
  638. &video10{
  639. status = "disabled";
  640. };
  641. &video11{
  642. status = "disabled";
  643. };
  644. &video12{
  645. status = "disabled";
  646. };
  647. &trng {
  648. status = "disabled";
  649. };
  650. &eip_28 {
  651. status = "disabled";
  652. };
  653. &vdec {
  654. status = "disabled";
  655. };
  656. &venc {
  657. status = "disabled";
  658. };
  659. &isp_venc_shake {
  660. status = "disabled";
  661. };
  662. &vidmem {
  663. status = "disabled";
  664. };
  665. &gpu {
  666. status = "disabled";
  667. };
  668. &dpu_enc0 {
  669. status = "disabled";
  670. };
  671. &dpu_enc1 {
  672. status = "disabled";
  673. };
  674. &dpu {
  675. status = "disabled";
  676. };
  677. &dsi0 {
  678. status = "disabled";
  679. };
  680. &dhost_0 {
  681. status = "disabled";
  682. };
  683. &disp1_out {
  684. status = "disabled";
  685. };
  686. &hdmi_tx {
  687. status = "disabled";
  688. };
  689. &lightsound {
  690. status = "disabled";
  691. };
  692. &light_i2s {
  693. status = "disabled";
  694. };
  695. &i2s0 {
  696. status = "disabled";
  697. };
  698. &i2s1 {
  699. status = "disabled";
  700. };
  701. &i2s3 {
  702. status = "disabled";
  703. };
  704. &khvhost {
  705. status = "disabled";
  706. };