light-i2s.c 21 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (C) 2021 Alibaba Group Holding Limited.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/dma-mapping.h>
  7. #include <linux/pm_runtime.h>
  8. #include <linux/io.h>
  9. #include <linux/of.h>
  10. #include <linux/of_device.h>
  11. #include <linux/scatterlist.h>
  12. #include <linux/sh_dma.h>
  13. #include <linux/slab.h>
  14. #include <linux/module.h>
  15. #include <linux/workqueue.h>
  16. #include <sound/soc.h>
  17. #include <sound/pcm_params.h>
  18. #include <sound/sh_fsi.h>
  19. #include "light-i2s.h"
  20. #include "light-pcm.h"
  21. #include <linux/dmaengine.h>
  22. #include <linux/regmap.h>
  23. #include <sound/core.h>
  24. #include <sound/pcm.h>
  25. #include <sound/initval.h>
  26. #include <sound/dmaengine_pcm.h>
  27. #include <linux/mfd/syscon.h>
  28. #include <dt-bindings/pinctrl/light-fm-aon-pinctrl.h>
  29. #define IIS_SRC_CLK 294912000
  30. #define AUDIO_IIS_SRC0_CLK 49152000
  31. #define AUDIO_IIS_SRC1_CLK 135475200
  32. #define IIS_MCLK_SEL 256
  33. #define HDMI_DIV_VALUE 2
  34. #define DIV_DEFAULT 1
  35. #define MONO_SOURCE 1
  36. #define STEREO_CHANNEL 2
  37. #define AP_I2S "ap_i2s"
  38. #define AUDIO_I2S0 "i2s0"
  39. #define AUDIO_I2S1 "i2s1"
  40. #define AUDIO_I2S2 "i2s2"
  41. #define AUDIO_I2S3 "i2s3"
  42. #define LIGHT_I2S_DMABUF_SIZE (64 * 1024)
  43. #define LIGHT_RATES SNDRV_PCM_RATE_8000_384000
  44. #define LIGHT_FMTS (SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8)
  45. #define LIGHT_AUDIO_PAD_CONFIG(idx) (i2s_priv->cfg_off + ((idx-25) >> 1) * 4)
  46. static u32 light_special_sample_rates[] = { 11025, 22050, 44100, 88200 };
  47. static int light_audio_cpr_set(struct light_i2s_priv *chip, unsigned int cpr_off,
  48. unsigned int mask, unsigned int val)
  49. {
  50. return regmap_update_bits(chip->audio_cpr_regmap,
  51. cpr_off, mask, val);
  52. }
  53. static void light_i2s_set_div_sclk(struct light_i2s_priv *chip, u32 sample_rate, unsigned int div_val)
  54. {
  55. u32 div;
  56. u32 div0;
  57. int i;
  58. u32 i2s_src_clk = 0;
  59. if (!strcmp(chip->name, AP_I2S))
  60. div = IIS_SRC_CLK / IIS_MCLK_SEL;
  61. else {
  62. for (i = 0; i < ARRAY_SIZE(light_special_sample_rates); i++) {
  63. if (light_special_sample_rates[i] == sample_rate) {
  64. i2s_src_clk = 1;
  65. break;
  66. }
  67. }
  68. if (!strcmp(chip->name, AUDIO_I2S0)) {
  69. if (!i2s_src_clk) {
  70. light_audio_cpr_set(chip, CPR_PERI_CLK_SEL_REG, CPR_I2S0_SRC_SEL_MSK, CPR_I2S0_SRC_SEL(0));
  71. div = AUDIO_IIS_SRC0_CLK / IIS_MCLK_SEL;
  72. } else {
  73. light_audio_cpr_set(chip, CPR_PERI_CLK_SEL_REG, CPR_I2S0_SRC_SEL_MSK, CPR_I2S0_SRC_SEL(2));
  74. div = AUDIO_IIS_SRC1_CLK / IIS_MCLK_SEL;
  75. }
  76. } else if (!strcmp(chip->name, AUDIO_I2S1)) {
  77. if (!i2s_src_clk) {
  78. light_audio_cpr_set(chip, CPR_PERI_CLK_SEL_REG, CPR_I2S1_SRC_SEL_MSK, CPR_I2S1_SRC_SEL(0));
  79. div = AUDIO_IIS_SRC0_CLK / IIS_MCLK_SEL;
  80. } else {
  81. light_audio_cpr_set(chip, CPR_PERI_CLK_SEL_REG, CPR_I2S1_SRC_SEL_MSK, CPR_I2S1_SRC_SEL(2));
  82. div = AUDIO_IIS_SRC1_CLK / IIS_MCLK_SEL;
  83. }
  84. } else if (!strcmp(chip->name, AUDIO_I2S2)) {
  85. if (!i2s_src_clk) {
  86. light_audio_cpr_set(chip, CPR_PERI_CLK_SEL_REG, CPR_I2S2_SRC_SEL_MSK, CPR_I2S2_SRC_SEL(0));
  87. div = AUDIO_IIS_SRC0_CLK / IIS_MCLK_SEL;
  88. } else {
  89. light_audio_cpr_set(chip, CPR_PERI_CLK_SEL_REG, CPR_I2S2_SRC_SEL_MSK, CPR_I2S2_SRC_SEL(2));
  90. div = AUDIO_IIS_SRC1_CLK / IIS_MCLK_SEL;
  91. }
  92. } else if (!strcmp(chip->name, AUDIO_I2S3)) {
  93. div = AUDIO_IIS_SRC0_CLK / IIS_MCLK_SEL;
  94. }
  95. }
  96. div0 = (div + div % sample_rate) / sample_rate / div_val;
  97. writel(div0, chip->regs + I2S_DIV0_LEVEL);
  98. }
  99. static inline void light_snd_txctrl(struct light_i2s_priv *chip, bool on)
  100. {
  101. u32 dma_en = 0;
  102. u32 i2s_en = 0;
  103. u32 i2s_status = 0;
  104. u32 i2s_imr = 0;
  105. if (on) {
  106. dma_en |= DMACR_TDMAE_EN;
  107. i2s_en |= IISEN_I2SEN;
  108. writel(dma_en, chip->regs + I2S_DMACR);
  109. writel(i2s_en, chip->regs + I2S_IISEN);
  110. } else {
  111. dma_en &= ~DMACR_TDMAE_EN;
  112. i2s_en &= ~IISEN_I2SEN;
  113. i2s_status = readl(chip->regs + I2S_SR);
  114. while ((i2s_status & SR_TXBUSY_STATUS) || !(i2s_status & SR_TFNF_TX_FIFO_NOT_FULL)) {
  115. i2s_status = readl(chip->regs + I2S_SR);
  116. }
  117. i2s_imr = readl(chip->regs + I2S_IMR);
  118. i2s_imr &= ~(IMR_TXUIRM_INTR_MSK);
  119. i2s_imr &= ~(IMR_TXEIM_INTR_MSK);
  120. writel(i2s_imr, chip->regs + I2S_IMR);
  121. i2s_imr = readl(chip->regs + I2S_IMR);
  122. writel(dma_en, chip->regs + I2S_DMACR);
  123. i2s_status = readl(chip->regs + I2S_SR);
  124. while ((i2s_status & SR_TXBUSY_STATUS) || !(i2s_status & SR_TFE_TX_FIFO_EMPTY)) {
  125. i2s_status = readl(chip->regs + I2S_SR);
  126. }
  127. mdelay(10);
  128. writel(i2s_en, chip->regs + I2S_IISEN);
  129. }
  130. }
  131. static inline void light_snd_rxctrl(struct light_i2s_priv *chip, bool on)
  132. {
  133. u32 dma_en;
  134. u32 i2s_en;
  135. if (on) {
  136. dma_en |= DMACR_RDMAE_EN;
  137. i2s_en |= IISEN_I2SEN;
  138. } else {
  139. dma_en &= ~DMACR_RDMAE_EN;
  140. i2s_en &= ~IISEN_I2SEN;
  141. }
  142. writel(dma_en, chip->regs + I2S_DMACR);
  143. writel(i2s_en, chip->regs + I2S_IISEN);
  144. }
  145. static int light_i2s_dai_startup(struct snd_pcm_substream *substream,
  146. struct snd_soc_dai *dai)
  147. {
  148. return 0;
  149. }
  150. static void light_i2s_dai_shutdown(struct snd_pcm_substream *substream,
  151. struct snd_soc_dai *dai)
  152. {
  153. struct light_i2s_priv *i2s_private = snd_soc_dai_get_drvdata(dai);
  154. if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
  155. light_snd_rxctrl(i2s_private, 0);
  156. clk_disable_unprepare(i2s_private->clk);
  157. }
  158. /**
  159. * light_i2s_dai_trigger: start and stop the DMA transfer.
  160. *
  161. * This function is called by ALSA to start, stop, pause, and resume the DMA
  162. * transfer of data.
  163. */
  164. static int light_i2s_dai_trigger(struct snd_pcm_substream *substream, int cmd,
  165. struct snd_soc_dai *dai)
  166. {
  167. int ret = 0;
  168. struct light_i2s_priv *i2s_private = snd_soc_dai_get_drvdata(dai);
  169. bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
  170. switch (cmd) {
  171. case SNDRV_PCM_TRIGGER_START:
  172. case SNDRV_PCM_TRIGGER_RESUME:
  173. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  174. if (tx)
  175. light_snd_txctrl(i2s_private, 1);
  176. else
  177. light_snd_rxctrl(i2s_private, 1);
  178. break;
  179. case SNDRV_PCM_TRIGGER_STOP:
  180. case SNDRV_PCM_TRIGGER_SUSPEND:
  181. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  182. if (tx)
  183. light_snd_txctrl(i2s_private, 0);
  184. break;
  185. default:
  186. return -EINVAL;
  187. }
  188. return ret;
  189. }
  190. static int light_i2s_set_fmt_dai(struct snd_soc_dai *cpu_dai, unsigned int fmt)
  191. {
  192. struct light_i2s_priv *i2s_private = snd_soc_dai_get_drvdata(cpu_dai);
  193. u32 cnfout = 0;
  194. u32 cnfin = 0;
  195. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  196. case SND_SOC_DAIFMT_I2S:
  197. cnfout |= IISCNFOUT_TSAFS_I2S;
  198. break;
  199. case SND_SOC_DAIFMT_RIGHT_J:
  200. cnfout |= IISCNFOUT_TSAFS_RIGHT_JUSTIFIED;
  201. break;
  202. case SND_SOC_DAIFMT_LEFT_J:
  203. cnfout |= IISCNFOUT_TSAFS_LEFT_JUSTIFIED;
  204. break;
  205. default:
  206. pr_err("Unknown fmt dai\n");
  207. return -EINVAL;
  208. }
  209. regmap_update_bits(i2s_private->regmap, I2S_IISCNF_OUT,
  210. IISCNFOUT_TSAFS_MSK,
  211. cnfout);
  212. cnfin |= CNFIN_I2S_RXMODE_MASTER_MODE;
  213. regmap_update_bits(i2s_private->regmap, I2S_IISCNF_IN,
  214. CNFIN_I2S_RXMODE_Msk,
  215. cnfin);
  216. return 0;
  217. }
  218. static int light_i2s_dai_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  219. {
  220. struct light_i2s_priv *i2s_private = snd_soc_dai_get_drvdata(dai);
  221. bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
  222. u32 val;
  223. u32 len = 0;
  224. u32 sclk_sel = 0;
  225. u32 rate;
  226. u32 funcmode;
  227. u32 iiscnf_out;
  228. u32 iiscnf_in;
  229. u32 i2s_en;
  230. u32 channels = params_channels(params);
  231. rate = params_rate(params);
  232. iiscnf_out = readl(i2s_private->regs + I2S_IISCNF_OUT);
  233. iiscnf_in = readl(i2s_private->regs + I2S_IISCNF_IN);
  234. switch (params_format(params)) {
  235. case SNDRV_PCM_FORMAT_S8:
  236. val |= I2S_DATA_8BIT_WIDTH_32BIT;
  237. len = 32;
  238. break;
  239. case SNDRV_PCM_FORMAT_S16_LE:
  240. val |= I2S_DATA_WIDTH_16BIT;
  241. len = 32;
  242. break;
  243. case SNDRV_PCM_FORMAT_S24_LE:
  244. val |= I2S_DATA_WIDTH_24BIT;
  245. len = 32;
  246. break;
  247. case SNDRV_PCM_FORMAT_S32_LE:
  248. val |= I2S_DATA_WIDTH_32BIT;
  249. len = 32;
  250. break;
  251. default:
  252. pr_err("Unknown data format\n");
  253. return -EINVAL;
  254. }
  255. sclk_sel = len*STEREO_CHANNEL;
  256. switch (sclk_sel) {
  257. case 16:
  258. val |= FSSTA_SCLK_SEL_16;
  259. break;
  260. case 32:
  261. val |= FSSTA_SCLK_SEL_32;
  262. break;
  263. case 48:
  264. val |= FSSTA_SCLK_SEL_48;
  265. break;
  266. case 64:
  267. val |= FSSTA_SCLK_SEL_64;
  268. break;
  269. default:
  270. pr_err("Not support channel num %d\n", channels);
  271. return -EINVAL;
  272. }
  273. i2s_en &= ~IISEN_I2SEN;
  274. writel(i2s_en, i2s_private->regs + I2S_IISEN);
  275. regmap_update_bits(i2s_private->regmap, I2S_FSSTA,
  276. FSSTA_DATAWTH_Msk | FSSTA_SCLK_SEL_Msk,
  277. val);
  278. funcmode = readl(i2s_private->regs + I2S_FUNCMODE);
  279. if (tx) {
  280. funcmode |= FUNCMODE_TMODE_WEN;
  281. funcmode &= ~FUNCMODE_CH1_ENABLE;
  282. funcmode |= FUNCMODE_RMODE_WEN;
  283. funcmode &= ~FUNCMODE_RMODE;
  284. funcmode &= ~FUNCMODE_TMODE;
  285. funcmode |= FUNCMODE_TMODE;
  286. } else {
  287. funcmode |= FUNCMODE_RMODE_WEN;
  288. funcmode |= FUNCMODE_CH0_ENABLE;
  289. funcmode |= FUNCMODE_CH1_ENABLE;
  290. funcmode |= FUNCMODE_CH2_ENABLE;
  291. funcmode |= FUNCMODE_TMODE_WEN;
  292. funcmode &= ~FUNCMODE_TMODE;
  293. funcmode &= ~FUNCMODE_RMODE;
  294. funcmode |= FUNCMODE_RMODE;
  295. }
  296. writel(funcmode, i2s_private->regs + I2S_FUNCMODE);
  297. if (channels == MONO_SOURCE) {
  298. iiscnf_out |= IISCNFOUT_TX_VOICE_EN_MONO;
  299. iiscnf_in |= CNFIN_RX_CH_SEL_LEFT;
  300. iiscnf_in |= CNFIN_RVOICEEN_MONO;
  301. } else {
  302. iiscnf_out &= ~IISCNFOUT_TX_VOICE_EN_MONO;
  303. iiscnf_in &= ~CNFIN_RX_CH_SEL_LEFT;
  304. iiscnf_in &= ~CNFIN_RVOICEEN_MONO;
  305. }
  306. if (tx)
  307. writel(iiscnf_out, i2s_private->regs + I2S_IISCNF_OUT);
  308. else
  309. writel(iiscnf_in, i2s_private->regs + I2S_IISCNF_IN);
  310. light_i2s_set_div_sclk(i2s_private, rate, DIV_DEFAULT);
  311. return 0;
  312. }
  313. static int light_hdmi_dai_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  314. {
  315. struct light_i2s_priv *i2s_private = snd_soc_dai_get_drvdata(dai);
  316. bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
  317. u32 val;
  318. u32 len = 0;
  319. u32 rate;
  320. u32 funcmode;
  321. u32 iiscnf_out;
  322. u32 i2s_en;
  323. u32 channels = params_channels(params);
  324. rate = params_rate(params);
  325. switch (params_format(params)) {
  326. case SNDRV_PCM_FORMAT_S16_LE:
  327. val |= I2S_DATA_WIDTH_16BIT;
  328. len = 16;
  329. break;
  330. case SNDRV_PCM_FORMAT_S24_LE:
  331. val |= I2S_DATA_WIDTH_24BIT;
  332. len = 24;
  333. break;
  334. default:
  335. pr_err("Unknown data format\n");
  336. return -EINVAL;
  337. }
  338. val |= FSSTA_SCLK_SEL_64;
  339. i2s_en &= ~IISEN_I2SEN;
  340. writel(i2s_en, i2s_private->regs + I2S_IISEN);
  341. regmap_update_bits(i2s_private->regmap, I2S_FSSTA,
  342. FSSTA_DATAWTH_Msk | FSSTA_SCLK_SEL_Msk,
  343. val);
  344. funcmode = readl(i2s_private->regs + I2S_FUNCMODE);
  345. if (tx) {
  346. funcmode |= FUNCMODE_TMODE_WEN;
  347. funcmode &= ~FUNCMODE_TMODE;
  348. funcmode |= FUNCMODE_TMODE;
  349. } else {
  350. funcmode |= FUNCMODE_RMODE_WEN;
  351. funcmode &= ~FUNCMODE_RMODE;
  352. funcmode |= FUNCMODE_RMODE;
  353. }
  354. writel(funcmode, i2s_private->regs + I2S_FUNCMODE);
  355. iiscnf_out = readl(i2s_private->regs + I2S_IISCNF_OUT);
  356. if (channels == MONO_SOURCE)
  357. iiscnf_out |= IISCNFOUT_TX_VOICE_EN_MONO;
  358. else
  359. iiscnf_out &= ~IISCNFOUT_TX_VOICE_EN_MONO;
  360. writel(iiscnf_out, i2s_private->regs + I2S_IISCNF_OUT);
  361. light_i2s_set_div_sclk(i2s_private, rate, DIV_DEFAULT);
  362. return 0;
  363. }
  364. static int light_i2s_dai_probe(struct snd_soc_dai *dai)
  365. {
  366. struct light_i2s_priv *i2s = snd_soc_dai_get_drvdata(dai);
  367. if(i2s)
  368. snd_soc_dai_init_dma_data(dai, &i2s->dma_params_tx,
  369. &i2s->dma_params_rx);
  370. return 0;
  371. }
  372. static const struct snd_soc_dai_ops light_i2s_dai_ops = {
  373. .startup = light_i2s_dai_startup,
  374. .shutdown = light_i2s_dai_shutdown,
  375. .trigger = light_i2s_dai_trigger,
  376. .set_fmt = light_i2s_set_fmt_dai,
  377. .hw_params = light_i2s_dai_hw_params,
  378. };
  379. static const struct snd_soc_dai_ops light_hdmi_dai_ops = {
  380. .startup = light_i2s_dai_startup,
  381. .shutdown = light_i2s_dai_shutdown,
  382. .trigger = light_i2s_dai_trigger,
  383. .set_fmt = light_i2s_set_fmt_dai,
  384. .hw_params = light_hdmi_dai_hw_params,
  385. };
  386. static struct snd_soc_dai_driver light_i2s_soc_dai[] = {
  387. {
  388. .probe = light_i2s_dai_probe,
  389. .name = "light-i2s-dai",
  390. .playback = {
  391. .rates = LIGHT_RATES,
  392. .formats = LIGHT_FMTS,
  393. .channels_min = 1,
  394. .channels_max = 2,
  395. },
  396. .capture = {
  397. .rates = LIGHT_RATES,
  398. .formats = LIGHT_FMTS,
  399. .channels_min = 1,
  400. .channels_max = 2,
  401. },
  402. .ops = &light_i2s_dai_ops,
  403. },
  404. {
  405. .probe = light_i2s_dai_probe,
  406. .name = "light-hdmi-dai",
  407. .playback = {
  408. .rates = LIGHT_RATES,
  409. .formats = LIGHT_FMTS,
  410. .channels_min = 1,
  411. .channels_max = 2,
  412. },
  413. .ops = &light_hdmi_dai_ops,
  414. },
  415. };
  416. static const struct snd_soc_component_driver light_i2s_soc_component = {
  417. .name = "light_i2s",
  418. };
  419. static int light_pcm_probe(struct platform_device *pdev,struct light_i2s_priv *i2s)
  420. {
  421. int ret;
  422. ret = light_pcm_dma_init(pdev, LIGHT_I2S_DMABUF_SIZE);
  423. if (ret) {
  424. pr_err("light_pcm_dma_init error\n");
  425. return 0;
  426. }
  427. return 0;
  428. }
  429. static bool light_i2s_wr_reg(struct device *dev, unsigned int reg)
  430. {
  431. switch (reg) {
  432. case I2S_IISEN:
  433. case I2S_FUNCMODE:
  434. case I2S_IISCNF_IN:
  435. case I2S_FSSTA:
  436. case I2S_IISCNF_OUT:
  437. case I2S_DMACR:
  438. return true;
  439. default:
  440. return false;
  441. }
  442. }
  443. static bool light_i2s_rd_reg(struct device *dev, unsigned int reg)
  444. {
  445. switch (reg) {
  446. case I2S_IISEN:
  447. case I2S_FUNCMODE:
  448. case I2S_IISCNF_IN:
  449. case I2S_FSSTA:
  450. case I2S_IISCNF_OUT:
  451. case I2S_DMACR:
  452. return true;
  453. default:
  454. return false;
  455. }
  456. }
  457. static const struct regmap_config light_i2s_regmap_config = {
  458. .reg_bits = 32,
  459. .reg_stride = 4,
  460. .val_bits = 32,
  461. .max_register = I2S_DR4,
  462. .writeable_reg = light_i2s_wr_reg,
  463. .readable_reg = light_i2s_rd_reg,
  464. .cache_type = REGCACHE_FLAT,
  465. };
  466. static int light_audio_pinconf_set(struct device *dev, unsigned int pin_id, unsigned int val)
  467. {
  468. struct light_i2s_priv *i2s_priv = dev_get_drvdata(dev);
  469. unsigned int shift;
  470. unsigned int mask = 0;
  471. i2s_priv->cfg_off = 0xC;
  472. shift = (((pin_id-25) % 2) << 4);
  473. mask |= (0xFFFF << shift);
  474. val = (val << shift);
  475. return regmap_update_bits(i2s_priv->audio_pin_regmap,
  476. LIGHT_AUDIO_PAD_CONFIG(pin_id),mask, val);
  477. }
  478. static int light_audio_pinctrl(struct device *dev)
  479. {
  480. struct light_i2s_priv *i2s_priv = dev_get_drvdata(dev);
  481. if (!strcmp(i2s_priv->name, AUDIO_I2S0)) {
  482. light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA6, 0x4);
  483. light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA7, 0x4);
  484. light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA9, 0x8);
  485. light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA10, 0x8);
  486. light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA11, 0x8);
  487. light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA12, 0x8);
  488. } else if (!strcmp(i2s_priv->name, AUDIO_I2S1)) {
  489. light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA6, 0x4);
  490. light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA7, 0x4);
  491. light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA13, 0x8);
  492. light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA14, 0x8);
  493. light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA15, 0x8);
  494. light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA17, 0x8);
  495. } else if (!strcmp(i2s_priv->name, AUDIO_I2S2)) {
  496. light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA6, 0x5);
  497. light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA7, 0x5);
  498. light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA18, 0x8);
  499. light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA19, 0x8);
  500. light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA21, 0x8);
  501. light_audio_pinconf_set(i2s_priv->dev, FM_AUDIO_CFG_PA22, 0x8);
  502. }
  503. return 0;
  504. }
  505. static int light_i2s_runtime_suspend(struct device *dev)
  506. {
  507. struct light_i2s_priv *i2s_priv = dev_get_drvdata(dev);
  508. regcache_cache_only(i2s_priv->regmap, true);
  509. clk_disable_unprepare(i2s_priv->clk);
  510. return 0;
  511. }
  512. static int light_i2s_runtime_resume(struct device *dev)
  513. {
  514. struct light_i2s_priv *i2s_priv = dev_get_drvdata(dev);
  515. int ret;
  516. ret = clk_prepare_enable(i2s_priv->clk);
  517. if (ret) {
  518. dev_err(i2s_priv->dev, "clock enable failed %d\n", ret);
  519. return ret;
  520. }
  521. regcache_cache_only(i2s_priv->regmap, false);
  522. return ret;
  523. }
  524. static const struct of_device_id light_i2s_of_match[] = {
  525. { .compatible = "light,light-i2s"},
  526. {},
  527. };
  528. MODULE_DEVICE_TABLE(of, light_i2s_of_match);
  529. static int light_audio_i2s_probe(struct platform_device *pdev)
  530. {
  531. struct device_node *np = pdev->dev.of_node;
  532. const char *sprop;
  533. const uint32_t *iprop;
  534. struct light_i2s_priv *i2s_priv;
  535. struct resource *res;
  536. struct device *dev = &pdev->dev;
  537. unsigned int irq;
  538. int ret;
  539. i2s_priv = devm_kzalloc(&pdev->dev, sizeof(*i2s_priv),
  540. GFP_KERNEL);
  541. if (!i2s_priv)
  542. return -ENOMEM;
  543. i2s_priv->dev = dev;
  544. sprop = of_get_property(np, "light,mode", NULL);
  545. if (sprop) {
  546. if (!strcmp(sprop, "i2s-master"))
  547. i2s_priv->dai_fmt = SND_SOC_DAIFMT_I2S;
  548. else
  549. printk("mode is not i2s-master");
  550. }
  551. sprop = of_get_property(np, "light,sel", NULL);
  552. if (sprop) {
  553. strcpy(i2s_priv->name, sprop);
  554. }
  555. iprop = of_get_property(np, "light,dma_maxburst", NULL);
  556. if (iprop)
  557. i2s_priv->dma_maxburst = be32_to_cpup(iprop);
  558. else
  559. i2s_priv->dma_maxburst = 8;
  560. dev_set_drvdata(&pdev->dev, i2s_priv);
  561. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  562. i2s_priv->regs = devm_ioremap_resource(dev, res);
  563. if (IS_ERR(i2s_priv->regs))
  564. return PTR_ERR(i2s_priv->regs);
  565. i2s_priv->regmap = devm_regmap_init_mmio(&pdev->dev, i2s_priv->regs,
  566. &light_i2s_regmap_config);
  567. if (IS_ERR(i2s_priv->regmap)) {
  568. dev_err(&pdev->dev,
  569. "Failed to initialise managed register map\n");
  570. return PTR_ERR(i2s_priv->regmap);
  571. }
  572. if (!strcmp(i2s_priv->name, AUDIO_I2S0) || !strcmp(i2s_priv->name, AUDIO_I2S1) || !strcmp(i2s_priv->name, AUDIO_I2S2)) {
  573. i2s_priv->audio_pin_regmap = syscon_regmap_lookup_by_phandle(np, "audio-pin-regmap");
  574. if (IS_ERR(i2s_priv->audio_pin_regmap)) {
  575. dev_err(&pdev->dev, "cannot find regmap for audio system register\n");
  576. } else
  577. light_audio_pinctrl(&pdev->dev);
  578. i2s_priv->audio_cpr_regmap = syscon_regmap_lookup_by_phandle(np, "audio-cpr-regmap");
  579. if (IS_ERR(i2s_priv->audio_cpr_regmap)) {
  580. dev_err(&pdev->dev, "cannot find regmap for audio cpr register\n");
  581. } else
  582. light_audio_cpr_set(i2s_priv, CPR_PERI_DIV_SEL_REG, CPR_AUDIO_DIV1_SEL_MSK, CPR_AUDIO_DIV1_SEL(5));
  583. }
  584. pm_runtime_enable(&pdev->dev);
  585. if (!pm_runtime_enabled(&pdev->dev)) {
  586. ret = light_i2s_runtime_resume(&pdev->dev);
  587. if (ret)
  588. goto err_pm_disable;
  589. }
  590. irq = platform_get_irq(pdev, 0);
  591. if (!res || (int)irq <= 0) {
  592. dev_err(&pdev->dev, "Not enough light platform resources.\n");
  593. return -ENODEV;
  594. }
  595. i2s_priv->clk = devm_clk_get(&pdev->dev, "pclk");
  596. if (IS_ERR(i2s_priv->clk))
  597. return PTR_ERR(i2s_priv->clk);
  598. ret = clk_prepare_enable(i2s_priv->clk);
  599. if (ret < 0)
  600. return ret;
  601. i2s_priv->dma_params_tx.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
  602. i2s_priv->dma_params_rx.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
  603. i2s_priv->dma_params_tx.maxburst = i2s_priv->dma_maxburst;
  604. i2s_priv->dma_params_rx.maxburst = i2s_priv->dma_maxburst;
  605. if (!strcmp(i2s_priv->name, AP_I2S)) {
  606. i2s_priv->dma_params_tx.addr = res->start + I2S_DR;
  607. i2s_priv->dma_params_rx.addr = res->start + I2S_DR1;
  608. } else if (!strcmp(i2s_priv->name, AUDIO_I2S0) || !strcmp(i2s_priv->name, AUDIO_I2S1) || !strcmp(i2s_priv->name, AUDIO_I2S2)) {
  609. i2s_priv->dma_params_tx.addr = res->start + I2S_DR;
  610. i2s_priv->dma_params_rx.addr = res->start + I2S_DR;
  611. } else if (!strcmp(i2s_priv->name, AUDIO_I2S3)) {
  612. i2s_priv->dma_params_tx.addr = res->start + I2S_DR;
  613. i2s_priv->dma_params_rx.addr = res->start + I2S_DR2;
  614. }
  615. light_pcm_probe(pdev, i2s_priv);
  616. ret = devm_snd_soc_register_component(&pdev->dev, &light_i2s_soc_component,
  617. light_i2s_soc_dai, ARRAY_SIZE(light_i2s_soc_dai));
  618. if (ret < 0) {
  619. dev_err(&pdev->dev, "cannot snd component register\n");
  620. goto err_pm_disable;
  621. }
  622. return ret;
  623. err_pm_disable:
  624. pm_runtime_disable(&pdev->dev);
  625. return ret;
  626. }
  627. static int light_i2s_remove(struct platform_device *pdev)
  628. {
  629. struct light_i2s_priv *i2s_priv = dev_get_drvdata(&pdev->dev);
  630. pm_runtime_disable(&pdev->dev);
  631. if (!pm_runtime_status_suspended(&pdev->dev))
  632. light_i2s_runtime_suspend(&pdev->dev);
  633. clk_disable_unprepare(i2s_priv->clk);
  634. return 0;
  635. }
  636. static const struct dev_pm_ops light_i2s_pm_ops = {
  637. SET_RUNTIME_PM_OPS(light_i2s_runtime_suspend, light_i2s_runtime_resume,
  638. NULL)
  639. };
  640. static struct platform_driver light_i2s_driver = {
  641. .driver = {
  642. .name = "light-pcm-audio",
  643. .pm = &light_i2s_pm_ops,
  644. .of_match_table = light_i2s_of_match,
  645. },
  646. .probe = light_audio_i2s_probe,
  647. .remove = light_i2s_remove,
  648. };
  649. module_platform_driver(light_i2s_driver);
  650. MODULE_AUTHOR("shuofeng.ren <shuofeng.rsf@linux.alibaba.com>");
  651. MODULE_DESCRIPTION("Thead Light audio driver");
  652. MODULE_LICENSE("GPL v2");