light-b-product.dts 49 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (C) 2021 Alibaba Group Holding Limited.
  4. */
  5. /dts-v1/;
  6. #include "light.dtsi"
  7. #include <dt-bindings/input/linux-event-codes.h>
  8. #include <dt-bindings/gpio/gpio.h>
  9. #include "light-vi-devices.dtsi"
  10. / {
  11. model = "T-HEAD Light val board";
  12. compatible = "thead,light-val", "thead,light";
  13. memory@0 {
  14. device_type = "memory";
  15. reg = <0x0 0x00000000 0x0 0x80000000>;
  16. };
  17. chosen {
  18. bootargs = "console=ttyS0,115200 crashkernel=256M-:128M earlycon clk_ignore_unused sram=0xffe0000000,0x180000";
  19. stdout-path = "serial0:115200n8";
  20. };
  21. leds {
  22. compatible = "gpio-leds";
  23. status = "disabled";
  24. led0 {
  25. label = "SYS_STATUS";
  26. gpios = <&gpio1_porta 15 0>; /* GPIO_ACTIVE_HIGH: 0 */
  27. default-state = "off";
  28. };
  29. };
  30. display-subsystem {
  31. status = "okay";
  32. };
  33. lcd0_backlight: pwm-backlight@0 {
  34. compatible = "pwm-backlight";
  35. pwms = <&pwm 0 5000000>;
  36. brightness-levels = <0 4 8 16 32 64 128 255>;
  37. default-brightness-level = <7>;
  38. };
  39. light_iopmp: iopmp {
  40. compatible = "thead,light-iopmp";
  41. /* config#1: multiple valid regions */
  42. iopmp_emmc: IOPMP_EMMC {
  43. regions = <0x000000 0x100000>,
  44. <0x100000 0x200000>;
  45. attr = <0xFFFFFFFF>;
  46. dummy_slave= <0x800000>;
  47. };
  48. /* config#2: iopmp bypass */
  49. iopmp_sdio0: IOPMP_SDIO0 {
  50. bypass_en;
  51. };
  52. /* config#3: iopmp default region set */
  53. iopmp_sdio1: IOPMP_SDIO1 {
  54. attr = <0xFFFFFFFF>;
  55. is_default_region;
  56. };
  57. iopmp_usb0: IOPMP_USB0 {
  58. attr = <0xFFFFFFFF>;
  59. is_default_region;
  60. };
  61. iopmp_ao: IOPMP_AO {
  62. is_default_region;
  63. };
  64. iopmp_aud: IOPMP_AUD {
  65. is_default_region;
  66. };
  67. iopmp_chip_dbg: IOPMP_CHIP_DBG {
  68. is_default_region;
  69. };
  70. iopmp_eip120i: IOPMP_EIP120I {
  71. is_default_region;
  72. };
  73. iopmp_eip120ii: IOPMP_EIP120II {
  74. is_default_region;
  75. };
  76. iopmp_eip120iii: IOPMP_EIP120III {
  77. is_default_region;
  78. };
  79. iopmp_isp0: IOPMP_ISP0 {
  80. is_default_region;
  81. };
  82. iopmp_isp1: IOPMP_ISP1 {
  83. is_default_region;
  84. };
  85. iopmp_dw200: IOPMP_DW200 {
  86. is_default_region;
  87. };
  88. iopmp_vipre: IOPMP_VIPRE {
  89. is_default_region;
  90. };
  91. iopmp_venc: IOPMP_VENC {
  92. is_default_region;
  93. };
  94. iopmp_vdec: IOPMP_VDEC {
  95. is_default_region;
  96. };
  97. iopmp_g2d: IOPMP_G2D {
  98. is_default_region;
  99. };
  100. iopmp_fce: IOPMP_FCE {
  101. is_default_region;
  102. };
  103. iopmp_npu: IOPMP_NPU {
  104. is_default_region;
  105. };
  106. iopmp0_dpu: IOPMP0_DPU {
  107. bypass_en;
  108. };
  109. iopmp1_dpu: IOPMP1_DPU {
  110. bypass_en;
  111. };
  112. iopmp_gpu: IOPMP_GPU {
  113. is_default_region;
  114. };
  115. iopmp_gmac1: IOPMP_GMAC1 {
  116. is_default_region;
  117. };
  118. iopmp_gmac2: IOPMP_GMAC2 {
  119. is_default_region;
  120. };
  121. iopmp_dmac: IOPMP_DMAC {
  122. is_default_region;
  123. };
  124. iopmp_tee_dmac: IOPMP_TEE_DMAC {
  125. is_default_region;
  126. };
  127. iopmp_dsp0: IOPMP_DSP0 {
  128. is_default_region;
  129. };
  130. iopmp_dsp1: IOPMP_DSP1 {
  131. is_default_region;
  132. };
  133. };
  134. mbox_910t_client1: mbox_910t_client1 {
  135. compatible = "thead,light-mbox-client";
  136. mbox-names = "902";
  137. mboxes = <&mbox_910t 1 0>;
  138. status = "disabled";
  139. };
  140. mbox_910t_client2: mbox_910t_client2 {
  141. compatible = "thead,light-mbox-client";
  142. mbox-names = "906";
  143. mboxes = <&mbox_910t 2 0>;
  144. status = "disabled";
  145. };
  146. lightsound: lightsound@1 {
  147. compatible = "simple-audio-card";
  148. simple-audio-card,name = "Light-Sound-Card";
  149. #address-cells = <1>;
  150. #size-cells = <0>;
  151. status = "disabled";
  152. };
  153. dummy_codec: dummy_codec {
  154. #sound-dai-cells = <1>;
  155. compatible = "linux,bt-sco";
  156. status = "okay";
  157. };
  158. reg_vref_1v8: regulator-adc-verf {
  159. compatible = "regulator-fixed";
  160. regulator-name = "vref-1v8";
  161. regulator-min-microvolt = <1800000>;
  162. regulator-max-microvolt = <1800000>;
  163. status = "okay";
  164. };
  165. reg_tp_pwr_en: regulator-pwr-en {
  166. compatible = "regulator-fixed";
  167. regulator-name = "PWR_EN";
  168. regulator-min-microvolt = <2800000>;
  169. regulator-max-microvolt = <2800000>;
  170. gpio = <&gpio1_porta 12 1>;
  171. enable-active-high;
  172. regulator-always-on;
  173. };
  174. wcn_wifi: wireless-wlan {
  175. compatible = "wlan-platdata";
  176. clock-names = "clk_wifi";
  177. ref-clock-frequency = <24000000>;
  178. keep_wifi_power_on;
  179. pinctrl-names = "default";
  180. wifi_chip_type = "rtl8723ds";
  181. WIFI,poweren_gpio = <&gpio2_porta 29 0>;
  182. WIFI,reset_n = <&gpio2_porta 24 0>;
  183. status = "okay";
  184. };
  185. wcn_bt: wireless-bluetooth {
  186. compatible = "bluetooth-platdata";
  187. pinctrl-names = "default", "rts_gpio";
  188. BT,power_gpio = <&gpio2_porta 25 0>;
  189. status = "okay";
  190. };
  191. gpio-keys {
  192. compatible = "gpio-keys";
  193. pinctrl-0 = <&pinctrl_volume>;
  194. pinctrl-names = "default";
  195. key-volumedown {
  196. label = "Volume Down Key";
  197. linux,code = <KEY_VOLUMEDOWN>;
  198. debounce-interval = <1>;
  199. gpios = <&ao_gpio_porta 11 0x1>;
  200. };
  201. key-volumeup {
  202. label = "Volume Up Key";
  203. linux,code = <KEY_VOLUMEUP>;
  204. debounce-interval = <1>;
  205. gpios = <&ao_gpio_porta 10 0x1>;
  206. };
  207. };
  208. aon: aon@0 {
  209. compatible = "thead,light-aon";
  210. mbox-names = "aon";
  211. mboxes = <&mbox_910t 1 0>;
  212. status = "okay";
  213. pd: light-aon-pd {
  214. compatible = "thead,light-aon-pd";
  215. #power-domain-cells = <1>;
  216. };
  217. soc_aud_3v3_en_reg: soc_aud_3v3_en {
  218. compatible = "regulator-fixed";
  219. regulator-name = "soc_aud_3v3_en";
  220. regulator-min-microvolt = <3300000>;
  221. regulator-max-microvolt = <3300000>;
  222. gpio = <&ao_gpio_porta 7 1>;
  223. enable-active-high;
  224. regulator-always-on;
  225. };
  226. soc_aud_1v8_en_reg: soc_aud_1v8_en {
  227. compatible = "regulator-fixed";
  228. regulator-name = "soc_aud_1v8_en";
  229. regulator-min-microvolt = <1800000>;
  230. regulator-max-microvolt = <1800000>;
  231. gpio = <&ao_gpio_porta 8 1>;
  232. enable-active-high;
  233. regulator-always-on;
  234. };
  235. soc_vdd_3v3_en_reg: soc_vdd_3v3_en {
  236. compatible = "regulator-fixed";
  237. regulator-name = "soc_vdd_3v3_en";
  238. regulator-min-microvolt = <3300000>;
  239. regulator-max-microvolt = <3300000>;
  240. gpio = <&gpio0_porta 30 1>;
  241. enable-active-high;
  242. regulator-always-on;
  243. };
  244. soc_lcd0_bias_en_reg: soc_lcd0_bias_en {
  245. compatible = "regulator-fixed";
  246. regulator-name = "soc_lcd0_bias_en";
  247. regulator-min-microvolt = <5700000>;
  248. regulator-max-microvolt = <5700000>;
  249. gpio = <&gpio1_porta 10 1>;
  250. enable-active-high;
  251. };
  252. soc_vdd5v_se_en_reg: soc_vdd5v_se_en {
  253. compatible = "regulator-fixed";
  254. regulator-name = "soc_vdd5v_se_en";
  255. regulator-min-microvolt = <5000000>;
  256. regulator-max-microvolt = <5000000>;
  257. gpio = <&gpio2_porta 14 1>;
  258. enable-active-high;
  259. regulator-always-on;
  260. };
  261. soc_wcn33_en_reg: soc_wcn33_en {
  262. compatible = "regulator-fixed";
  263. regulator-name = "soc_wcn33_en";
  264. regulator-min-microvolt = <3300000>;
  265. regulator-max-microvolt = <3300000>;
  266. gpio = <&gpio2_porta 29 1>;
  267. enable-active-high;
  268. regulator-always-on;
  269. };
  270. soc_vbus_en_reg: soc_vbus_en {
  271. compatible = "regulator-fixed";
  272. regulator-name = "soc_vbus_en";
  273. regulator-min-microvolt = <3300000>;
  274. regulator-max-microvolt = <3300000>;
  275. gpio = <&gpio2_porta 28 1>;
  276. enable-active-high;
  277. regulator-always-on;
  278. };
  279. soc_dovdd18_scan_reg: soc_dovdd18_scan {
  280. compatible = "regulator-fixed";
  281. regulator-name = "soc_dovdd18_scan";
  282. regulator-min-microvolt = <1800000>;
  283. regulator-max-microvolt = <1800000>;
  284. gpio = <&gpio2_porta 31 1>;
  285. enable-active-high;
  286. };
  287. soc_dvdd12_scan_reg: soc_dvdd12_scan {
  288. compatible = "regulator-fixed";
  289. regulator-name = "soc_dvdd12_scan";
  290. regulator-min-microvolt = <1200000>;
  291. regulator-max-microvolt = <1200000>;
  292. gpio = <&gpio3_porta 0 1>;
  293. enable-active-high;
  294. };
  295. soc_avdd28_scan_en_reg: soc_avdd28_scan_en {
  296. compatible = "regulator-fixed";
  297. regulator-name = "soc_avdd28_scan_en";
  298. regulator-min-microvolt = <2800000>;
  299. regulator-max-microvolt = <2800000>;
  300. gpio = <&gpio2_porta 30 1>;
  301. enable-active-high;
  302. };
  303. soc_avdd28_rgb_reg: soc_avdd28_rgb {
  304. compatible = "regulator-fixed";
  305. regulator-name = "soc_avdd28_rgb";
  306. regulator-min-microvolt = <2800000>;
  307. regulator-max-microvolt = <2800000>;
  308. gpio = <&gpio1_porta 15 1>;
  309. enable-active-high;
  310. };
  311. soc_dovdd18_rgb_reg: soc_dovdd18_rgb {
  312. compatible = "regulator-fixed";
  313. regulator-name = "soc_dovdd18_rgb";
  314. regulator-min-microvolt = <2800000>;
  315. regulator-max-microvolt = <2800000>;
  316. gpio = <&gpio1_porta 13 1>;
  317. enable-active-high;
  318. };
  319. soc_dvdd12_rgb_reg: soc_dvdd12_rgb {
  320. compatible = "regulator-fixed";
  321. regulator-name = "soc_dvdd12_rgb";
  322. regulator-min-microvolt = <2800000>;
  323. regulator-max-microvolt = <2800000>;
  324. gpio = <&gpio1_porta 14 1>;
  325. enable-active-high;
  326. };
  327. soc_avdd25_ir_reg: soc_avdd25_ir {
  328. compatible = "regulator-fixed";
  329. regulator-name = "soc_avdd25_ir";
  330. regulator-min-microvolt = <2500000>;
  331. regulator-max-microvolt = <2500000>;
  332. gpio = <&gpio0_porta 28 1>;
  333. enable-active-high;
  334. };
  335. soc_dovdd18_ir_reg: soc_dovdd18_ir {
  336. compatible = "regulator-fixed";
  337. regulator-name = "soc_dovdd18_ir";
  338. regulator-min-microvolt = <1800000>;
  339. regulator-max-microvolt = <1800000>;
  340. gpio = <&gpio0_porta 27 1>;
  341. enable-active-high;
  342. };
  343. soc_dvdd12_ir_reg: soc_dvdd12_ir {
  344. compatible = "regulator-fixed";
  345. regulator-name = "soc_dvdd12_ir";
  346. regulator-min-microvolt = <1200000>;
  347. regulator-max-microvolt = <1200000>;
  348. gpio = <&gpio0_porta 29 1>;
  349. enable-active-high;
  350. };
  351. aon_reg_ricoh: light-ricoh-reg {
  352. compatible = "thead,light-ricoh-pmic";
  353. status = "okay";
  354. dvdd_cpu_reg: appcpu_dvdd {
  355. regulator-name = "appcpu_dvdd";
  356. regulator-min-microvolt = <600000>;
  357. regulator-max-microvolt = <1500000>;
  358. regulator-boot-on;
  359. regulator-always-on;
  360. };
  361. dvddm_cpu_reg: appcpu_dvddm {
  362. regulator-name = "appcpu_dvddm";
  363. regulator-min-microvolt = <600000>;
  364. regulator-max-microvolt = <1500000>;
  365. regulator-boot-on;
  366. regulator-always-on;
  367. };
  368. soc_dvdd18_aon_reg: soc_dvdd18_aon {
  369. regulator-name = "soc_dvdd18_aon";
  370. regulator-boot-on;
  371. regulator-always-on;
  372. };
  373. soc_avdd33_usb3_reg: soc_avdd33_usb3 {
  374. regulator-name = "soc_avdd33_usb3";
  375. regulator-boot-on;
  376. regulator-always-on;
  377. };
  378. soc_dvdd08_aon_reg: soc_dvdd08_aon {
  379. regulator-name = "soc_dvdd08_aon";
  380. regulator-boot-on;
  381. regulator-always-on;
  382. };
  383. soc_dvdd08_ddr_reg: soc_dvdd08_ddr {
  384. regulator-name = "soc_dvdd08_ddr";
  385. regulator-boot-on;
  386. regulator-always-on;
  387. };
  388. soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 {
  389. regulator-name = "soc_vdd_ddr_1v8";
  390. regulator-boot-on;
  391. regulator-always-on;
  392. };
  393. soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 {
  394. regulator-name = "soc_vdd_ddr_1v1";
  395. regulator-boot-on;
  396. regulator-always-on;
  397. };
  398. soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 {
  399. regulator-name = "soc_vdd_ddr_0v6";
  400. regulator-boot-on;
  401. regulator-always-on;
  402. };
  403. soc_dvdd18_ap_reg: soc_dvdd18_ap {
  404. regulator-name = "soc_dvdd18_ap";
  405. regulator-boot-on;
  406. regulator-always-on;
  407. };
  408. soc_dvdd08_ap_reg: soc_dvdd08_ap {
  409. regulator-name = "soc_dvdd08_ap";
  410. regulator-boot-on;
  411. regulator-always-on;
  412. };
  413. soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
  414. regulator-name = "soc_avdd08_mipi_hdmi";
  415. regulator-boot-on;
  416. regulator-always-on;
  417. };
  418. soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi {
  419. regulator-name = "soc_avdd18_mipi_hdmi";
  420. regulator-boot-on;
  421. regulator-always-on;
  422. };
  423. soc_vdd33_emmc_reg: soc_vdd33_emmc {
  424. regulator-name = "soc_vdd33_emmc";
  425. regulator-boot-on;
  426. regulator-always-on;
  427. };
  428. soc_vdd18_emmc_reg: soc_vdd18_emmc {
  429. regulator-name = "soc_vdd18_emmc";
  430. regulator-boot-on;
  431. regulator-always-on;
  432. };
  433. soc_vdd18_lcd0_en_reg: soc_lcd0_en {
  434. regulator-name = "soc_lcd0_en";
  435. };
  436. soc_vext_1v8_reg: soc_vext_1v8 {
  437. regulator-name = "soc_vext_1v8";
  438. regulator-boot-on;
  439. regulator-always-on;
  440. };
  441. };
  442. c910_cpufreq {
  443. compatible = "thead,light-mpw-cpufreq";
  444. status = "okay";
  445. };
  446. test: light-aon-test {
  447. compatible = "thead,light-aon-test";
  448. };
  449. };
  450. };
  451. &resmem {
  452. #address-cells = <2>;
  453. #size-cells = <2>;
  454. ranges;
  455. tee_mem: memory@1a000000 {
  456. reg = <0x0 0x1a000000 0 0x4000000>;
  457. no-map;
  458. };
  459. dsp0_mem: memory@20000000 { /**0x2000_0000~0x2040_0000 4M**/
  460. reg = <0x0 0x20000000 0x0 0x00280000 /* DSP FW code&data section 2.5M*/
  461. 0x0 0x20280000 0x0 0x00001000 /* DSP communication area 4K*/
  462. 0x0 0x20281000 0x0 0x00007000 /* Panic/log page 28K */
  463. 0x0 0x20288000 0x0 0x00178000>; /* DSP shared memory 1.5M-32K*/
  464. no-map;
  465. };
  466. dsp1_mem: memory@20400000 { /**0x2040_0000~0x2080_0000 4M**/
  467. reg = <0x0 0x20400000 0x0 0x00280000 /* DSP FW code&data section */
  468. 0x0 0x20680000 0x0 0x00001000 /* DSP communication area */
  469. 0x0 0x20681000 0x0 0x00007000 /* Panic/log page*/
  470. 0x0 0x20688000 0x0 0x00178000>; /* DSP shared memory */
  471. no-map;
  472. };
  473. vi_mem: framebuffer@10000000 {
  474. reg = <0x0 0x10000000 0x0 0x02C00000 /* vi_mem_pool_region[0] 44 MB (default) */
  475. 0x0 0x12C00000 0x0 0x01D00000 /* vi_mem_pool_region[1] 29 MB */
  476. 0x0 0x14900000 0x0 0x01E00000>; /* vi_mem_pool_region[2] 30 MB */
  477. no-map;
  478. };
  479. facelib_mem: memory@17000000 {
  480. reg = <0x0 0x17000000 0 0x02000000>;
  481. no-map;
  482. };
  483. };
  484. &adc {
  485. vref-supply = <&reg_vref_1v8>;
  486. status = "okay";
  487. };
  488. &i2c0 {
  489. clock-frequency = <100000>;
  490. status = "okay";
  491. touch@5d {
  492. #gpio-cells = <2>;
  493. compatible = "goodix,gt911";
  494. reg = <0x5d>;
  495. interrupt-parent = <&gpio1_porta>;
  496. interrupts = <8 0>;
  497. irq-gpios = <&gpio1_porta 8 0>;
  498. reset-gpios = <&gpio1_porta 7 0>;
  499. AVDD28-supply = <&reg_tp_pwr_en>;
  500. touchscreen-size-x = <800>;
  501. touchscreen-size-y = <1280>;
  502. };
  503. };
  504. &audio_i2c0 {
  505. clock-frequency = <100000>;
  506. status = "okay";
  507. es8156_audio_codec: es8156@8 {
  508. #sound-dai-cells = <0>;
  509. compatible = "everest,es8156";
  510. reg = <0x08>;
  511. };
  512. es7210_audio_codec: es7210@40 {
  513. #sound-dai-cells = <0>;
  514. compatible = "MicArray_0";
  515. reg = <0x40>;
  516. };
  517. audio_aw87519_pa@58 {
  518. compatible = "awinic,aw87519_pa";
  519. reg = <0x58>;
  520. reset-gpio = <&ao_gpio4_porta 9 0x1>;
  521. status = "okay";
  522. };
  523. };
  524. &i2c1 {
  525. clock-frequency = <100000>;
  526. status = "okay";
  527. };
  528. &spi0 {
  529. num-cs = <1>;
  530. cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
  531. rx-sample-delay-ns = <10>;
  532. status = "disabled";
  533. spi_norflash@0 {
  534. #address-cells = <1>;
  535. #size-cells = <1>;
  536. compatible = "winbond,w25q64jwm", "jedec,spi-nor";
  537. reg = <0>;
  538. spi-max-frequency = <50000000>;
  539. w25q,fast-read;
  540. };
  541. spidev@1 {
  542. compatible = "spidev";
  543. #address-cells = <0x1>;
  544. #size-cells = <0x1>;
  545. reg = <0x1>;
  546. spi-max-frequency = <50000000>;
  547. };
  548. };
  549. &uart0 {
  550. clock-frequency = <100000000>;
  551. };
  552. &qspi0 {
  553. num-cs = <1>;
  554. cs-gpios = <&gpio2_porta 3 0>;
  555. rx-sample-dly = <4>;
  556. status = "disabled";
  557. spi-flash@0 {
  558. #address-cells = <1>;
  559. #size-cells = <1>;
  560. compatible = "spi-nand";
  561. spi-max-frequency = <100000000>;
  562. spi-tx-bus-width = <4>;
  563. spi-rx-bus-width = <4>;
  564. reg = <0>;
  565. partition@0 {
  566. label = "ubi1";
  567. reg = <0x00000000 0x08000000>;
  568. };
  569. };
  570. };
  571. &qspi1 {
  572. compatible = "snps,dw-apb-ssi";
  573. num-cs = <1>;
  574. cs-gpios = <&gpio0_porta 1 0>;
  575. status = "okay";
  576. spidev@0 {
  577. compatible = "spidev";
  578. #address-cells = <0x1>;
  579. #size-cells = <0x1>;
  580. reg = <0x0>;
  581. spi-max-frequency = <50000000>;
  582. };
  583. };
  584. &gmac0 {
  585. phy-mode = "rgmii-id";
  586. rx-clk-delay = <0x00>; /* for RGMII */
  587. tx-clk-delay = <0x00>; /* for RGMII */
  588. phy-handle = <&phy_88E1111_0>;
  589. status = "okay";
  590. mdio0 {
  591. #address-cells = <1>;
  592. #size-cells = <0>;
  593. compatible = "snps,dwmac-mdio";
  594. phy_88E1111_0: ethernet-phy@0 {
  595. reg = <0x1>;
  596. };
  597. phy_88E1111_1: ethernet-phy@1 {
  598. reg = <0x2>;
  599. };
  600. };
  601. };
  602. &gmac1 {
  603. phy-mode = "rgmii-id";
  604. rx-clk-delay = <0x00>; /* for RGMII */
  605. tx-clk-delay = <0x00>; /* for RGMII */
  606. phy-handle = <&phy_88E1111_1>;
  607. status = "disabled";
  608. };
  609. &emmc {
  610. max-frequency = <198000000>;
  611. non-removable;
  612. mmc-hs400-1_8v;
  613. io_fixed_1v8;
  614. is_emmc;
  615. no-sdio;
  616. no-sd;
  617. pull_up;
  618. bus-width = <8>;
  619. status = "okay";
  620. };
  621. &sdhci0 {
  622. max-frequency = <198000000>;
  623. bus-width = <4>;
  624. pull_up;
  625. wprtn_ignore;
  626. status = "okay";
  627. };
  628. &sdhci1 {
  629. max-frequency = <100000000>;
  630. bus-width = <4>;
  631. pull_up;
  632. no-sd;
  633. no-mmc;
  634. non-removable;
  635. io_fixed_1v8;
  636. post-power-on-delay-ms = <50>;
  637. wprtn_ignore;
  638. cap-sd-highspeed;
  639. keep-power-in-suspend;
  640. wakeup-source;
  641. status = "okay";
  642. };
  643. &padctrl0_apsys { /* right-pinctrl */
  644. light-evb-padctrl0 {
  645. /*
  646. * Pin Configuration Node:
  647. * Format: <pin_id mux_node config>
  648. */
  649. pinctrl_uart0: uart0grp {
  650. thead,pins = <
  651. FM_UART0_TXD 0x0 0x72
  652. FM_UART0_RXD 0x0 0x72
  653. >;
  654. };
  655. pinctrl_spi0: spi0grp {
  656. thead,pins = <
  657. FM_SPI_CSN 0x3 0x20a
  658. FM_SPI_SCLK 0x0 0x20a
  659. FM_SPI_MISO 0x0 0x23a
  660. FM_SPI_MOSI 0x0 0x23a
  661. >;
  662. };
  663. pinctrl_qspi0: qspi0grp {
  664. thead,pins = <
  665. FM_QSPI0_SCLK 0x0 0x20f
  666. FM_QSPI0_CSN0 0x3 0x20f
  667. FM_QSPI0_CSN1 0x0 0x20f
  668. FM_QSPI0_D0_MOSI 0x0 0x23f
  669. FM_QSPI0_D1_MISO 0x0 0x23f
  670. FM_QSPI0_D2_WP 0x0 0x23f
  671. FM_QSPI0_D3_HOLD 0x0 0x23f
  672. >;
  673. };
  674. pinctrl_audio_i2s0: i2s0grp {
  675. thead,pins = <
  676. FM_QSPI0_SCLK 0x2 0x208
  677. FM_QSPI0_CSN0 0x2 0x238
  678. FM_QSPI0_CSN1 0x2 0x208
  679. FM_QSPI0_D0_MOSI 0x2 0x238
  680. FM_QSPI0_D1_MISO 0x2 0x238
  681. FM_QSPI0_D2_WP 0x2 0x238
  682. FM_QSPI0_D3_HOLD 0x2 0x238
  683. >;
  684. };
  685. pinctrl_pwm: pwmgrp {
  686. thead,pins = <
  687. FM_GPIO3_2 0x1 0x208 /* pwm0 */
  688. >;
  689. };
  690. };
  691. };
  692. &padctrl1_apsys { /* left-pinctrl */
  693. light-evb-padctrl1 {
  694. /*
  695. * Pin Configuration Node:
  696. * Format: <pin_id mux_node config>
  697. */
  698. pinctrl_uart3: uart3grp {
  699. thead,pins = <
  700. FM_UART3_TXD 0x0 0x72
  701. FM_UART3_RXD 0x0 0x72
  702. >;
  703. };
  704. pinctrl_uart4: uart4grp {
  705. thead,pins = <
  706. FM_UART4_TXD 0x0 0x72
  707. FM_UART4_RXD 0x0 0x72
  708. FM_UART4_CTSN 0x0 0x72
  709. FM_UART4_RTSN 0x0 0x72
  710. >;
  711. };
  712. pinctrl_qspi1: qspi1grp {
  713. thead,pins = <
  714. FM_QSPI1_SCLK 0x0 0x20a
  715. FM_QSPI1_CSN0 0x3 0x20a
  716. FM_QSPI1_D0_MOSI 0x0 0x23a
  717. FM_QSPI1_D1_MISO 0x0 0x23a
  718. FM_QSPI1_D2_WP 0x0 0x23a
  719. FM_QSPI1_D3_HOLD 0x0 0x23a
  720. >;
  721. };
  722. pinctrl_iso7816: iso7816grp {
  723. thead,pins = <
  724. FM_QSPI1_SCLK 0x1 0x208
  725. FM_QSPI1_D0_MOSI 0x1 0x238
  726. FM_QSPI1_D1_MISO 0x1 0x238
  727. FM_QSPI1_D2_WP 0x1 0x238
  728. FM_QSPI1_D3_HOLD 0x1 0x238
  729. >;
  730. };
  731. };
  732. };
  733. &padctrl_aosys {
  734. light-aon-padctrl {
  735. /*
  736. * Pin Configuration Node:
  737. * Format: <pin_id mux_node config>
  738. */
  739. pinctrl_audiopa1: audiopa1_grp {
  740. thead,pins = <
  741. FM_AUDIO_PA1 0x3 0x72
  742. >;
  743. };
  744. pinctrl_audiopa2: audiopa2_grp {
  745. thead,pins = <
  746. FM_AUDIO_PA2 0x0 0x72
  747. >;
  748. };
  749. pinctrl_volume: volume_grp {
  750. thead,pins = <
  751. FM_AOGPIO_11 0x0 0x208
  752. FM_AOGPIO_10 0x3 0x208
  753. >;
  754. };
  755. };
  756. };
  757. &i2c0 {
  758. clock-frequency = <400000>;
  759. status = "okay";
  760. };
  761. &i2c1 {
  762. clock-frequency = <400000>;
  763. status = "okay";
  764. };
  765. &i2c2 {
  766. clock-frequency = <400000>;
  767. status = "okay";
  768. };
  769. &i2c3 {
  770. clock-frequency = <400000>;
  771. status = "okay";
  772. };
  773. &i2c4 {
  774. clock-frequency = <400000>;
  775. status = "okay";
  776. };
  777. &isp0 {
  778. status = "okay";
  779. };
  780. &isp1 {
  781. status = "okay";
  782. };
  783. &isp_ry0 {
  784. status = "okay";
  785. };
  786. &dewarp {
  787. status = "okay";
  788. };
  789. &dec400_isp0 {
  790. status = "okay";
  791. };
  792. &dec400_isp1 {
  793. status = "okay";
  794. };
  795. &dec400_isp2 {
  796. status = "okay";
  797. };
  798. &bm_visys {
  799. status = "okay";
  800. };
  801. &bm_csi0 {
  802. status = "okay";
  803. };
  804. &bm_csi1 {
  805. status = "okay";
  806. };
  807. &bm_csi2 {
  808. status = "okay";
  809. };
  810. &vi_pre {
  811. vi_pre_irq_en = <1>;
  812. status = "okay";
  813. };
  814. &xtensa_dsp {
  815. status = "okay";
  816. };
  817. &xtensa_dsp0 {
  818. status = "okay";
  819. memory-region = <&dsp0_mem>;
  820. };
  821. &xtensa_dsp1 {
  822. status = "okay";
  823. memory-region = <&dsp1_mem>;
  824. };
  825. &vvcam_flash_led0{
  826. flash_led_name = "aw36413_aw36515";
  827. floodlight_i2c_bus = /bits/ 8 <2>;
  828. floodlight_en_pin = <&gpio1_porta 25 0>;
  829. //projection_i2c_bus = /bits/ 8 <2>;
  830. flash_led_touch_pin = <&gpio1_porta 27 0>; //flash led touch pin
  831. status = "okay";
  832. };
  833. &vvcam_sensor0 {
  834. sensor_name = "SC2310";
  835. sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
  836. sensor_regulator_timing_us = <70 50 20>;
  837. sensor_rst = <&gpio1_porta 16 0>;
  838. sensor_pdn_delay_us = <4000>; //powerdown pin / shutdown pin actived till I2C ready
  839. DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
  840. DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
  841. AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
  842. i2c_reg_width = /bits/ 8 <2>;
  843. i2c_data_width = /bits/ 8 <1>;
  844. i2c_addr = /bits/ 8 <0x30>;
  845. i2c_bus = /bits/ 8 <3>;
  846. status = "okay";
  847. };
  848. /*
  849. &vvcam_sensor0 {
  850. sensor_name = "IMX334";
  851. sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
  852. sensor_regulator_timing_us = <70 50 20>;
  853. sensor_rst = <&gpio1_porta 16 0>;
  854. sensor_pdn_delay_us = <1000>; //powerdown pin / shutdown pin actived till I2C ready
  855. DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
  856. DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
  857. AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
  858. i2c_reg_width = /bits/ 8 <2>;
  859. i2c_data_width = /bits/ 8 <1>;
  860. i2c_addr = /bits/ 8 <0x1a>;
  861. i2c_bus = /bits/ 8 <3>;
  862. status = "okay";
  863. };
  864. */
  865. &vvcam_sensor1 {
  866. sensor_name = "OV5693";
  867. i2c_bus = /bits/ 8 <3>;
  868. i2c_reg_width = /bits/ 8 <1>;
  869. i2c_data_width = /bits/ 8 <1>;
  870. status = "disabled";
  871. };
  872. &vvcam_sensor2 {
  873. sensor_name = "GC5035";
  874. sensor_regulators = "DOVDD18_SCAN", "DVDD12_SCAN", "AVDD28_SCAN";
  875. sensor_regulator_timing_us = <100 50 0>;
  876. sensor_pdn = <&gpio1_porta 30 0>; //powerdown pin / shutdown pin
  877. sensor_rst = <&gpio1_porta 29 0>;
  878. sensor_pdn_delay_us = <1000>; //powerdown pin / shutdown pin actived till I2C ready
  879. DOVDD18_SCAN-supply = <&soc_dovdd18_scan_reg>;
  880. DVDD12_SCAN-supply = <&soc_dvdd12_scan_reg>;
  881. AVDD28_SCAN-supply = <&soc_avdd28_scan_en_reg>;
  882. i2c_addr = /bits/ 8 <0x37>;
  883. i2c_bus = /bits/ 8 <4>;
  884. i2c_reg_width = /bits/ 8 <1>;
  885. i2c_data_width = /bits/ 8 <1>;
  886. status = "okay";
  887. };
  888. &vvcam_sensor3 {
  889. sensor_name = "SC2310";
  890. sensor_regulators = "DOVDD18_SCAN", "DVDD12_SCAN", "AVDD28_SCAN";
  891. sensor_regulator_timing_us = <70 50 20>;
  892. sensor_pdn = <&gpio1_porta 30 0>; //powerdown pin / shutdown pin
  893. sensor_rst = <&gpio1_porta 29 0>;
  894. sensor_pdn_delay_us = <4000>; //powerdown pin / shutdown pin actived till I2C ready
  895. DOVDD18_SCAN-supply = <&soc_dovdd18_scan_reg>;
  896. DVDD12_SCAN-supply = <&soc_dvdd12_scan_reg>;
  897. AVDD28_SCAN-supply = <&soc_avdd28_scan_en_reg>;
  898. i2c_bus = /bits/ 8 <4>;
  899. i2c_reg_width = /bits/ 8 <2>;
  900. i2c_data_width = /bits/ 8 <1>;
  901. i2c_addr = /bits/ 8 <0x30>;
  902. status = "okay";
  903. };
  904. &vvcam_sensor4 {
  905. sensor_name = "SC132GS";
  906. sensor_regulators = "DOVDD18_IR", "DVDD12_IR", "AVDD25_IR";
  907. sensor_regulator_timing_us = <70 1000 2000>;
  908. i2c_addr = /bits/ 8 <0x31>;
  909. sensor_rst = <&gpio1_porta 24 0>;
  910. sensor_pdn_delay_us = <2000>; //powerdown pin / shutdown pin actived till I2C ready
  911. DOVDD18_IR-supply = <&soc_dovdd18_ir_reg>;
  912. DVDD12_IR-supply = <&soc_dvdd12_ir_reg>;
  913. AVDD25_IR-supply = <&soc_avdd25_ir_reg>;
  914. i2c_reg_width = /bits/ 8 <2>;
  915. i2c_data_width = /bits/ 8 <1>;
  916. i2c_bus = /bits/ 8 <2>;
  917. status = "okay";
  918. };
  919. &vvcam_sensor5 {
  920. sensor_name = "OV12870";
  921. sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
  922. sensor_regulator_timing_us = <100 50 0>;
  923. sensor_rst = <&gpio1_porta 16 0>;
  924. sensor_pdn_delay_us = <60>; //powerdown pin / shutdown pin actived till I2C ready
  925. DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
  926. DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
  927. AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
  928. i2c_addr = /bits/ 8 <0x10>;
  929. i2c_reg_width = /bits/ 8 <2>;
  930. i2c_data_width = /bits/ 8 <1>;
  931. i2c_bus = /bits/ 8 <3>;
  932. status = "okay";
  933. };
  934. &vvcam_sensor6 {
  935. sensor_name = "GC02M1B";
  936. sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
  937. sensor_regulator_timing_us = <70 50 20>;
  938. sensor_rst = <&gpio1_porta 16 0>;
  939. sensor_pdn_delay_us = <1000>; //powerdown pin / shutdown pin actived till I2C ready
  940. DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
  941. DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
  942. AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
  943. i2c_reg_width = /bits/ 8 <1>;
  944. i2c_data_width = /bits/ 8 <1>;
  945. i2c_addr = /bits/ 8 <0x37>;
  946. i2c_bus = /bits/ 8 <3>;
  947. status = "okay";
  948. };
  949. &video0{
  950. vi_mem_pool_region = <2>; // vi_mem: framebuffer, region[2]
  951. channel0 {
  952. sensor0 {
  953. subdev_name = "vivcam";
  954. idx = <2>; //<2>=vivcam2 : gc5035
  955. csi_idx = <1>; //<1>=CSI2X2_B
  956. mode_idx = <3>;
  957. path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  958. };
  959. sensor1 {
  960. subdev_name = "vivcam";
  961. idx = <3>; //<3>=vivcam3 : sc2310
  962. csi_idx = <1>; //<1>=CSI2X2_B
  963. mode_idx = <1>;
  964. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  965. };
  966. isp {
  967. subdev_name = "isp";
  968. idx = <0>;
  969. path_type = "ISP_MI_PATH_MP";
  970. output {
  971. max_width = <1920>;
  972. max_height = <1088>;
  973. bit_per_pixel = <12>;
  974. frame_count = <3>;
  975. };
  976. };
  977. };
  978. channel1 {
  979. sensor0 {
  980. subdev_name = "vivcam";
  981. idx = <2>; //<2>=vivcam2 : gc5035
  982. csi_idx = <1>; //<1>=CSI2X2_B
  983. mode_idx = <3>;
  984. path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  985. };
  986. sensor1 {
  987. subdev_name = "vivcam";
  988. idx = <3>; //<3>=vivcam3 : sc2310
  989. csi_idx = <1>; //<1>=CSI2X2_B
  990. mode_idx = <1>;
  991. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  992. };
  993. isp {
  994. subdev_name = "isp";
  995. idx = <0>;
  996. path_type = "ISP_MI_PATH_SP";
  997. output {
  998. max_width = <1920>;
  999. max_height = <1088>;
  1000. bit_per_pixel = <12>;
  1001. frame_count = <3>;
  1002. };
  1003. };
  1004. };
  1005. channel2 {
  1006. sensor0 {
  1007. subdev_name = "vivcam";
  1008. idx = <2>; //<2>=vivcam2 : gc5035
  1009. csi_idx = <1>; //<1>=CSI2X2_B
  1010. mode_idx = <3>;
  1011. path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  1012. };
  1013. sensor1 {
  1014. subdev_name = "vivcam";
  1015. idx = <3>; //<3>=vivcam3 : sc2310
  1016. csi_idx = <1>; //<1>=CSI2X2_B
  1017. mode_idx = <1>;
  1018. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1019. };
  1020. isp {
  1021. subdev_name = "isp";
  1022. idx = <0>;
  1023. path_type = "ISP_MI_PATH_SP2_BP";
  1024. output {
  1025. max_width = <1920>;
  1026. max_height = <1088>;
  1027. bit_per_pixel = <12>;
  1028. frame_count = <3>;
  1029. };
  1030. };
  1031. };
  1032. };
  1033. &video1{
  1034. vi_mem_pool_region = <2>; // vi_mem: framebuffer, region[2]
  1035. channel0 {
  1036. sensor0 {
  1037. subdev_name = "vivcam";
  1038. idx = <2>; //<2>=vivcam2 : gc5035
  1039. csi_idx = <1>; //<1>=CSI2X2_B
  1040. mode_idx = <3>;
  1041. path_type = "SENSOR_1296x972_RAW10_LINER";
  1042. };
  1043. sensor1 {
  1044. subdev_name = "vivcam";
  1045. idx = <3>; //<3>=vivcam3 : sc2310
  1046. csi_idx = <1>; //<1>=CSI2X2_B
  1047. mode_idx = <1>;
  1048. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1049. };
  1050. isp {
  1051. subdev_name = "isp";
  1052. idx = <0>;
  1053. path_type = "ISP_MI_PATH_MP";
  1054. output {
  1055. max_width = <1920>;
  1056. max_height = <1088>;
  1057. bit_per_pixel = <12>;
  1058. frame_count = <3>;
  1059. };
  1060. };
  1061. dw {
  1062. subdev_name = "dw";
  1063. idx = <0>;
  1064. path_type = "DW_DWE_VSE0";
  1065. dw_dst_depth = <2>;
  1066. };
  1067. };
  1068. channel1 {
  1069. sensor0 {
  1070. subdev_name = "vivcam";
  1071. idx = <2>; //<2>=vivcam2 : gc5035
  1072. csi_idx = <1>; //<1>=CSI2X2_B
  1073. mode_idx = <3>;
  1074. path_type = "SENSOR_1296x972_RAW10_LINER";
  1075. };
  1076. sensor1 {
  1077. subdev_name = "vivcam";
  1078. idx = <3>; //<3>=vivcam3 : sc2310
  1079. csi_idx = <1>; //<1>=CSI2X2_B
  1080. mode_idx = <1>;
  1081. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1082. };
  1083. isp {
  1084. subdev_name = "isp";
  1085. idx = <0>;
  1086. path_type = "ISP_MI_PATH_MP";
  1087. output {
  1088. max_width = <1920>;
  1089. max_height = <1088>;
  1090. bit_per_pixel = <12>;
  1091. frame_count = <3>;
  1092. };
  1093. };
  1094. dw {
  1095. subdev_name = "dw";
  1096. idx = <0>;
  1097. path_type = "DW_DWE_VSE1";
  1098. dw_dst_depth = <2>;
  1099. };
  1100. };
  1101. channel2 {
  1102. sensor0 {
  1103. subdev_name = "vivcam";
  1104. idx = <2>; //<2>=vivcam2 : gc5035
  1105. csi_idx = <1>; //<1>=CSI2X2_B
  1106. mode_idx = <3>;
  1107. path_type = "SENSOR_1296x972_RAW10_LINER";
  1108. };
  1109. sensor1 {
  1110. subdev_name = "vivcam";
  1111. idx = <3>; //<3>=vivcam3 : sc2310
  1112. csi_idx = <1>; //<1>=CSI2X2_B
  1113. mode_idx = <1>;
  1114. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1115. };
  1116. isp {
  1117. subdev_name = "isp";
  1118. idx = <0>;
  1119. path_type = "ISP_MI_PATH_MP";
  1120. output {
  1121. max_width = <1920>;
  1122. max_height = <1088>;
  1123. bit_per_pixel = <12>;
  1124. frame_count = <3>;
  1125. };
  1126. };
  1127. dw {
  1128. subdev_name = "dw";
  1129. idx = <0>;
  1130. path_type = "DW_DWE_VSE2";
  1131. dw_dst_depth = <2>;
  1132. };
  1133. };
  1134. };
  1135. &video2{
  1136. vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
  1137. channel0 {
  1138. sensor0 {
  1139. subdev_name = "vivcam";
  1140. idx = <0>; //sc2310
  1141. csi_idx = <0>; //<0>=CSI2
  1142. mode_idx = <1>;
  1143. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1144. };
  1145. sensor1 {
  1146. subdev_name = "vivcam";
  1147. idx = <6>; //gc02m1b
  1148. csi_idx = <0>; //<0>=CSI2
  1149. mode_idx = <0>;
  1150. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1151. };
  1152. isp {
  1153. subdev_name = "isp";
  1154. idx = <1>;
  1155. path_type = "ISP_MI_PATH_MP";
  1156. output {
  1157. max_width = <1920>;
  1158. max_height = <1088>;
  1159. bit_per_pixel = <16>;
  1160. frame_count = <3>;
  1161. };
  1162. };
  1163. };
  1164. channel1 {
  1165. sensor0 {
  1166. subdev_name = "vivcam";
  1167. idx = <0>; //sc2310
  1168. csi_idx = <0>; //<0>=CSI2
  1169. mode_idx = <1>;
  1170. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1171. };
  1172. sensor1 {
  1173. subdev_name = "vivcam";
  1174. idx = <6>; //gc02m1b
  1175. csi_idx = <0>; //<0>=CSI2
  1176. mode_idx = <0>;
  1177. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1178. };
  1179. isp {
  1180. subdev_name = "isp";
  1181. idx = <1>;
  1182. path_type = "ISP_MI_PATH_SP";
  1183. output {
  1184. max_width = <1920>;
  1185. max_height = <1088>;
  1186. bit_per_pixel = <16>;
  1187. frame_count = <3>;
  1188. };
  1189. };
  1190. };
  1191. channel2 {
  1192. sensor0 {
  1193. subdev_name = "vivcam";
  1194. idx = <0>; //sc2310
  1195. csi_idx = <0>; //<0>=CSI2
  1196. mode_idx = <1>;
  1197. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1198. };
  1199. sensor1 {
  1200. subdev_name = "vivcam";
  1201. idx = <6>; //gc02m1b
  1202. csi_idx = <0>; //<0>=CSI2
  1203. mode_idx = <0>;
  1204. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1205. };
  1206. isp {
  1207. subdev_name = "isp";
  1208. idx = <1>;
  1209. path_type = "ISP_MI_PATH_SP2_BP";
  1210. output {
  1211. max_width = <1920>;
  1212. max_height = <1088>;
  1213. bit_per_pixel = <16>;
  1214. frame_count = <3>;
  1215. };
  1216. };
  1217. };
  1218. };
  1219. &video3{
  1220. vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
  1221. channel0 {
  1222. sensor0 {
  1223. subdev_name = "vivcam";
  1224. idx = <0>; //sc2310
  1225. csi_idx = <0>; //<0>=CSI2
  1226. mode_idx = <1>;
  1227. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1228. };
  1229. sensor1 {
  1230. subdev_name = "vivcam";
  1231. idx = <6>; //gc02m1b
  1232. csi_idx = <0>; //<0>=CSI2
  1233. mode_idx = <0>;
  1234. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1235. };
  1236. isp {
  1237. subdev_name = "isp";
  1238. idx = <1>;
  1239. path_type = "ISP_MI_PATH_MP";
  1240. output {
  1241. max_width = <1920>;
  1242. max_height = <1088>;
  1243. bit_per_pixel = <12>;
  1244. frame_count = <3>;
  1245. };
  1246. };
  1247. dw {
  1248. subdev_name = "dw";
  1249. idx = <0>;
  1250. path_type = "DW_DWE_VSE0";
  1251. dw_dst_depth = <2>;
  1252. };
  1253. };
  1254. channel1 {
  1255. sensor0 {
  1256. subdev_name = "vivcam";
  1257. idx = <0>; //sc2310
  1258. csi_idx = <0>; //<0>=CSI2
  1259. mode_idx = <1>;
  1260. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1261. };
  1262. sensor1 {
  1263. subdev_name = "vivcam";
  1264. idx = <6>; //gc02m1b
  1265. csi_idx = <0>; //<0>=CSI2
  1266. mode_idx = <0>;
  1267. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1268. };
  1269. isp {
  1270. subdev_name = "isp";
  1271. idx = <1>;
  1272. path_type = "ISP_MI_PATH_MP";
  1273. output {
  1274. max_width = <1920>;
  1275. max_height = <1088>;
  1276. bit_per_pixel = <12>;
  1277. frame_count = <3>;
  1278. };
  1279. };
  1280. dw {
  1281. subdev_name = "dw";
  1282. idx = <0>;
  1283. path_type = "DW_DWE_VSE1";
  1284. dw_dst_depth = <2>;
  1285. };
  1286. };
  1287. channel2 {
  1288. sensor0 {
  1289. subdev_name = "vivcam";
  1290. idx = <0>; //sc2310
  1291. csi_idx = <0>; //<0>=CSI2
  1292. mode_idx = <1>;
  1293. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1294. };
  1295. sensor1 {
  1296. subdev_name = "vivcam";
  1297. idx = <6>; //gc02m1b
  1298. csi_idx = <0>; //<0>=CSI2
  1299. mode_idx = <0>;
  1300. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1301. };
  1302. isp {
  1303. subdev_name = "isp";
  1304. idx = <1>;
  1305. path_type = "ISP_MI_PATH_MP";
  1306. output {
  1307. max_width = <1920>;
  1308. max_height = <1088>;
  1309. bit_per_pixel = <12>;
  1310. frame_count = <3>;
  1311. };
  1312. };
  1313. dw {
  1314. subdev_name = "dw";
  1315. idx = <0>;
  1316. path_type = "DW_DWE_VSE2";
  1317. dw_dst_depth = <2>;
  1318. };
  1319. };
  1320. };
  1321. &video4{
  1322. vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
  1323. channel0 {
  1324. sensor0 {
  1325. subdev_name = "vivcam";
  1326. idx = <0>; //sc2310
  1327. csi_idx = <0>; //<0>=CSI2
  1328. mode_idx = <1>;
  1329. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1330. };
  1331. sensor1 {
  1332. subdev_name = "vivcam";
  1333. idx = <6>; //gc02m1b
  1334. csi_idx = <0>; //<0>=CSI2
  1335. mode_idx = <0>;
  1336. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1337. };
  1338. isp {
  1339. subdev_name = "isp";
  1340. idx = <1>;
  1341. path_type = "ISP_MI_PATH_PP";
  1342. output {
  1343. max_width = <1920>;
  1344. max_height = <1088>;
  1345. bit_per_pixel = <12>;
  1346. frame_count = <3>;
  1347. };
  1348. };
  1349. dsp {
  1350. subdev_name = "dsp";
  1351. idx = <0>;
  1352. path_type = "DSP_PATH_ISP_RY";
  1353. output {
  1354. max_width = <1920>;
  1355. max_height = <1088>;
  1356. bit_per_pixel = <12>;
  1357. frame_count = <3>;
  1358. };
  1359. };
  1360. ry {
  1361. subdev_name = "ry";
  1362. idx = <0>;
  1363. path_type = "ISP_RY_MI_PATH_MP";
  1364. output {
  1365. max_width = <1920>;
  1366. max_height = <1088>;
  1367. bit_per_pixel = <12>;
  1368. frame_count = <3>;
  1369. };
  1370. };
  1371. };
  1372. channel1 {
  1373. sensor0 {
  1374. subdev_name = "vivcam";
  1375. idx = <0>; //sc2310
  1376. csi_idx = <0>; //<0>=CSI2
  1377. mode_idx = <1>;
  1378. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1379. };
  1380. sensor1 {
  1381. subdev_name = "vivcam";
  1382. idx = <6>; //gc02m1b
  1383. csi_idx = <0>; //<0>=CSI2
  1384. mode_idx = <0>;
  1385. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1386. };
  1387. isp {
  1388. subdev_name = "isp";
  1389. idx = <1>;
  1390. path_type = "ISP_MI_PATH_PP";
  1391. output {
  1392. max_width = <1920>;
  1393. max_height = <1088>;
  1394. bit_per_pixel = <12>;
  1395. frame_count = <3>;
  1396. };
  1397. };
  1398. dsp {
  1399. subdev_name = "dsp";
  1400. idx = <0>;
  1401. path_type = "DSP_PATH_ISP_RY";
  1402. output {
  1403. max_width = <1920>;
  1404. max_height = <1088>;
  1405. bit_per_pixel = <12>;
  1406. frame_count = <3>;
  1407. };
  1408. };
  1409. ry {
  1410. subdev_name = "ry";
  1411. idx = <0>;
  1412. path_type = "ISP_RY_MI_PATH_SP";
  1413. output {
  1414. max_width = <1920>;
  1415. max_height = <1088>;
  1416. bit_per_pixel = <12>;
  1417. frame_count = <3>;
  1418. };
  1419. };
  1420. };
  1421. channel2 {
  1422. sensor0 {
  1423. subdev_name = "vivcam";
  1424. idx = <0>; //sc2310
  1425. csi_idx = <0>; //<0>=CSI2
  1426. mode_idx = <1>;
  1427. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1428. };
  1429. sensor1 {
  1430. subdev_name = "vivcam";
  1431. idx = <6>; //gc02m1b
  1432. csi_idx = <0>; //<0>=CSI2
  1433. mode_idx = <0>;
  1434. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1435. };
  1436. isp {
  1437. subdev_name = "isp";
  1438. idx = <1>;
  1439. path_type = "ISP_MI_PATH_PP";
  1440. output {
  1441. max_width = <1920>;
  1442. max_height = <1088>;
  1443. bit_per_pixel = <12>;
  1444. frame_count = <3>;
  1445. };
  1446. };
  1447. dsp {
  1448. subdev_name = "dsp";
  1449. idx = <0>;
  1450. path_type = "DSP_PATH_ISP_RY";
  1451. output {
  1452. max_width = <1920>;
  1453. max_height = <1088>;
  1454. bit_per_pixel = <12>;
  1455. frame_count = <3>;
  1456. };
  1457. };
  1458. ry {
  1459. subdev_name = "ry";
  1460. idx = <0>;
  1461. path_type = "ISP_RY_MI_PATH_SP2_BP";
  1462. output {
  1463. max_width = <1920>;
  1464. max_height = <1088>;
  1465. bit_per_pixel = <12>;
  1466. frame_count = <3>;
  1467. };
  1468. };
  1469. };
  1470. };
  1471. &video5{
  1472. vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
  1473. channel0 {
  1474. sensor0 {
  1475. subdev_name = "vivcam";
  1476. idx = <0>; //sc2310
  1477. csi_idx = <0>; //<0>=CSI2
  1478. mode_idx = <1>;
  1479. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1480. };
  1481. sensor1 {
  1482. subdev_name = "vivcam";
  1483. idx = <6>; //gc02m1b
  1484. csi_idx = <0>; //<0>=CSI2
  1485. mode_idx = <0>;
  1486. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1487. };
  1488. isp {
  1489. subdev_name = "isp";
  1490. idx = <1>;
  1491. path_type = "ISP_MI_PATH_PP";
  1492. output {
  1493. max_width = <1920>;
  1494. max_height = <1088>;
  1495. bit_per_pixel = <12>;
  1496. frame_count = <3>;
  1497. };
  1498. };
  1499. dsp {
  1500. subdev_name = "dsp";
  1501. idx = <0>;
  1502. path_type = "DSP_PATH_ISP_RY";
  1503. output {
  1504. max_width = <1920>;
  1505. max_height = <1088>;
  1506. bit_per_pixel = <12>;
  1507. frame_count = <3>;
  1508. };
  1509. };
  1510. ry {
  1511. subdev_name = "ry";
  1512. idx = <0>;
  1513. path_type = "ISP_RY_MI_PATH_MP";
  1514. output {
  1515. max_width = <1920>;
  1516. max_height = <1088>;
  1517. bit_per_pixel = <12>;
  1518. frame_count = <3>;
  1519. };
  1520. };
  1521. dw {
  1522. subdev_name = "dw";
  1523. idx = <0>;
  1524. path_type = "DW_DWE_VSE0";
  1525. dw_dst_depth = <2>;
  1526. };
  1527. };
  1528. channel1 {
  1529. sensor0 {
  1530. subdev_name = "vivcam";
  1531. idx = <0>; //sc2310
  1532. csi_idx = <0>; //<0>=CSI2
  1533. mode_idx = <1>;
  1534. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1535. };
  1536. sensor1 {
  1537. subdev_name = "vivcam";
  1538. idx = <6>; //gc02m1b
  1539. csi_idx = <0>; //<0>=CSI2
  1540. mode_idx = <0>;
  1541. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1542. };
  1543. isp {
  1544. subdev_name = "isp";
  1545. idx = <1>;
  1546. path_type = "ISP_MI_PATH_PP";
  1547. output {
  1548. max_width = <1920>;
  1549. max_height = <1088>;
  1550. bit_per_pixel = <12>;
  1551. frame_count = <3>;
  1552. };
  1553. };
  1554. dsp {
  1555. subdev_name = "dsp";
  1556. idx = <0>;
  1557. path_type = "DSP_PATH_ISP_RY";
  1558. output {
  1559. max_width = <1920>;
  1560. max_height = <1088>;
  1561. bit_per_pixel = <12>;
  1562. frame_count = <3>;
  1563. };
  1564. };
  1565. ry {
  1566. subdev_name = "ry";
  1567. idx = <0>;
  1568. path_type = "ISP_RY_MI_PATH_MP";
  1569. output {
  1570. max_width = <1920>;
  1571. max_height = <1088>;
  1572. bit_per_pixel = <12>;
  1573. frame_count = <3>;
  1574. };
  1575. };
  1576. dw {
  1577. subdev_name = "dw";
  1578. idx = <0>;
  1579. path_type = "DW_DWE_VSE1";
  1580. dw_dst_depth = <2>;
  1581. };
  1582. };
  1583. channel2 {
  1584. sensor0 {
  1585. subdev_name = "vivcam";
  1586. idx = <0>; //sc2310
  1587. csi_idx = <0>; //<0>=CSI2
  1588. mode_idx = <1>;
  1589. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1590. };
  1591. sensor1 {
  1592. subdev_name = "vivcam";
  1593. idx = <6>; //gc02m1b
  1594. csi_idx = <0>; //<0>=CSI2
  1595. mode_idx = <0>;
  1596. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1597. };
  1598. isp {
  1599. subdev_name = "isp";
  1600. idx = <1>;
  1601. path_type = "ISP_MI_PATH_PP";
  1602. output {
  1603. max_width = <1920>;
  1604. max_height = <1088>;
  1605. bit_per_pixel = <12>;
  1606. frame_count = <3>;
  1607. };
  1608. };
  1609. dsp {
  1610. subdev_name = "dsp";
  1611. idx = <0>;
  1612. path_type = "DSP_PATH_ISP_RY";
  1613. output {
  1614. max_width = <1920>;
  1615. max_height = <1088>;
  1616. bit_per_pixel = <12>;
  1617. frame_count = <3>;
  1618. };
  1619. };
  1620. ry {
  1621. subdev_name = "ry";
  1622. idx = <0>;
  1623. path_type = "ISP_RY_MI_PATH_MP";
  1624. output {
  1625. max_width = <1920>;
  1626. max_height = <1088>;
  1627. bit_per_pixel = <12>;
  1628. frame_count = <3>;
  1629. };
  1630. };
  1631. dw {
  1632. subdev_name = "dw";
  1633. idx = <0>;
  1634. path_type = "DW_DWE_VSE2";
  1635. dw_dst_depth = <2>;
  1636. };
  1637. };
  1638. };
  1639. &video6{
  1640. vi_mem_pool_region = <1>; // vi_mem: framebuffer, region[1]
  1641. channel0 {
  1642. sensor0 {
  1643. subdev_name = "vivcam";
  1644. idx = <4>; //sc132gs
  1645. csi_idx = <2>; //<2>=CSI2X2_A
  1646. flash_led_idx = <0>;
  1647. mode_idx = <0>;
  1648. path_type = "SENSOR_1080X1280_30FPS_RAW10_LINER";
  1649. };
  1650. dsp{
  1651. output {
  1652. max_width = <1080>;
  1653. max_height = <1280>;
  1654. bit_per_pixel = <16>;
  1655. frame_count = <3>;
  1656. };
  1657. };
  1658. };
  1659. channel1 {
  1660. sensor0 {
  1661. subdev_name = "vivcam";
  1662. idx = <4>; //sc132gs
  1663. csi_idx = <2>; //<2>=CSI2X2_A
  1664. flash_led_idx = <0>;
  1665. mode_idx = <0>;
  1666. path_type = "SENSOR_1080X1280_30FPS_RAW10_LINER";
  1667. };
  1668. dsp{
  1669. output {
  1670. max_width = <1080>;
  1671. max_height = <1280>;
  1672. bit_per_pixel = <16>;
  1673. frame_count = <3>;
  1674. };
  1675. };
  1676. };
  1677. };
  1678. &video7{
  1679. channel0 {
  1680. sensor0 {
  1681. subdev_name = "vivcam";
  1682. idx = <2>; //<2>=vivcam2 : gc5035
  1683. csi_idx = <1>; //<1>=CSI2X2_B
  1684. mode_idx = <1>;
  1685. path_type = "SENSOR_1080P_RAW10_LINER";
  1686. };
  1687. sensor1 {
  1688. subdev_name = "vivcam";
  1689. idx = <3>; //<3>=vivcam3 : sc2310
  1690. csi_idx = <1>; //<1>=CSI2X2_B
  1691. mode_idx = <1>;
  1692. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1693. };
  1694. isp {
  1695. subdev_name = "isp";
  1696. idx = <0>;
  1697. path_type = "ISP_MI_PATH_PP";
  1698. output {
  1699. max_width = <1920>;
  1700. max_height = <1088>;
  1701. bit_per_pixel = <12>;
  1702. frame_count = <3>;
  1703. };
  1704. };
  1705. dsp {
  1706. subdev_name = "dsp";
  1707. idx = <1>;
  1708. path_type = "DSP_PATH_ISP_RY";
  1709. output {
  1710. max_width = <1920>;
  1711. max_height = <1088>;
  1712. bit_per_pixel = <12>;
  1713. frame_count = <3>;
  1714. };
  1715. };
  1716. ry {
  1717. subdev_name = "ry";
  1718. idx = <0>;
  1719. path_type = "ISP_RY_MI_PATH_MP";
  1720. output {
  1721. max_width = <1920>;
  1722. max_height = <1088>;
  1723. bit_per_pixel = <12>;
  1724. frame_count = <3>;
  1725. };
  1726. };
  1727. dw {
  1728. subdev_name = "dw";
  1729. idx = <0>;
  1730. path_type = "DW_DWE_VSE0";
  1731. dw_dst_depth = <2>;
  1732. };
  1733. };
  1734. channel1 {
  1735. sensor0 {
  1736. subdev_name = "vivcam";
  1737. idx = <2>; //<2>=vivcam2 : gc5035
  1738. csi_idx = <1>; //<1>=CSI2X2_B
  1739. mode_idx = <3>;
  1740. path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  1741. };
  1742. sensor1 {
  1743. subdev_name = "vivcam";
  1744. idx = <3>; //<3>=vivcam3 : sc2310
  1745. csi_idx = <1>; //<1>=CSI2X2_B
  1746. mode_idx = <1>;
  1747. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1748. };
  1749. isp {
  1750. subdev_name = "isp";
  1751. idx = <0>;
  1752. path_type = "ISP_MI_PATH_PP";
  1753. output {
  1754. max_width = <1920>;
  1755. max_height = <1088>;
  1756. bit_per_pixel = <12>;
  1757. frame_count = <3>;
  1758. };
  1759. };
  1760. dsp {
  1761. subdev_name = "dsp";
  1762. idx = <1>;
  1763. path_type = "DSP_PATH_ISP_RY";
  1764. output {
  1765. max_width = <1920>;
  1766. max_height = <1088>;
  1767. bit_per_pixel = <12>;
  1768. frame_count = <3>;
  1769. };
  1770. };
  1771. ry {
  1772. subdev_name = "ry";
  1773. idx = <0>;
  1774. path_type = "ISP_RY_MI_PATH_MP";
  1775. output {
  1776. max_width = <1920>;
  1777. max_height = <1088>;
  1778. bit_per_pixel = <12>;
  1779. frame_count = <3>;
  1780. };
  1781. };
  1782. dw {
  1783. subdev_name = "dw";
  1784. idx = <0>;
  1785. path_type = "DW_DWE_VSE1";
  1786. dw_dst_depth = <2>;
  1787. };
  1788. };
  1789. channel2 {
  1790. sensor0 {
  1791. subdev_name = "vivcam";
  1792. idx = <2>; //<2>=vivcam2 : gc5035
  1793. csi_idx = <1>; //<1>=CSI2X2_B
  1794. mode_idx = <3>;
  1795. path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  1796. };
  1797. sensor1 {
  1798. subdev_name = "vivcam";
  1799. idx = <3>; //<3>=vivcam3 : sc2310
  1800. csi_idx = <1>; //<1>=CSI2X2_B
  1801. mode_idx = <1>;
  1802. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1803. };
  1804. isp {
  1805. subdev_name = "isp";
  1806. idx = <0>;
  1807. path_type = "ISP_MI_PATH_PP";
  1808. output {
  1809. max_width = <1920>;
  1810. max_height = <1088>;
  1811. bit_per_pixel = <12>;
  1812. frame_count = <3>;
  1813. };
  1814. };
  1815. dsp {
  1816. subdev_name = "dsp";
  1817. idx = <1>;
  1818. path_type = "DSP_PATH_ISP_RY";
  1819. output {
  1820. max_width = <1920>;
  1821. max_height = <1088>;
  1822. bit_per_pixel = <12>;
  1823. frame_count = <3>;
  1824. };
  1825. };
  1826. ry {
  1827. subdev_name = "ry";
  1828. idx = <0>;
  1829. path_type = "ISP_RY_MI_PATH_MP";
  1830. output {
  1831. max_width = <1920>;
  1832. max_height = <1088>;
  1833. bit_per_pixel = <12>;
  1834. frame_count = <3>;
  1835. };
  1836. };
  1837. dw {
  1838. subdev_name = "dw";
  1839. idx = <0>;
  1840. path_type = "DW_DWE_VSE2";
  1841. dw_dst_depth = <2>;
  1842. };
  1843. };
  1844. };
  1845. &video8{
  1846. vi_mem_pool_region = <1>; // vi_mem: framebuffer, region[1]
  1847. channel0 {
  1848. sensor0 {
  1849. subdev_name = "vivcam";
  1850. idx = <2>; //<2>=vivcam2 : gc5035
  1851. csi_idx = <1>; //<1>=CSI2X2_B
  1852. mode_idx = <3>;
  1853. path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  1854. };
  1855. sensor1 {
  1856. subdev_name = "vivcam";
  1857. idx = <3>; //<3>=vivcam3 : sc2310
  1858. csi_idx = <1>; //<1>=CSI2X2_B
  1859. mode_idx = <1>;
  1860. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1861. };
  1862. dsp {
  1863. subdev_name = "dsp";
  1864. idx = <0>;
  1865. path_type = "DSP_PATH_VIPRE_DDR";
  1866. output {
  1867. max_width = <1920>;
  1868. max_height = <1088>;
  1869. bit_per_pixel = <12>;
  1870. frame_count = <3>;
  1871. };
  1872. };
  1873. };
  1874. };
  1875. &video9{
  1876. channel0 {
  1877. sensor0 {
  1878. subdev_name = "vivcam";
  1879. idx = <4>; //sc132gs
  1880. csi_idx = <2>; //<2>=CSI2X2_A
  1881. mode_idx = <0>;
  1882. path_type = "SENSOR_1080X1280_30FPS_RAW10_LINER";
  1883. };
  1884. dsp{
  1885. output {
  1886. max_width = <1080>;
  1887. max_height = <1280>;
  1888. bit_per_pixel = <16>;
  1889. frame_count = <3>;
  1890. };
  1891. };
  1892. };
  1893. };
  1894. &video10{ // TUNINGTOOL
  1895. channel0 {
  1896. sensor0 {
  1897. subdev_name = "vivcam";
  1898. idx = <2>; //<2>=vivcam2 : gc5035
  1899. csi_idx = <1>; //<1>=CSI2X2_B
  1900. mode_idx = <1>;
  1901. path_type = "SENSOR_1080P_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  1902. skip_init = <1>;
  1903. };
  1904. sensor1 {
  1905. subdev_name = "vivcam";
  1906. idx = <3>; //<3>=vivcam3 : sc2310
  1907. csi_idx = <1>; //<1>=CSI2X2_B
  1908. mode_idx = <1>;
  1909. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1910. skip_init = <1>;
  1911. };
  1912. };
  1913. };
  1914. &video11{
  1915. channel0 {
  1916. channel_id = <0>;
  1917. status = "okay";
  1918. sensor0 {
  1919. subdev_name = "vivcam";
  1920. idx = <4>; //sc132gs
  1921. csi_idx = <2>; //<2>=CSI2X2_A
  1922. flash_led_idx = <0>;
  1923. mode_idx = <0>;
  1924. path_type = "SENSOR_1080X1280_30FPS_RAW10_LINER";
  1925. };
  1926. isp {
  1927. subdev_name = "isp";
  1928. idx = <0>;
  1929. path_type = "ISP_MI_PATH_MP";
  1930. output {
  1931. max_width = <1920>;
  1932. max_height = <1088>;
  1933. bit_per_pixel = <12>;
  1934. frame_count = <3>;
  1935. };
  1936. };
  1937. };
  1938. };
  1939. &video12{ // TUNINGTOOL
  1940. channel0 { // CSI2
  1941. sensor0 {
  1942. subdev_name = "vivcam";
  1943. idx = <0>; //sc2310
  1944. csi_idx = <0>; //<0>=CSI2
  1945. mode_idx = <1>;
  1946. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1947. skip_init = <1>;
  1948. };
  1949. sensor1 {
  1950. subdev_name = "vivcam";
  1951. idx = <6>; //gc02m1b
  1952. csi_idx = <0>; //<0>=CSI2
  1953. mode_idx = <0>;
  1954. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1955. skip_init = <1>;
  1956. };
  1957. };
  1958. };
  1959. &video14{
  1960. vi_mem_pool_region = <2>; // vi_mem: framebuffer, region[0]
  1961. status = "okay";
  1962. channel0 {
  1963. channel_id = <0>;
  1964. status = "okay";
  1965. sensor0 {
  1966. subdev_name = "vivcam";
  1967. idx = <4>; //sc132gs
  1968. csi_idx = <2>; //<2>=CSI2X2_A
  1969. flash_led_idx = <0>;
  1970. mode_idx = <0>;
  1971. path_type = "SENSOR_1080X1280_30FPS_RAW10_LINER";
  1972. };
  1973. dma {
  1974. subdev_name = "vipre";
  1975. idx = <0>;
  1976. path_type = "VIPRE_CSI2_ISP1";
  1977. };
  1978. isp {
  1979. subdev_name = "isp";
  1980. idx = <1>;
  1981. path_type = "ISP_MI_MCM_WR0";
  1982. output {
  1983. max_width = <1080>;
  1984. max_height = <1280>;
  1985. bit_per_pixel = <16>;
  1986. frame_count = <3>;
  1987. };
  1988. };
  1989. };
  1990. };
  1991. &video15{
  1992. status = "okay";
  1993. //vi_mem_pool_region = <0>;
  1994. channel0 {
  1995. channel_id = <0>;
  1996. status = "okay";
  1997. sensor0 {
  1998. subdev_name = "vivcam";
  1999. idx = <0>; //<0>=vivcam0 :2310
  2000. csi_idx = <0>; //<0>=CSI2
  2001. flash_led_idx = <0>;
  2002. mode_idx = <1>;
  2003. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  2004. };
  2005. dma {
  2006. subdev_name = "vipre";
  2007. idx = <0>;
  2008. path_type = "VIPRE_CSI0_DDR";
  2009. };
  2010. };
  2011. };
  2012. &trng {
  2013. status = "disabled";
  2014. };
  2015. &eip_28 {
  2016. status = "okay";
  2017. };
  2018. &vdec {
  2019. status = "okay";
  2020. };
  2021. &venc {
  2022. status = "okay";
  2023. };
  2024. &isp_venc_shake {
  2025. status = "okay";
  2026. };
  2027. &vidmem {
  2028. status = "okay";
  2029. memory-region = <&vi_mem>;
  2030. };
  2031. &gpu {
  2032. status = "okay";
  2033. };
  2034. &npu {
  2035. vha_clk_rate = <1000000000>;
  2036. status = "okay";
  2037. };
  2038. &fce {
  2039. memory-region = <&facelib_mem>;
  2040. status = "okay";
  2041. };
  2042. &dpu_enc0 {
  2043. status = "okay";
  2044. ports {
  2045. /* output */
  2046. port@1 {
  2047. reg = <1>;
  2048. enc0_out: endpoint {
  2049. remote-endpoint = <&dsi0_in>;
  2050. };
  2051. };
  2052. };
  2053. };
  2054. &dpu_enc1 {
  2055. ports {
  2056. /delete-node/ port@0;
  2057. };
  2058. };
  2059. &dpu {
  2060. status = "okay";
  2061. };
  2062. &dsi0 {
  2063. status = "okay";
  2064. };
  2065. &dhost_0 {
  2066. ports {
  2067. #address-cells = <1>;
  2068. #size-cells = <0>;
  2069. port@0 {
  2070. reg = <0>;
  2071. dsi0_in: endpoint {
  2072. remote-endpoint = <&enc0_out>;
  2073. };
  2074. };
  2075. port@1 {
  2076. reg = <1>;
  2077. dsi0_out: endpoint {
  2078. remote-endpoint = <&panel0_in>;
  2079. };
  2080. };
  2081. };
  2082. panel0: panel0@0 {
  2083. compatible = "txd,dy800qwxpab";
  2084. reg = <0>;
  2085. backlight = <&lcd0_backlight>;
  2086. reset-gpio = <&gpio1_porta 5 1>; /* active low */
  2087. vdd1v8-supply = <&soc_vdd18_lcd0_en_reg>;
  2088. vspn5v7-supply = <&soc_lcd0_bias_en_reg>;
  2089. port {
  2090. panel0_in: endpoint {
  2091. remote-endpoint = <&dsi0_out>;
  2092. };
  2093. };
  2094. };
  2095. };
  2096. &disp1_out {
  2097. remote-endpoint = <&hdmi_tx_in>;
  2098. };
  2099. &hdmi_tx {
  2100. status = "okay";
  2101. port@0 {
  2102. /* input */
  2103. hdmi_tx_in: endpoint {
  2104. remote-endpoint = <&disp1_out>;
  2105. };
  2106. };
  2107. };
  2108. &lightsound {
  2109. status = "okay";
  2110. simple-audio-card,dai-link@0 { /* I2S - AUDIO SYS CODEC 8156*/
  2111. reg = <0>;
  2112. format = "i2s";
  2113. cpu {
  2114. sound-dai = <&i2s1 0>;
  2115. };
  2116. codec {
  2117. sound-dai = <&es8156_audio_codec>;
  2118. };
  2119. };
  2120. simple-audio-card,dai-link@1 { /* I2S - AUDIO SYS CODEC 7210*/
  2121. reg = <1>;
  2122. format = "i2s";
  2123. cpu {
  2124. sound-dai = <&i2s3 0>;
  2125. };
  2126. codec {
  2127. sound-dai = <&es7210_audio_codec>;
  2128. };
  2129. };
  2130. simple-audio-card,dai-link@2 { /* I2S - HDMI */
  2131. reg = <2>;
  2132. format = "i2s";
  2133. cpu {
  2134. sound-dai = <&light_i2s 1>;
  2135. };
  2136. codec {
  2137. sound-dai = <&dummy_codec 2>;
  2138. };
  2139. };
  2140. };
  2141. &light_i2s {
  2142. status = "okay";
  2143. };
  2144. &i2s0 {
  2145. status = "okay";
  2146. };
  2147. &i2s1 {
  2148. status = "okay";
  2149. };
  2150. &i2s3 {
  2151. status = "okay";
  2152. };
  2153. &cpus {
  2154. c910_0: cpu@0 {
  2155. operating-points = <
  2156. /* kHz uV */
  2157. 300000 600000
  2158. 800000 700000
  2159. 1500000 800000
  2160. >;
  2161. light,dvddm-operating-points = <
  2162. /* kHz uV */
  2163. 300000 800000
  2164. 800000 800000
  2165. 1500000 800000
  2166. >;
  2167. };
  2168. c910_1: cpu@1 {
  2169. operating-points = <
  2170. /* kHz uV */
  2171. 300000 600000
  2172. 800000 700000
  2173. 1500000 800000
  2174. >;
  2175. light,dvddm-operating-points = <
  2176. /* kHz uV */
  2177. 300000 800000
  2178. 800000 800000
  2179. 1500000 800000
  2180. >;
  2181. };
  2182. c910_2: cpu@2 {
  2183. operating-points = <
  2184. /* kHz uV */
  2185. 300000 600000
  2186. 800000 700000
  2187. 1500000 800000
  2188. >;
  2189. light,dvddm-operating-points = <
  2190. /* kHz uV */
  2191. 300000 800000
  2192. 800000 800000
  2193. 1500000 800000
  2194. >;
  2195. };
  2196. c910_3: cpu@3 {
  2197. operating-points = <
  2198. /* kHz uV */
  2199. 300000 600000
  2200. 800000 700000
  2201. 1500000 800000
  2202. >;
  2203. light,dvddm-operating-points = <
  2204. /* kHz uV */
  2205. 300000 800000
  2206. 800000 800000
  2207. 1500000 800000
  2208. >;
  2209. };
  2210. };