light-a-val.dts 45 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
  4. */
  5. /dts-v1/;
  6. #include "light.dtsi"
  7. #include <dt-bindings/input/linux-event-codes.h>
  8. #include <dt-bindings/gpio/gpio.h>
  9. #include "light-vi-devices.dtsi"
  10. / {
  11. model = "T-HEAD Light val board";
  12. compatible = "thead,light-val", "thead,light";
  13. chosen {
  14. bootargs = "console=ttyS0,115200 crashkernel=256M-:128M earlycon clk_ignore_unused sram=0xffe0000000,0x180000";
  15. stdout-path = "serial0:115200n8";
  16. };
  17. leds {
  18. compatible = "gpio-leds";
  19. led0 {
  20. label = "SYS_STATUS";
  21. gpios = <&gpio1_porta 15 0>; /* GPIO_ACTIVE_HIGH: 0 */
  22. default-state = "off";
  23. };
  24. };
  25. lcd0_backlight: pwm-backlight@0 {
  26. compatible = "pwm-backlight";
  27. pwms = <&pwm 0 5000000>;
  28. brightness-levels = <0 4 8 16 32 64 128 255>;
  29. default-brightness-level = <7>;
  30. };
  31. lcd1_backlight: pwm-backlight@1 {
  32. compatible = "pwm-backlight";
  33. pwms = <&pwm 1 5000000>;
  34. brightness-levels = <0 4 8 16 32 64 128 255>;
  35. default-brightness-level = <7>;
  36. };
  37. light_iopmp: iopmp {
  38. compatible = "thead,light-iopmp";
  39. /* config#1: multiple valid regions */
  40. iopmp_emmc: IOPMP_EMMC {
  41. regions = <0x000000 0x100000>,
  42. <0x100000 0x200000>;
  43. attr = <0xFFFFFFFF>;
  44. dummy_slave= <0x800000>;
  45. };
  46. /* config#2: iopmp bypass */
  47. iopmp_sdio0: IOPMP_SDIO0 {
  48. bypass_en;
  49. };
  50. /* config#3: iopmp default region set */
  51. iopmp_sdio1: IOPMP_SDIO1 {
  52. attr = <0xFFFFFFFF>;
  53. is_default_region;
  54. };
  55. iopmp_usb0: IOPMP_USB0 {
  56. attr = <0xFFFFFFFF>;
  57. is_default_region;
  58. };
  59. iopmp_ao: IOPMP_AO {
  60. is_default_region;
  61. };
  62. iopmp_aud: IOPMP_AUD {
  63. is_default_region;
  64. };
  65. iopmp_chip_dbg: IOPMP_CHIP_DBG {
  66. is_default_region;
  67. };
  68. iopmp_eip120i: IOPMP_EIP120I {
  69. is_default_region;
  70. };
  71. iopmp_eip120ii: IOPMP_EIP120II {
  72. is_default_region;
  73. };
  74. iopmp_eip120iii: IOPMP_EIP120III {
  75. is_default_region;
  76. };
  77. iopmp_isp0: IOPMP_ISP0 {
  78. is_default_region;
  79. };
  80. iopmp_isp1: IOPMP_ISP1 {
  81. is_default_region;
  82. };
  83. iopmp_dw200: IOPMP_DW200 {
  84. is_default_region;
  85. };
  86. iopmp_vipre: IOPMP_VIPRE {
  87. is_default_region;
  88. };
  89. iopmp_venc: IOPMP_VENC {
  90. is_default_region;
  91. };
  92. iopmp_vdec: IOPMP_VDEC {
  93. is_default_region;
  94. };
  95. iopmp_g2d: IOPMP_G2D {
  96. is_default_region;
  97. };
  98. iopmp_fce: IOPMP_FCE {
  99. is_default_region;
  100. };
  101. iopmp_npu: IOPMP_NPU {
  102. is_default_region;
  103. };
  104. iopmp0_dpu: IOPMP0_DPU {
  105. bypass_en;
  106. };
  107. iopmp1_dpu: IOPMP1_DPU {
  108. bypass_en;
  109. };
  110. iopmp_gpu: IOPMP_GPU {
  111. is_default_region;
  112. };
  113. iopmp_gmac1: IOPMP_GMAC1 {
  114. is_default_region;
  115. };
  116. iopmp_gmac2: IOPMP_GMAC2 {
  117. is_default_region;
  118. };
  119. iopmp_dmac: IOPMP_DMAC {
  120. is_default_region;
  121. };
  122. iopmp_tee_dmac: IOPMP_TEE_DMAC {
  123. is_default_region;
  124. };
  125. iopmp_dsp0: IOPMP_DSP0 {
  126. is_default_region;
  127. };
  128. iopmp_dsp1: IOPMP_DSP1 {
  129. is_default_region;
  130. };
  131. };
  132. mbox_910t_client1: mbox_910t_client1 {
  133. compatible = "thead,light-mbox-client";
  134. mbox-names = "902";
  135. mboxes = <&mbox_910t 1 0>;
  136. status = "disabled";
  137. };
  138. mbox_910t_client2: mbox_910t_client2 {
  139. compatible = "thead,light-mbox-client";
  140. mbox-names = "906";
  141. mboxes = <&mbox_910t 2 0>;
  142. status = "disabled";
  143. };
  144. lightsound: lightsound@1 {
  145. compatible = "simple-audio-card";
  146. simple-audio-card,name = "Light-Sound-Card";
  147. #address-cells = <1>;
  148. #size-cells = <0>;
  149. status = "disabled";
  150. };
  151. dummy_codec: dummy_codec {
  152. #sound-dai-cells = <1>;
  153. compatible = "linux,bt-sco";
  154. status = "okay";
  155. };
  156. reg_vref_1v8: regulator-adc-verf {
  157. compatible = "regulator-fixed";
  158. regulator-name = "vref-1v8";
  159. regulator-min-microvolt = <1800000>;
  160. regulator-max-microvolt = <1800000>;
  161. status = "okay";
  162. };
  163. reg_tp_pwr_en: regulator-pwr-en {
  164. compatible = "regulator-fixed";
  165. regulator-name = "PWR_EN";
  166. regulator-min-microvolt = <2800000>;
  167. regulator-max-microvolt = <2800000>;
  168. gpio = <&pcal6408ahk_a 3 1>;
  169. enable-active-high;
  170. regulator-always-on;
  171. };
  172. reg_tp1_pwr_en: regulator-tp1-pwr-en {
  173. compatible = "regulator-fixed";
  174. regulator-name = "PWR_EN";
  175. regulator-min-microvolt = <2800000>;
  176. regulator-max-microvolt = <2800000>;
  177. gpio = <&pcal6408ahk_a 6 1>;
  178. enable-active-high;
  179. regulator-always-on;
  180. };
  181. lcd0_1v8: regulator-lcd0-vdd18 {
  182. compatible = "regulator-fixed";
  183. regulator-name = "lcd0_en";
  184. regulator-min-microvolt = <1800000>;
  185. regulator-max-microvolt = <1800000>;
  186. gpio = <&pcal6408ahk_a 2 0>;
  187. enable-active-high;
  188. };
  189. lcd0_5v7: regulator-lcd0-vspn57 {
  190. compatible = "regulator-fixed";
  191. regulator-name = "lcd0_bias_en";
  192. regulator-min-microvolt = <5700000>;
  193. regulator-max-microvolt = <5700000>;
  194. gpio = <&pcal6408ahk_a 4 0>;
  195. enable-active-high;
  196. };
  197. lcd1_1v8: regulator-lcd1-vdd18 {
  198. compatible = "regulator-fixed";
  199. regulator-name = "lcd1_en";
  200. regulator-min-microvolt = <1800000>;
  201. regulator-max-microvolt = <1800000>;
  202. gpio = <&pcal6408ahk_a 5 0>;
  203. enable-active-high;
  204. };
  205. lcd1_5v7: regulator-lcd1-vspn57 {
  206. compatible = "regulator-fixed";
  207. regulator-name = "lcd1_bias_en";
  208. regulator-min-microvolt = <5700000>;
  209. regulator-max-microvolt = <5700000>;
  210. gpio = <&pcal6408ahk_a 7 0>;
  211. enable-active-high;
  212. };
  213. wcn_wifi: wireless-wlan {
  214. compatible = "wlan-platdata";
  215. clock-names = "clk_wifi";
  216. ref-clock-frequency = <24000000>;
  217. keep_wifi_power_on;
  218. pinctrl-names = "default";
  219. wifi_chip_type = "rtl8723ds";
  220. WIFI,poweren_gpio = <&gpio2_porta 26 0>;
  221. WIFI,reset_n = <&gpio2_porta 28 0>;
  222. status = "disabled";
  223. };
  224. wcn_bt: wireless-bluetooth {
  225. compatible = "bluetooth-platdata";
  226. pinctrl-names = "default", "rts_gpio";
  227. BT,power_gpio = <&gpio2_porta 29 0>;
  228. status = "disabled";
  229. };
  230. gpio_keys: gpio_keys{
  231. compatible = "gpio-keys";
  232. pinctrl-0 = <&pinctrl_volume>;
  233. pinctrl-names = "default";
  234. status = "disabled";
  235. key-volumedown {
  236. label = "Volume Down Key";
  237. linux,code = <KEY_1>;
  238. debounce-interval = <2>;
  239. gpios = <&ao_gpio_porta 4 GPIO_ACTIVE_LOW>;
  240. };
  241. key-volumeup {
  242. label = "Volume Up Key";
  243. linux,code = <KEY_2>;
  244. debounce-interval = <2>;
  245. gpios = <&ao_gpio_porta 5 GPIO_ACTIVE_LOW>;
  246. };
  247. };
  248. aon {
  249. compatible = "thead,light-aon";
  250. mbox-names = "aon";
  251. mboxes = <&mbox_910t 1 0>;
  252. status = "okay";
  253. pd: light-aon-pd {
  254. compatible = "thead,light-aon-pd";
  255. #power-domain-cells = <1>;
  256. };
  257. aon_reg_dialog: light-dialog-reg {
  258. compatible = "thead,light-dialog-pmic";
  259. status = "okay";
  260. dvdd_cpu_reg: appcpu_dvdd {
  261. regulator-name = "appcpu_dvdd";
  262. regulator-min-microvolt = <300000>;
  263. regulator-max-microvolt = <1570000>;
  264. regulator-boot-on;
  265. regulator-always-on;
  266. };
  267. dvddm_cpu_reg: appcpu_dvddm {
  268. regulator-name = "appcpu_dvddm";
  269. regulator-min-microvolt = <300000>;
  270. regulator-max-microvolt = <1570000>;
  271. regulator-boot-on;
  272. regulator-always-on;
  273. };
  274. soc_dvdd18_aon_reg: soc_dvdd18_aon {
  275. regulator-name = "soc_dvdd18_aon";
  276. regulator-boot-on;
  277. regulator-always-on;
  278. };
  279. soc_avdd33_usb3_reg: soc_avdd33_usb3 {
  280. regulator-name = "soc_avdd33_usb3";
  281. regulator-boot-on;
  282. regulator-always-on;
  283. };
  284. soc_dvdd08_aon_reg: soc_dvdd08_aon {
  285. regulator-name = "soc_dvdd08_aon";
  286. regulator-boot-on;
  287. regulator-always-on;
  288. };
  289. soc_dvdd08_ddr_reg: soc_dvdd08_ddr {
  290. regulator-name = "soc_dvdd08_ddr";
  291. regulator-boot-on;
  292. regulator-always-on;
  293. };
  294. soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 {
  295. regulator-name = "soc_vdd_ddr_1v8";
  296. regulator-boot-on;
  297. regulator-always-on;
  298. };
  299. soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 {
  300. regulator-name = "soc_vdd_ddr_1v1";
  301. regulator-boot-on;
  302. regulator-always-on;
  303. };
  304. soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 {
  305. regulator-name = "soc_vdd_ddr_0v6";
  306. regulator-boot-on;
  307. regulator-always-on;
  308. };
  309. soc_dvdd18_ap_reg: soc_dvdd18_ap {
  310. regulator-name = "soc_dvdd18_ap";
  311. regulator-boot-on;
  312. regulator-always-on;
  313. };
  314. soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
  315. regulator-name = "soc_avdd08_mipi_hdmi";
  316. regulator-boot-on;
  317. regulator-always-on;
  318. };
  319. soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi {
  320. regulator-name = "soc_avdd18_mipi_hdmi";
  321. regulator-boot-on;
  322. regulator-always-on;
  323. };
  324. soc_vdd33_emmc_reg: soc_vdd33_emmc {
  325. regulator-name = "soc_vdd33_emmc";
  326. regulator-boot-on;
  327. regulator-always-on;
  328. };
  329. soc_vdd18_emmc_reg: soc_vdd18_emmc {
  330. regulator-name = "soc_vdd18_emmc";
  331. regulator-boot-on;
  332. regulator-always-on;
  333. };
  334. soc_dovdd18_scan_reg: soc_dovdd18_scan {
  335. regulator-name = "soc_dovdd18_scan";
  336. regulator-min-microvolt = <900000>;
  337. regulator-max-microvolt = <3600000>;
  338. };
  339. soc_vext_2v8_reg: soc_vext_2v8 {
  340. regulator-name = "soc_vext_2v8";
  341. regulator-boot-on;
  342. regulator-always-on;
  343. };
  344. soc_dvdd12_scan_reg: soc_dvdd12_scan {
  345. regulator-name = "soc_dvdd12_scan";
  346. regulator-min-microvolt = <900000>;
  347. regulator-max-microvolt = <3600000>;
  348. };
  349. soc_avdd28_scan_en_reg: soc_avdd28_scan_en {
  350. regulator-name = "soc_avdd28_scan_en";
  351. };
  352. soc_avdd28_rgb_reg: soc_avdd28_rgb {
  353. regulator-name = "soc_avdd28_rgb";
  354. regulator-min-microvolt = <2200000>;
  355. regulator-max-microvolt = <3475000>;
  356. regulator-boot-on;
  357. regulator-always-on;
  358. };
  359. soc_dovdd18_rgb_reg: soc_dovdd18_rgb {
  360. regulator-name = "soc_dovdd18_rgb";
  361. regulator-min-microvolt = <1200000>;
  362. regulator-max-microvolt = <3600000>;
  363. regulator-boot-on;
  364. regulator-always-on;
  365. };
  366. soc_dvdd12_rgb_reg: soc_dvdd12_rgb {
  367. regulator-name = "soc_dvdd12_rgb";
  368. regulator-min-microvolt = <400000>;
  369. regulator-max-microvolt = <1675000>;
  370. regulator-boot-on;
  371. regulator-always-on;
  372. };
  373. soc_avdd25_ir_reg: soc_avdd25_ir {
  374. regulator-name = "soc_avdd25_ir";
  375. regulator-min-microvolt = <2200000>;
  376. regulator-max-microvolt = <3475000>;
  377. regulator-boot-on;
  378. regulator-always-on;
  379. };
  380. soc_dovdd18_ir_reg: soc_dovdd18_ir {
  381. regulator-name = "soc_dovdd18_ir";
  382. regulator-min-microvolt = <1200000>;
  383. regulator-max-microvolt = <3600000>;
  384. regulator-boot-on;
  385. regulator-always-on;
  386. };
  387. soc_dvdd12_ir_reg: soc_dvdd12_ir {
  388. regulator-name = "soc_dvdd12_ir";
  389. regulator-min-microvolt = <400000>;
  390. regulator-max-microvolt = <1675000>;
  391. regulator-boot-on;
  392. regulator-always-on;
  393. };
  394. };
  395. c910_cpufreq {
  396. compatible = "thead,light-mpw-cpufreq";
  397. status = "okay";
  398. };
  399. test: light-aon-test {
  400. compatible = "thead,light-aon-test";
  401. };
  402. };
  403. };
  404. &cmamem {
  405. alloc-ranges = <0 0xe4000000 0 0x14000000>; // [0xE400_0000 ~ 0xF800_0000]
  406. };
  407. &resmem {
  408. #address-cells = <2>;
  409. #size-cells = <2>;
  410. ranges;
  411. tee_mem: memory@1a000000 {
  412. reg = <0x0 0x1a000000 0 0x4000000>;
  413. no-map;
  414. };
  415. dsp0_mem: memory@20000000 { /**0x2000_0000~0x2040_0000 4M**/
  416. reg = <0x0 0x20000000 0x0 0x00280000 /* DSP FW code&data section 2.5M*/
  417. 0x0 0x20280000 0x0 0x00001000 /* DSP communication area 4K*/
  418. 0x0 0x20281000 0x0 0x00007000 /* Panic/log page 28K */
  419. 0x0 0x20288000 0x0 0x00178000>; /* DSP shared memory 1.5M-32K*/
  420. no-map;
  421. };
  422. dsp1_mem: memory@20400000 { /**0x2040_0000~0x2080_0000 4M**/
  423. reg = <0x0 0x20400000 0x0 0x00280000 /* DSP FW code&data section */
  424. 0x0 0x20680000 0x0 0x00001000 /* DSP communication area */
  425. 0x0 0x20681000 0x0 0x00007000 /* Panic/log page*/
  426. 0x0 0x20688000 0x0 0x00178000>; /* DSP shared memory */
  427. no-map;
  428. };
  429. vi_mem: framebuffer@0f800000 {
  430. reg = <0x0 0x0F800000 0x0 0x05400000 /* vi_mem_pool_region[0] 84 MB (default) */
  431. 0x0 0x14C00000 0x0 0x01D00000 /* vi_mem_pool_region[1] 29 MB */
  432. 0x0 0x16900000 0x0 0x03200000>; /* vi_mem_pool_region[2] 50 MB */
  433. no-map;
  434. };
  435. facelib_mem: memory@22000000 {
  436. reg = <0x0 0x22000000 0x0 0x10000000>;
  437. no-map;
  438. };
  439. };
  440. &adc {
  441. vref-supply = <&reg_vref_1v8>;
  442. status = "okay";
  443. };
  444. &i2c0 {
  445. clock-frequency = <400000>;
  446. status = "okay";
  447. eeprom@50 {
  448. compatible = "atmel,24c32";
  449. reg = <0x50>;
  450. pagesize = <32>;
  451. };
  452. codec: wm8960@1a {
  453. #sound-dai-cells = <0>;
  454. compatible = "wlf,wm8960";
  455. reg = <0x1a>;
  456. wlf,shared-lrclk;
  457. wlf,hp-cfg = <3 2 3>;
  458. wlf,gpio-cfg = <1 3>;
  459. };
  460. touch@5d {
  461. #gpio-cells = <2>;
  462. compatible = "goodix,gt911";
  463. reg = <0x5d>;
  464. interrupt-parent = <&gpio1_porta>;
  465. interrupts = <8 0>;
  466. irq-gpios = <&gpio1_porta 8 0>;
  467. reset-gpios = <&gpio1_porta 7 0>;
  468. AVDD28-supply = <&reg_tp_pwr_en>;
  469. touchscreen-size-x = <800>;
  470. touchscreen-size-y = <1280>;
  471. };
  472. };
  473. &audio_i2c0 {
  474. clock-frequency = <100000>;
  475. status = "okay";
  476. es8156_audio_codec: es8156@8 {
  477. #sound-dai-cells = <0>;
  478. compatible = "everest,es8156";
  479. reg = <0x08>;
  480. };
  481. es7210_audio_codec: es7210@40 {
  482. #sound-dai-cells = <0>;
  483. compatible = "MicArray_0";
  484. reg = <0x40>;
  485. };
  486. };
  487. &i2c1 {
  488. clock-frequency = <400000>;
  489. status = "okay";
  490. touch1@5d {
  491. #gpio-cells = <2>;
  492. compatible = "goodix,gt911";
  493. reg = <0x5d>;
  494. interrupt-parent = <&gpio1_porta>;
  495. interrupts = <12 0>;
  496. irq-gpios = <&gpio1_porta 12 0>;
  497. reset-gpios = <&gpio1_porta 11 0>;
  498. AVDD28-supply = <&reg_tp1_pwr_en>;
  499. touchscreen-size-x = <800>;
  500. touchscreen-size-y = <1280>;
  501. };
  502. };
  503. &spi0 {
  504. num-cs = <1>;
  505. cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
  506. rx-sample-delay-ns = <10>;
  507. status = "okay";
  508. spi_norflash@0 {
  509. #address-cells = <1>;
  510. #size-cells = <1>;
  511. compatible = "winbond,w25q64jwm", "jedec,spi-nor";
  512. reg = <0>;
  513. spi-max-frequency = <50000000>;
  514. w25q,fast-read;
  515. };
  516. spidev@1 {
  517. compatible = "spidev";
  518. #address-cells = <0x1>;
  519. #size-cells = <0x1>;
  520. reg = <0x1>;
  521. spi-max-frequency = <50000000>;
  522. };
  523. };
  524. &uart0 {
  525. clock-frequency = <100000000>;
  526. };
  527. &qspi0 {
  528. num-cs = <1>;
  529. cs-gpios = <&gpio2_porta 3 0>;
  530. rx-sample-dly = <4>;
  531. status = "disabled";
  532. spi-flash@0 {
  533. #address-cells = <1>;
  534. #size-cells = <1>;
  535. compatible = "spi-nand";
  536. spi-max-frequency = <100000000>;
  537. spi-tx-bus-width = <4>;
  538. spi-rx-bus-width = <4>;
  539. reg = <0>;
  540. partition@0 {
  541. label = "ubi1";
  542. reg = <0x00000000 0x08000000>;
  543. };
  544. };
  545. };
  546. &qspi1 {
  547. num-cs = <1>;
  548. cs-gpios = <&gpio0_porta 1 0>;
  549. status = "disabled";
  550. spi-flash@0 {
  551. #address-cells = <1>;
  552. #size-cells = <1>;
  553. compatible = "spi-nand";
  554. spi-max-frequency = <66000000>;
  555. spi-tx-bus-width = <4>;
  556. spi-rx-bus-width = <4>;
  557. reg = <0>;
  558. partition@0 {
  559. label = "ubi2";
  560. reg = <0x00000000 0x08000000>;
  561. };
  562. };
  563. };
  564. &gmac0 {
  565. phy-mode = "rgmii-id";
  566. rx-clk-delay = <0x00>; /* for RGMII */
  567. tx-clk-delay = <0x00>; /* for RGMII */
  568. phy-handle = <&phy_88E1111_0>;
  569. status = "okay";
  570. mdio0 {
  571. #address-cells = <1>;
  572. #size-cells = <0>;
  573. compatible = "snps,dwmac-mdio";
  574. phy_88E1111_0: ethernet-phy@0 {
  575. reg = <0x1>;
  576. };
  577. phy_88E1111_1: ethernet-phy@1 {
  578. reg = <0x2>;
  579. };
  580. };
  581. };
  582. &gmac1 {
  583. phy-mode = "rgmii-id";
  584. rx-clk-delay = <0x00>; /* for RGMII */
  585. tx-clk-delay = <0x00>; /* for RGMII */
  586. phy-handle = <&phy_88E1111_1>;
  587. status = "okay";
  588. };
  589. &emmc {
  590. max-frequency = <198000000>;
  591. non-removable;
  592. mmc-hs400-1_8v;
  593. io_fixed_1v8;
  594. is_emmc;
  595. no-sdio;
  596. no-sd;
  597. pull_up;
  598. bus-width = <8>;
  599. status = "okay";
  600. };
  601. &sdhci0 {
  602. max-frequency = <198000000>;
  603. bus-width = <4>;
  604. pull_up;
  605. wprtn_ignore;
  606. status = "okay";
  607. };
  608. &sdhci1 {
  609. max-frequency = <100000000>;
  610. bus-width = <4>;
  611. pull_up;
  612. no-sd;
  613. no-mmc;
  614. non-removable;
  615. io_fixed_1v8;
  616. post-power-on-delay-ms = <50>;
  617. wprtn_ignore;
  618. cap-sd-highspeed;
  619. keep-power-in-suspend;
  620. wakeup-source;
  621. status = "disabled";
  622. };
  623. &padctrl0_apsys { /* right-pinctrl */
  624. light-evb-padctrl0 {
  625. /*
  626. * Pin Configuration Node:
  627. * Format: <pin_id mux_node config>
  628. */
  629. pinctrl_uart0: uart0grp {
  630. thead,pins = <
  631. FM_UART0_TXD 0x0 0x72
  632. FM_UART0_RXD 0x0 0x72
  633. >;
  634. };
  635. pinctrl_spi0: spi0grp {
  636. thead,pins = <
  637. FM_SPI_CSN 0x3 0x20a
  638. FM_SPI_SCLK 0x0 0x20a
  639. FM_SPI_MISO 0x0 0x23a
  640. FM_SPI_MOSI 0x0 0x23a
  641. >;
  642. };
  643. pinctrl_qspi0: qspi0grp {
  644. thead,pins = <
  645. FM_QSPI0_SCLK 0x0 0x20f
  646. FM_QSPI0_CSN0 0x3 0x20f
  647. FM_QSPI0_CSN1 0x0 0x20f
  648. FM_QSPI0_D0_MOSI 0x0 0x23f
  649. FM_QSPI0_D1_MISO 0x0 0x23f
  650. FM_QSPI0_D2_WP 0x0 0x23f
  651. FM_QSPI0_D3_HOLD 0x0 0x23f
  652. >;
  653. };
  654. pinctrl_audio_i2s0: i2s0grp {
  655. thead,pins = <
  656. FM_QSPI0_SCLK 0x2 0x208
  657. FM_QSPI0_CSN0 0x2 0x238
  658. FM_QSPI0_CSN1 0x2 0x208
  659. FM_QSPI0_D0_MOSI 0x2 0x238
  660. FM_QSPI0_D1_MISO 0x2 0x238
  661. FM_QSPI0_D2_WP 0x2 0x238
  662. FM_QSPI0_D3_HOLD 0x2 0x238
  663. >;
  664. };
  665. pinctrl_pwm: pwmgrp {
  666. thead,pins = <
  667. FM_GPIO3_2 0x1 0x208 /* pwm0 */
  668. FM_GPIO3_3 0x1 0x208 /* pwm1 */
  669. >;
  670. };
  671. };
  672. };
  673. &padctrl1_apsys { /* left-pinctrl */
  674. light-evb-padctrl1 {
  675. /*
  676. * Pin Configuration Node:
  677. * Format: <pin_id mux_node config>
  678. */
  679. pinctrl_uart3: uart3grp {
  680. thead,pins = <
  681. FM_UART3_TXD 0x0 0x72
  682. FM_UART3_RXD 0x0 0x72
  683. >;
  684. };
  685. pinctrl_uart4: uart4grp {
  686. thead,pins = <
  687. FM_UART4_TXD 0x0 0x72
  688. FM_UART4_RXD 0x0 0x72
  689. FM_UART4_CTSN 0x0 0x72
  690. FM_UART4_RTSN 0x0 0x72
  691. >;
  692. };
  693. pinctrl_qspi1: qspi1grp {
  694. thead,pins = <
  695. FM_QSPI1_SCLK 0x0 0x20a
  696. FM_QSPI1_CSN0 0x3 0x20a
  697. FM_QSPI1_D0_MOSI 0x0 0x23a
  698. FM_QSPI1_D1_MISO 0x0 0x23a
  699. FM_QSPI1_D2_WP 0x0 0x23a
  700. FM_QSPI1_D3_HOLD 0x0 0x23a
  701. >;
  702. };
  703. pinctrl_iso7816: iso7816grp {
  704. thead,pins = <
  705. FM_QSPI1_SCLK 0x1 0x208
  706. FM_QSPI1_D0_MOSI 0x1 0x238
  707. FM_QSPI1_D1_MISO 0x1 0x238
  708. FM_QSPI1_D2_WP 0x1 0x238
  709. FM_QSPI1_D3_HOLD 0x1 0x238
  710. >;
  711. };
  712. };
  713. };
  714. &padctrl_aosys {
  715. light-aon-padctrl {
  716. /*
  717. * Pin Configuration Node:
  718. * Format: <pin_id mux_node config>
  719. */
  720. pinctrl_audiopa1: audiopa1_grp {
  721. thead,pins = <
  722. FM_AUDIO_PA1 0x3 0x72
  723. >;
  724. };
  725. pinctrl_audiopa2: audiopa2_grp {
  726. thead,pins = <
  727. FM_AUDIO_PA2 0x0 0x72
  728. >;
  729. };
  730. pinctrl_volume: volume_grp {
  731. thead,pins = <
  732. FM_CPU_JTG_TDI 0x3 0x208
  733. FM_CPU_JTG_TDO 0x3 0x208
  734. >;
  735. };
  736. };
  737. };
  738. &i2c2 {
  739. clock-frequency = <400000>;
  740. status = "okay";
  741. eeprom@50 {
  742. compatible = "atmel,24c32";
  743. reg = <0x50>;
  744. pagesize = <32>;
  745. };
  746. };
  747. &i2c3 {
  748. clock-frequency = <400000>;
  749. status = "okay";
  750. eeprom@50 {
  751. compatible = "atmel,24c32";
  752. reg = <0x50>;
  753. pagesize = <32>;
  754. };
  755. };
  756. &i2c4 {
  757. clock-frequency = <400000>;
  758. status = "okay";
  759. eeprom@50 {
  760. compatible = "atmel,24c32";
  761. reg = <0x50>;
  762. pagesize = <32>;
  763. };
  764. pcal6408ahk_a: gpio@20 {
  765. compatible = "nxp,pcal9554b";
  766. reg = <0x20>;
  767. gpio-controller;
  768. #gpio-cells = <2>;
  769. };
  770. };
  771. &isp0 {
  772. status = "okay";
  773. };
  774. &isp1 {
  775. status = "okay";
  776. };
  777. &isp_ry0 {
  778. status = "okay";
  779. };
  780. &dewarp {
  781. status = "okay";
  782. };
  783. &dec400_isp0 {
  784. status = "okay";
  785. };
  786. &dec400_isp1 {
  787. status = "okay";
  788. };
  789. &dec400_isp2 {
  790. status = "okay";
  791. };
  792. &bm_visys {
  793. status = "okay";
  794. };
  795. &bm_csi0 {
  796. status = "okay";
  797. };
  798. &bm_csi1 {
  799. status = "okay";
  800. };
  801. &bm_csi2 {
  802. status = "okay";
  803. };
  804. &vi_pre {
  805. //vi_pre_irq_en = <1>;
  806. status = "okay";
  807. };
  808. &xtensa_dsp {
  809. status = "okay";
  810. };
  811. &xtensa_dsp0 {
  812. status = "okay";
  813. memory-region = <&dsp0_mem>;
  814. };
  815. &xtensa_dsp1{
  816. status = "okay";
  817. memory-region = <&dsp1_mem>;
  818. };
  819. &vvcam_flash_led0{
  820. flash_led_name = "aw36413_aw36515";
  821. floodlight_i2c_bus = /bits/ 8 <2>;
  822. floodlight_en_pin = <&gpio1_porta 25 0>;
  823. //projection_i2c_bus = /bits/ 8 <2>;
  824. flash_led_touch_pin = <&gpio1_porta 27 0>; //flash led touch pin
  825. status = "okay";
  826. };
  827. &vvcam_sensor0 {
  828. sensor_name = "SC2310";
  829. sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
  830. sensor_regulator_voltage_uV = <1800000 1200000 2800000>;
  831. sensor_regulator_timing_us = <70 50 20>;
  832. sensor_rst = <&gpio1_porta 16 0>;
  833. sensor_pdn_delay_us = <4000>; //powerdown pin / shutdown pin actived till I2C ready
  834. DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
  835. DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
  836. AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
  837. i2c_reg_width = /bits/ 8 <2>;
  838. i2c_data_width = /bits/ 8 <1>;
  839. i2c_addr = /bits/ 8 <0x30>;
  840. i2c_bus = /bits/ 8 <3>;
  841. status = "okay";
  842. };
  843. &vvcam_sensor1 {
  844. sensor_name = "OV5693";
  845. i2c_bus = /bits/ 8 <3>;
  846. i2c_reg_width = /bits/ 8 <1>;
  847. i2c_data_width = /bits/ 8 <1>;
  848. status = "disabled";
  849. };
  850. &vvcam_sensor2 {
  851. sensor_name = "GC5035";
  852. sensor_regulators = "DOVDD18_SCAN", "DVDD12_SCAN", "AVDD28_SCAN";
  853. sensor_regulator_timing_us = <100 50 0>;
  854. sensor_pdn = <&gpio1_porta 30 0>; //powerdown pin / shutdown pin
  855. sensor_rst = <&gpio1_porta 29 0>;
  856. sensor_pdn_delay_us = <60>; //powerdown pin / shutdown pin actived till I2C ready
  857. DOVDD18_SCAN-supply = <&soc_dovdd18_scan_reg>;
  858. DVDD12_SCAN-supply = <&soc_dvdd12_scan_reg>;
  859. AVDD28_SCAN-supply = <&soc_avdd28_scan_en_reg>;
  860. i2c_addr = /bits/ 8 <0x37>;
  861. i2c_bus = /bits/ 8 <4>;
  862. i2c_reg_width = /bits/ 8 <1>;
  863. i2c_data_width = /bits/ 8 <1>;
  864. status = "okay";
  865. };
  866. &vvcam_sensor3 {
  867. sensor_name = "SC2310";
  868. sensor_regulators = "DOVDD18_SCAN", "DVDD12_SCAN", "AVDD28_SCAN";
  869. sensor_regulator_timing_us = <70 50 20>;
  870. sensor_pdn = <&gpio1_porta 30 0>; //powerdown pin / shutdown pin
  871. sensor_rst = <&gpio1_porta 29 0>;
  872. sensor_pdn_delay_us = <4000>; //powerdown pin / shutdown pin actived till I2C ready
  873. DOVDD18_SCAN-supply = <&soc_dovdd18_scan_reg>;
  874. DVDD12_SCAN-supply = <&soc_dvdd12_scan_reg>;
  875. AVDD28_SCAN-supply = <&soc_avdd28_scan_en_reg>;
  876. i2c_bus = /bits/ 8 <4>;
  877. i2c_reg_width = /bits/ 8 <2>;
  878. i2c_data_width = /bits/ 8 <1>;
  879. i2c_addr = /bits/ 8 <0x30>;
  880. status = "okay";
  881. };
  882. &vvcam_sensor4 {
  883. sensor_name = "SC132GS";
  884. sensor_regulators = "DOVDD18_IR", "DVDD12_IR", "AVDD25_IR";
  885. sensor_regulator_timing_us = <70 1000 2000>;
  886. i2c_addr = /bits/ 8 <0x31>;
  887. sensor_rst = <&gpio1_porta 24 0>;
  888. sensor_pdn_delay_us = <2000>; //powerdown pin / shutdown pin actived till I2C ready
  889. DOVDD18_IR-supply = <&soc_dovdd18_ir_reg>;
  890. DVDD12_IR-supply = <&soc_dvdd12_ir_reg>;
  891. AVDD25_IR-supply = <&soc_avdd25_ir_reg>;
  892. i2c_reg_width = /bits/ 8 <2>;
  893. i2c_data_width = /bits/ 8 <1>;
  894. i2c_bus = /bits/ 8 <2>;
  895. status = "okay";
  896. };
  897. &vvcam_sensor5 {
  898. sensor_name = "OV12870";
  899. sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
  900. sensor_regulator_voltage_uV = <1800000 1200000 2800000>;
  901. sensor_regulator_timing_us = <100 50 0>;
  902. sensor_rst = <&gpio1_porta 16 0>;
  903. sensor_pdn_delay_us = <60>; //powerdown pin / shutdown pin actived till I2C ready
  904. DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
  905. DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
  906. AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
  907. i2c_addr = /bits/ 8 <0x10>;
  908. i2c_reg_width = /bits/ 8 <2>;
  909. i2c_data_width = /bits/ 8 <1>;
  910. i2c_bus = /bits/ 8 <3>;
  911. status = "okay";
  912. };
  913. &vvcam_sensor6 {
  914. sensor_name = "GC02M1B";
  915. sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
  916. sensor_regulator_voltage_uV = <1800000 1675000 2800000>;
  917. sensor_regulator_timing_us = <70 50 20>;
  918. sensor_rst = <&gpio1_porta 16 0>;
  919. sensor_pdn_delay_us = <1000>; //powerdown pin / shutdown pin actived till I2C ready
  920. DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
  921. DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
  922. AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
  923. i2c_reg_width = /bits/ 8 <1>;
  924. i2c_data_width = /bits/ 8 <1>;
  925. i2c_addr = /bits/ 8 <0x37>;
  926. i2c_bus = /bits/ 8 <3>;
  927. status = "okay";
  928. };
  929. &video0{
  930. vi_mem_pool_region = <2>; // vi_mem: framebuffer, region[2]
  931. channel0 {
  932. sensor0 {
  933. subdev_name = "vivcam";
  934. idx = <2>; //<2>=vivcam2 : gc5035
  935. csi_idx = <1>; //<1>=CSI2X2_B
  936. mode_idx = <3>;
  937. path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  938. };
  939. sensor1 {
  940. subdev_name = "vivcam";
  941. idx = <3>; //<3>=vivcam3 : sc2310
  942. csi_idx = <1>; //<1>=CSI2X2_B
  943. mode_idx = <1>;
  944. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  945. };
  946. isp {
  947. subdev_name = "isp";
  948. idx = <0>;
  949. path_type = "ISP_MI_PATH_MP";
  950. output {
  951. max_width = <1920>;
  952. max_height = <1088>;
  953. bit_per_pixel = <12>;
  954. frame_count = <3>;
  955. };
  956. };
  957. };
  958. channel1 {
  959. sensor0 {
  960. subdev_name = "vivcam";
  961. idx = <2>; //<2>=vivcam2 : gc5035
  962. csi_idx = <1>; //<1>=CSI2X2_B
  963. mode_idx = <3>;
  964. path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  965. };
  966. sensor1 {
  967. subdev_name = "vivcam";
  968. idx = <3>; //<3>=vivcam3 : sc2310
  969. csi_idx = <1>; //<1>=CSI2X2_B
  970. mode_idx = <1>;
  971. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  972. };
  973. isp {
  974. subdev_name = "isp";
  975. idx = <0>;
  976. path_type = "ISP_MI_PATH_SP";
  977. output {
  978. max_width = <1920>;
  979. max_height = <1088>;
  980. bit_per_pixel = <12>;
  981. frame_count = <3>;
  982. };
  983. };
  984. };
  985. channel2 {
  986. sensor0 {
  987. subdev_name = "vivcam";
  988. idx = <2>; //<2>=vivcam2 : gc5035
  989. csi_idx = <1>; //<1>=CSI2X2_B
  990. mode_idx = <3>;
  991. path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  992. };
  993. sensor1 {
  994. subdev_name = "vivcam";
  995. idx = <3>; //<3>=vivcam3 : sc2310
  996. csi_idx = <1>; //<1>=CSI2X2_B
  997. mode_idx = <1>;
  998. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  999. };
  1000. isp {
  1001. subdev_name = "isp";
  1002. idx = <0>;
  1003. path_type = "ISP_MI_PATH_SP2_BP";
  1004. output {
  1005. max_width = <1920>;
  1006. max_height = <1088>;
  1007. bit_per_pixel = <12>;
  1008. frame_count = <3>;
  1009. };
  1010. };
  1011. };
  1012. };
  1013. &video1{
  1014. vi_mem_pool_region = <2>; // vi_mem: framebuffer, region[2]
  1015. channel0 {
  1016. sensor0 {
  1017. subdev_name = "vivcam";
  1018. idx = <2>; //<2>=vivcam2 : gc5035
  1019. csi_idx = <1>; //<1>=CSI2X2_B
  1020. mode_idx = <3>;
  1021. path_type = "SENSOR_1296x972_RAW10_LINER";
  1022. };
  1023. sensor1 {
  1024. subdev_name = "vivcam";
  1025. idx = <3>; //<3>=vivcam3 : sc2310
  1026. csi_idx = <1>; //<1>=CSI2X2_B
  1027. mode_idx = <1>;
  1028. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1029. };
  1030. isp {
  1031. subdev_name = "isp";
  1032. idx = <0>;
  1033. path_type = "ISP_MI_PATH_MP";
  1034. output {
  1035. max_width = <1920>;
  1036. max_height = <1088>;
  1037. bit_per_pixel = <12>;
  1038. frame_count = <3>;
  1039. };
  1040. };
  1041. dw {
  1042. subdev_name = "dw";
  1043. idx = <0>;
  1044. path_type = "DW_DWE_VSE0";
  1045. dw_dst_depth = <2>;
  1046. };
  1047. };
  1048. channel1 {
  1049. sensor0 {
  1050. subdev_name = "vivcam";
  1051. idx = <2>; //<2>=vivcam2 : gc5035
  1052. csi_idx = <1>; //<1>=CSI2X2_B
  1053. mode_idx = <3>;
  1054. path_type = "SENSOR_1296x972_RAW10_LINER";
  1055. };
  1056. sensor1 {
  1057. subdev_name = "vivcam";
  1058. idx = <3>; //<3>=vivcam3 : sc2310
  1059. csi_idx = <1>; //<1>=CSI2X2_B
  1060. mode_idx = <1>;
  1061. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1062. };
  1063. isp {
  1064. subdev_name = "isp";
  1065. idx = <0>;
  1066. path_type = "ISP_MI_PATH_MP";
  1067. output {
  1068. max_width = <1920>;
  1069. max_height = <1088>;
  1070. bit_per_pixel = <12>;
  1071. frame_count = <3>;
  1072. };
  1073. };
  1074. dw {
  1075. subdev_name = "dw";
  1076. idx = <0>;
  1077. path_type = "DW_DWE_VSE1";
  1078. dw_dst_depth = <2>;
  1079. };
  1080. };
  1081. channel2 {
  1082. sensor0 {
  1083. subdev_name = "vivcam";
  1084. idx = <2>; //<2>=vivcam2 : gc5035
  1085. csi_idx = <1>; //<1>=CSI2X2_B
  1086. mode_idx = <3>;
  1087. path_type = "SENSOR_1296x972_RAW10_LINER";
  1088. };
  1089. sensor1 {
  1090. subdev_name = "vivcam";
  1091. idx = <3>; //<3>=vivcam3 : sc2310
  1092. csi_idx = <1>; //<1>=CSI2X2_B
  1093. mode_idx = <1>;
  1094. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1095. };
  1096. isp {
  1097. subdev_name = "isp";
  1098. idx = <0>;
  1099. path_type = "ISP_MI_PATH_MP";
  1100. output {
  1101. max_width = <1920>;
  1102. max_height = <1088>;
  1103. bit_per_pixel = <12>;
  1104. frame_count = <3>;
  1105. };
  1106. };
  1107. dw {
  1108. subdev_name = "dw";
  1109. idx = <0>;
  1110. path_type = "DW_DWE_VSE2";
  1111. dw_dst_depth = <2>;
  1112. };
  1113. };
  1114. };
  1115. &video2{
  1116. vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
  1117. channel0 {
  1118. sensor0 {
  1119. subdev_name = "vivcam";
  1120. idx = <0>; //sc2310
  1121. csi_idx = <0>; //<0>=CSI2
  1122. mode_idx = <1>;
  1123. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1124. };
  1125. sensor1 {
  1126. subdev_name = "vivcam";
  1127. idx = <6>; //gc02m1b
  1128. csi_idx = <0>; //<0>=CSI2
  1129. mode_idx = <0>;
  1130. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1131. };
  1132. isp {
  1133. subdev_name = "isp";
  1134. idx = <1>;
  1135. path_type = "ISP_MI_PATH_MP";
  1136. output {
  1137. max_width = <1920>;
  1138. max_height = <1088>;
  1139. bit_per_pixel = <16>;
  1140. frame_count = <3>;
  1141. };
  1142. };
  1143. };
  1144. channel1 {
  1145. sensor0 {
  1146. subdev_name = "vivcam";
  1147. idx = <0>; //sc2310
  1148. csi_idx = <0>; //<0>=CSI2
  1149. mode_idx = <1>;
  1150. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1151. };
  1152. sensor1 {
  1153. subdev_name = "vivcam";
  1154. idx = <6>; //gc02m1b
  1155. csi_idx = <0>; //<0>=CSI2
  1156. mode_idx = <0>;
  1157. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1158. };
  1159. isp {
  1160. subdev_name = "isp";
  1161. idx = <1>;
  1162. path_type = "ISP_MI_PATH_SP";
  1163. output {
  1164. max_width = <1920>;
  1165. max_height = <1088>;
  1166. bit_per_pixel = <16>;
  1167. frame_count = <3>;
  1168. };
  1169. };
  1170. };
  1171. channel2 {
  1172. sensor0 {
  1173. subdev_name = "vivcam";
  1174. idx = <0>; //sc2310
  1175. csi_idx = <0>; //<0>=CSI2
  1176. mode_idx = <1>;
  1177. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1178. };
  1179. sensor1 {
  1180. subdev_name = "vivcam";
  1181. idx = <6>; //gc02m1b
  1182. csi_idx = <0>; //<0>=CSI2
  1183. mode_idx = <0>;
  1184. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1185. };
  1186. isp {
  1187. subdev_name = "isp";
  1188. idx = <1>;
  1189. path_type = "ISP_MI_PATH_SP2_BP";
  1190. output {
  1191. max_width = <1920>;
  1192. max_height = <1088>;
  1193. bit_per_pixel = <16>;
  1194. frame_count = <3>;
  1195. };
  1196. };
  1197. };
  1198. };
  1199. &video3{
  1200. vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
  1201. channel0 {
  1202. sensor0 {
  1203. subdev_name = "vivcam";
  1204. idx = <0>; //sc2310
  1205. csi_idx = <0>; //<0>=CSI2
  1206. mode_idx = <1>;
  1207. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1208. };
  1209. sensor1 {
  1210. subdev_name = "vivcam";
  1211. idx = <6>; //gc02m1b
  1212. csi_idx = <0>; //<0>=CSI2
  1213. mode_idx = <0>;
  1214. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1215. };
  1216. isp {
  1217. subdev_name = "isp";
  1218. idx = <1>;
  1219. path_type = "ISP_MI_PATH_MP";
  1220. output {
  1221. max_width = <1920>;
  1222. max_height = <1088>;
  1223. bit_per_pixel = <12>;
  1224. frame_count = <3>;
  1225. };
  1226. };
  1227. dw {
  1228. subdev_name = "dw";
  1229. idx = <0>;
  1230. path_type = "DW_DWE_VSE0";
  1231. dw_dst_depth = <2>;
  1232. };
  1233. };
  1234. channel1 {
  1235. sensor0 {
  1236. subdev_name = "vivcam";
  1237. idx = <0>; //sc2310
  1238. csi_idx = <0>; //<0>=CSI2
  1239. mode_idx = <1>;
  1240. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1241. };
  1242. sensor1 {
  1243. subdev_name = "vivcam";
  1244. idx = <6>; //gc02m1b
  1245. csi_idx = <0>; //<0>=CSI2
  1246. mode_idx = <0>;
  1247. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1248. };
  1249. isp {
  1250. subdev_name = "isp";
  1251. idx = <1>;
  1252. path_type = "ISP_MI_PATH_MP";
  1253. output {
  1254. max_width = <1920>;
  1255. max_height = <1088>;
  1256. bit_per_pixel = <12>;
  1257. frame_count = <3>;
  1258. };
  1259. };
  1260. dw {
  1261. subdev_name = "dw";
  1262. idx = <0>;
  1263. path_type = "DW_DWE_VSE1";
  1264. dw_dst_depth = <2>;
  1265. };
  1266. };
  1267. channel2 {
  1268. sensor0 {
  1269. subdev_name = "vivcam";
  1270. idx = <0>; //sc2310
  1271. csi_idx = <0>; //<0>=CSI2
  1272. mode_idx = <1>;
  1273. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1274. };
  1275. sensor1 {
  1276. subdev_name = "vivcam";
  1277. idx = <6>; //gc02m1b
  1278. csi_idx = <0>; //<0>=CSI2
  1279. mode_idx = <0>;
  1280. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1281. };
  1282. isp {
  1283. subdev_name = "isp";
  1284. idx = <1>;
  1285. path_type = "ISP_MI_PATH_MP";
  1286. output {
  1287. max_width = <1920>;
  1288. max_height = <1088>;
  1289. bit_per_pixel = <12>;
  1290. frame_count = <3>;
  1291. };
  1292. };
  1293. dw {
  1294. subdev_name = "dw";
  1295. idx = <0>;
  1296. path_type = "DW_DWE_VSE2";
  1297. dw_dst_depth = <2>;
  1298. };
  1299. };
  1300. };
  1301. &video4{
  1302. vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
  1303. channel0 {
  1304. sensor0 {
  1305. subdev_name = "vivcam";
  1306. idx = <0>; //sc2310
  1307. csi_idx = <0>; //<0>=CSI2
  1308. mode_idx = <1>;
  1309. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1310. };
  1311. sensor1 {
  1312. subdev_name = "vivcam";
  1313. idx = <6>; //gc02m1b
  1314. csi_idx = <0>; //<0>=CSI2
  1315. mode_idx = <0>;
  1316. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1317. };
  1318. isp {
  1319. subdev_name = "isp";
  1320. idx = <1>;
  1321. path_type = "ISP_MI_PATH_PP";
  1322. output {
  1323. max_width = <1920>;
  1324. max_height = <1088>;
  1325. bit_per_pixel = <12>;
  1326. frame_count = <3>;
  1327. };
  1328. };
  1329. dsp {
  1330. subdev_name = "dsp";
  1331. idx = <0>;
  1332. path_type = "DSP_PATH_ISP_RY";
  1333. output {
  1334. max_width = <1920>;
  1335. max_height = <1088>;
  1336. bit_per_pixel = <12>;
  1337. frame_count = <3>;
  1338. };
  1339. };
  1340. ry {
  1341. subdev_name = "ry";
  1342. idx = <0>;
  1343. path_type = "ISP_RY_MI_PATH_MP";
  1344. output {
  1345. max_width = <1920>;
  1346. max_height = <1088>;
  1347. bit_per_pixel = <12>;
  1348. frame_count = <3>;
  1349. };
  1350. };
  1351. };
  1352. channel1 {
  1353. sensor0 {
  1354. subdev_name = "vivcam";
  1355. idx = <0>; //sc2310
  1356. csi_idx = <0>; //<0>=CSI2
  1357. mode_idx = <1>;
  1358. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1359. };
  1360. sensor1 {
  1361. subdev_name = "vivcam";
  1362. idx = <6>; //gc02m1b
  1363. csi_idx = <0>; //<0>=CSI2
  1364. mode_idx = <0>;
  1365. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1366. };
  1367. isp {
  1368. subdev_name = "isp";
  1369. idx = <1>;
  1370. path_type = "ISP_MI_PATH_PP";
  1371. output {
  1372. max_width = <1920>;
  1373. max_height = <1088>;
  1374. bit_per_pixel = <12>;
  1375. frame_count = <3>;
  1376. };
  1377. };
  1378. dsp {
  1379. subdev_name = "dsp";
  1380. idx = <0>;
  1381. path_type = "DSP_PATH_ISP_RY";
  1382. output {
  1383. max_width = <1920>;
  1384. max_height = <1088>;
  1385. bit_per_pixel = <12>;
  1386. frame_count = <3>;
  1387. };
  1388. };
  1389. ry {
  1390. subdev_name = "ry";
  1391. idx = <0>;
  1392. path_type = "ISP_RY_MI_PATH_SP";
  1393. output {
  1394. max_width = <1920>;
  1395. max_height = <1088>;
  1396. bit_per_pixel = <12>;
  1397. frame_count = <3>;
  1398. };
  1399. };
  1400. };
  1401. channel2 {
  1402. sensor0 {
  1403. subdev_name = "vivcam";
  1404. idx = <0>; //sc2310
  1405. csi_idx = <0>; //<0>=CSI2
  1406. mode_idx = <1>;
  1407. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1408. };
  1409. sensor1 {
  1410. subdev_name = "vivcam";
  1411. idx = <6>; //gc02m1b
  1412. csi_idx = <0>; //<0>=CSI2
  1413. mode_idx = <0>;
  1414. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1415. };
  1416. isp {
  1417. subdev_name = "isp";
  1418. idx = <1>;
  1419. path_type = "ISP_MI_PATH_PP";
  1420. output {
  1421. max_width = <1920>;
  1422. max_height = <1088>;
  1423. bit_per_pixel = <12>;
  1424. frame_count = <3>;
  1425. };
  1426. };
  1427. dsp {
  1428. subdev_name = "dsp";
  1429. idx = <0>;
  1430. path_type = "DSP_PATH_ISP_RY";
  1431. output {
  1432. max_width = <1920>;
  1433. max_height = <1088>;
  1434. bit_per_pixel = <12>;
  1435. frame_count = <3>;
  1436. };
  1437. };
  1438. ry {
  1439. subdev_name = "ry";
  1440. idx = <0>;
  1441. path_type = "ISP_RY_MI_PATH_SP2_BP";
  1442. output {
  1443. max_width = <1920>;
  1444. max_height = <1088>;
  1445. bit_per_pixel = <12>;
  1446. frame_count = <3>;
  1447. };
  1448. };
  1449. };
  1450. };
  1451. &video5{
  1452. vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
  1453. channel0 {
  1454. sensor0 {
  1455. subdev_name = "vivcam";
  1456. idx = <0>; //sc2310
  1457. csi_idx = <0>; //<0>=CSI2
  1458. mode_idx = <1>;
  1459. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1460. };
  1461. sensor1 {
  1462. subdev_name = "vivcam";
  1463. idx = <6>; //gc02m1b
  1464. csi_idx = <0>; //<0>=CSI2
  1465. mode_idx = <0>;
  1466. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1467. };
  1468. isp {
  1469. subdev_name = "isp";
  1470. idx = <1>;
  1471. path_type = "ISP_MI_PATH_PP";
  1472. output {
  1473. max_width = <1920>;
  1474. max_height = <1088>;
  1475. bit_per_pixel = <12>;
  1476. frame_count = <3>;
  1477. };
  1478. };
  1479. dsp {
  1480. subdev_name = "dsp";
  1481. idx = <0>;
  1482. path_type = "DSP_PATH_ISP_RY";
  1483. output {
  1484. max_width = <1920>;
  1485. max_height = <1088>;
  1486. bit_per_pixel = <12>;
  1487. frame_count = <3>;
  1488. };
  1489. };
  1490. ry {
  1491. subdev_name = "ry";
  1492. idx = <0>;
  1493. path_type = "ISP_RY_MI_PATH_MP";
  1494. output {
  1495. max_width = <1920>;
  1496. max_height = <1088>;
  1497. bit_per_pixel = <12>;
  1498. frame_count = <3>;
  1499. };
  1500. };
  1501. dw {
  1502. subdev_name = "dw";
  1503. idx = <0>;
  1504. path_type = "DW_DWE_VSE0";
  1505. dw_dst_depth = <2>;
  1506. };
  1507. };
  1508. channel1 {
  1509. sensor0 {
  1510. subdev_name = "vivcam";
  1511. idx = <0>; //sc2310
  1512. csi_idx = <0>; //<0>=CSI2
  1513. mode_idx = <1>;
  1514. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1515. };
  1516. sensor1 {
  1517. subdev_name = "vivcam";
  1518. idx = <6>; //gc02m1b
  1519. csi_idx = <0>; //<0>=CSI2
  1520. mode_idx = <0>;
  1521. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1522. };
  1523. isp {
  1524. subdev_name = "isp";
  1525. idx = <1>;
  1526. path_type = "ISP_MI_PATH_PP";
  1527. output {
  1528. max_width = <1920>;
  1529. max_height = <1088>;
  1530. bit_per_pixel = <12>;
  1531. frame_count = <3>;
  1532. };
  1533. };
  1534. dsp {
  1535. subdev_name = "dsp";
  1536. idx = <0>;
  1537. path_type = "DSP_PATH_ISP_RY";
  1538. output {
  1539. max_width = <1920>;
  1540. max_height = <1088>;
  1541. bit_per_pixel = <12>;
  1542. frame_count = <3>;
  1543. };
  1544. };
  1545. ry {
  1546. subdev_name = "ry";
  1547. idx = <0>;
  1548. path_type = "ISP_RY_MI_PATH_MP";
  1549. output {
  1550. max_width = <1920>;
  1551. max_height = <1088>;
  1552. bit_per_pixel = <12>;
  1553. frame_count = <3>;
  1554. };
  1555. };
  1556. dw {
  1557. subdev_name = "dw";
  1558. idx = <0>;
  1559. path_type = "DW_DWE_VSE1";
  1560. dw_dst_depth = <2>;
  1561. };
  1562. };
  1563. channel2 {
  1564. sensor0 {
  1565. subdev_name = "vivcam";
  1566. idx = <0>; //sc2310
  1567. csi_idx = <0>; //<0>=CSI2
  1568. mode_idx = <1>;
  1569. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1570. };
  1571. sensor1 {
  1572. subdev_name = "vivcam";
  1573. idx = <6>; //gc02m1b
  1574. csi_idx = <0>; //<0>=CSI2
  1575. mode_idx = <0>;
  1576. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1577. };
  1578. isp {
  1579. subdev_name = "isp";
  1580. idx = <1>;
  1581. path_type = "ISP_MI_PATH_PP";
  1582. output {
  1583. max_width = <1920>;
  1584. max_height = <1088>;
  1585. bit_per_pixel = <12>;
  1586. frame_count = <3>;
  1587. };
  1588. };
  1589. dsp {
  1590. subdev_name = "dsp";
  1591. idx = <0>;
  1592. path_type = "DSP_PATH_ISP_RY";
  1593. output {
  1594. max_width = <1920>;
  1595. max_height = <1088>;
  1596. bit_per_pixel = <12>;
  1597. frame_count = <3>;
  1598. };
  1599. };
  1600. ry {
  1601. subdev_name = "ry";
  1602. idx = <0>;
  1603. path_type = "ISP_RY_MI_PATH_MP";
  1604. output {
  1605. max_width = <1920>;
  1606. max_height = <1088>;
  1607. bit_per_pixel = <12>;
  1608. frame_count = <3>;
  1609. };
  1610. };
  1611. dw {
  1612. subdev_name = "dw";
  1613. idx = <0>;
  1614. path_type = "DW_DWE_VSE2";
  1615. dw_dst_depth = <2>;
  1616. };
  1617. };
  1618. };
  1619. &video6{
  1620. vi_mem_pool_region = <1>; // vi_mem: framebuffer, region[1]
  1621. channel0 {
  1622. sensor0 {
  1623. subdev_name = "vivcam";
  1624. idx = <4>; //sc132gs
  1625. csi_idx = <2>; //<2>=CSI2X2_A
  1626. flash_led_idx = <0>;
  1627. mode_idx = <0>;
  1628. path_type = "SENSOR_1080X1280_30FPS_RAW10_LINER";
  1629. };
  1630. dsp{
  1631. output {
  1632. max_width = <1080>;
  1633. max_height = <1280>;
  1634. bit_per_pixel = <16>;
  1635. frame_count = <3>;
  1636. };
  1637. };
  1638. };
  1639. channel1 {
  1640. sensor0 {
  1641. subdev_name = "vivcam";
  1642. idx = <4>; //sc132gs
  1643. csi_idx = <2>; //<2>=CSI2X2_A
  1644. flash_led_idx = <0>;
  1645. mode_idx = <0>;
  1646. path_type = "SENSOR_1080X1280_30FPS_RAW10_LINER";
  1647. };
  1648. dsp{
  1649. output {
  1650. max_width = <1080>;
  1651. max_height = <1280>;
  1652. bit_per_pixel = <16>;
  1653. frame_count = <3>;
  1654. };
  1655. };
  1656. };
  1657. };
  1658. &video7{
  1659. channel0 {
  1660. sensor0 {
  1661. subdev_name = "vivcam";
  1662. idx = <2>; //<2>=vivcam2 : gc5035
  1663. csi_idx = <1>; //<1>=CSI2X2_B
  1664. mode_idx = <3>;
  1665. path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  1666. };
  1667. sensor1 {
  1668. subdev_name = "vivcam";
  1669. idx = <3>; //<3>=vivcam3 : sc2310
  1670. csi_idx = <1>; //<1>=CSI2X2_B
  1671. mode_idx = <1>;
  1672. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1673. };
  1674. isp {
  1675. subdev_name = "isp";
  1676. idx = <0>;
  1677. path_type = "ISP_MI_PATH_PP";
  1678. output {
  1679. max_width = <1920>;
  1680. max_height = <1088>;
  1681. bit_per_pixel = <12>;
  1682. frame_count = <3>;
  1683. };
  1684. };
  1685. dsp {
  1686. subdev_name = "dsp";
  1687. idx = <1>;
  1688. path_type = "DSP_PATH_ISP_RY";
  1689. output {
  1690. max_width = <1920>;
  1691. max_height = <1088>;
  1692. bit_per_pixel = <12>;
  1693. frame_count = <3>;
  1694. };
  1695. };
  1696. ry {
  1697. subdev_name = "ry";
  1698. idx = <0>;
  1699. path_type = "ISP_RY_MI_PATH_MP";
  1700. output {
  1701. max_width = <1920>;
  1702. max_height = <1088>;
  1703. bit_per_pixel = <12>;
  1704. frame_count = <3>;
  1705. };
  1706. };
  1707. dw {
  1708. subdev_name = "dw";
  1709. idx = <0>;
  1710. path_type = "DW_DWE_VSE0";
  1711. dw_dst_depth = <2>;
  1712. };
  1713. };
  1714. channel1 {
  1715. sensor0 {
  1716. subdev_name = "vivcam";
  1717. idx = <2>; //<2>=vivcam2 : gc5035
  1718. csi_idx = <1>; //<1>=CSI2X2_B
  1719. mode_idx = <3>;
  1720. path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  1721. };
  1722. sensor1 {
  1723. subdev_name = "vivcam";
  1724. idx = <3>; //<3>=vivcam3 : sc2310
  1725. csi_idx = <1>; //<1>=CSI2X2_B
  1726. mode_idx = <1>;
  1727. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1728. };
  1729. isp {
  1730. subdev_name = "isp";
  1731. idx = <0>;
  1732. path_type = "ISP_MI_PATH_PP";
  1733. output {
  1734. max_width = <1920>;
  1735. max_height = <1088>;
  1736. bit_per_pixel = <12>;
  1737. frame_count = <3>;
  1738. };
  1739. };
  1740. dsp {
  1741. subdev_name = "dsp";
  1742. idx = <1>;
  1743. path_type = "DSP_PATH_ISP_RY";
  1744. output {
  1745. max_width = <1920>;
  1746. max_height = <1088>;
  1747. bit_per_pixel = <12>;
  1748. frame_count = <3>;
  1749. };
  1750. };
  1751. ry {
  1752. subdev_name = "ry";
  1753. idx = <0>;
  1754. path_type = "ISP_RY_MI_PATH_MP";
  1755. output {
  1756. max_width = <1920>;
  1757. max_height = <1088>;
  1758. bit_per_pixel = <12>;
  1759. frame_count = <3>;
  1760. };
  1761. };
  1762. dw {
  1763. subdev_name = "dw";
  1764. idx = <0>;
  1765. path_type = "DW_DWE_VSE1";
  1766. dw_dst_depth = <2>;
  1767. };
  1768. };
  1769. channel2 {
  1770. sensor0 {
  1771. subdev_name = "vivcam";
  1772. idx = <2>; //<2>=vivcam2 : gc5035
  1773. csi_idx = <1>; //<1>=CSI2X2_B
  1774. mode_idx = <3>;
  1775. path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  1776. };
  1777. sensor1 {
  1778. subdev_name = "vivcam";
  1779. idx = <3>; //<3>=vivcam3 : sc2310
  1780. csi_idx = <1>; //<1>=CSI2X2_B
  1781. mode_idx = <1>;
  1782. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1783. };
  1784. isp {
  1785. subdev_name = "isp";
  1786. idx = <0>;
  1787. path_type = "ISP_MI_PATH_PP";
  1788. output {
  1789. max_width = <1920>;
  1790. max_height = <1088>;
  1791. bit_per_pixel = <12>;
  1792. frame_count = <3>;
  1793. };
  1794. };
  1795. dsp {
  1796. subdev_name = "dsp";
  1797. idx = <1>;
  1798. path_type = "DSP_PATH_ISP_RY";
  1799. output {
  1800. max_width = <1920>;
  1801. max_height = <1088>;
  1802. bit_per_pixel = <12>;
  1803. frame_count = <3>;
  1804. };
  1805. };
  1806. ry {
  1807. subdev_name = "ry";
  1808. idx = <0>;
  1809. path_type = "ISP_RY_MI_PATH_MP";
  1810. output {
  1811. max_width = <1920>;
  1812. max_height = <1088>;
  1813. bit_per_pixel = <12>;
  1814. frame_count = <3>;
  1815. };
  1816. };
  1817. dw {
  1818. subdev_name = "dw";
  1819. idx = <0>;
  1820. path_type = "DW_DWE_VSE2";
  1821. dw_dst_depth = <2>;
  1822. };
  1823. };
  1824. };
  1825. &video8{
  1826. vi_mem_pool_region = <1>; // vi_mem: framebuffer, region[1]
  1827. channel0 {
  1828. sensor0 {
  1829. subdev_name = "vivcam";
  1830. idx = <2>; //<2>=vivcam2 : gc5035
  1831. csi_idx = <1>; //<1>=CSI2X2_B
  1832. mode_idx = <3>;
  1833. path_type = "SENSOR_1296x972_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  1834. };
  1835. sensor1 {
  1836. subdev_name = "vivcam";
  1837. idx = <3>; //<3>=vivcam3 : sc2310
  1838. csi_idx = <1>; //<1>=CSI2X2_B
  1839. mode_idx = <1>;
  1840. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1841. };
  1842. dsp {
  1843. subdev_name = "dsp";
  1844. idx = <0>;
  1845. path_type = "DSP_PATH_VIPRE_DDR";
  1846. output {
  1847. max_width = <1920>;
  1848. max_height = <1088>;
  1849. bit_per_pixel = <12>;
  1850. frame_count = <3>;
  1851. };
  1852. };
  1853. };
  1854. };
  1855. &video9{
  1856. channel0 {
  1857. sensor0 {
  1858. subdev_name = "vivcam";
  1859. idx = <4>; //sc132gs
  1860. csi_idx = <2>; //<2>=CSI2X2_A
  1861. mode_idx = <0>;
  1862. path_type = "SENSOR_1080X1280_30FPS_RAW10_LINER";
  1863. };
  1864. dsp{
  1865. output {
  1866. max_width = <1080>;
  1867. max_height = <1280>;
  1868. bit_per_pixel = <16>;
  1869. frame_count = <3>;
  1870. };
  1871. };
  1872. };
  1873. };
  1874. &video10{
  1875. channel0 {
  1876. sensor0 {
  1877. subdev_name = "vivcam";
  1878. idx = <2>; //<2>=vivcam2 : gc5035
  1879. csi_idx = <1>; //<1>=CSI2X2_B
  1880. mode_idx = <1>;
  1881. path_type = "SENSOR_1080P_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
  1882. skip_init = <1>;
  1883. };
  1884. sensor1 {
  1885. subdev_name = "vivcam";
  1886. idx = <3>; //<3>=vivcam3 : sc2310
  1887. csi_idx = <1>; //<1>=CSI2X2_B
  1888. mode_idx = <1>;
  1889. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1890. skip_init = <1>;
  1891. };
  1892. };
  1893. };
  1894. &video11{
  1895. channel0 {
  1896. channel_id = <0>;
  1897. status = "okay";
  1898. sensor0 {
  1899. subdev_name = "vivcam";
  1900. idx = <4>; //sc132gs
  1901. csi_idx = <2>; //<2>=CSI2X2_A
  1902. flash_led_idx = <0>;
  1903. mode_idx = <0>;
  1904. path_type = "SENSOR_1080X1280_30FPS_RAW10_LINER";
  1905. };
  1906. isp {
  1907. subdev_name = "isp";
  1908. idx = <0>;
  1909. path_type = "ISP_MI_PATH_MP";
  1910. output {
  1911. max_width = <1920>;
  1912. max_height = <1088>;
  1913. bit_per_pixel = <12>;
  1914. frame_count = <3>;
  1915. };
  1916. };
  1917. };
  1918. };
  1919. &video12{ // TUNINGTOOL
  1920. channel0 { // CSI2
  1921. sensor0 {
  1922. subdev_name = "vivcam";
  1923. idx = <0>; //sc2310
  1924. csi_idx = <0>; //<0>=CSI2
  1925. mode_idx = <1>;
  1926. path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
  1927. skip_init = <1>;
  1928. };
  1929. sensor1 {
  1930. subdev_name = "vivcam";
  1931. idx = <6>; //gc02m1b
  1932. csi_idx = <0>; //<0>=CSI2
  1933. mode_idx = <0>;
  1934. path_type = "SENSOR_1600x1200_RAW10_LINER";
  1935. skip_init = <1>;
  1936. };
  1937. };
  1938. };
  1939. &trng {
  1940. status = "disabled";
  1941. };
  1942. &eip_28 {
  1943. status = "okay";
  1944. };
  1945. &vdec {
  1946. status = "okay";
  1947. };
  1948. &venc {
  1949. status = "okay";
  1950. };
  1951. &isp_venc_shake {
  1952. status = "okay";
  1953. };
  1954. &vidmem {
  1955. status = "okay";
  1956. memory-region = <&vi_mem>;
  1957. };
  1958. &gpu {
  1959. status = "okay";
  1960. };
  1961. &npu {
  1962. vha_clk_rate = <1000000000>;
  1963. status = "okay";
  1964. };
  1965. &fce {
  1966. memory-region = <&facelib_mem>;
  1967. status = "okay";
  1968. };
  1969. &cpus {
  1970. c910_0: cpu@0 {
  1971. operating-points = <
  1972. /* kHz uV */
  1973. 300000 650000
  1974. 800000 700000
  1975. 1500000 800000
  1976. 1848000 1000000
  1977. >;
  1978. light,dvddm-operating-points = <
  1979. /* kHz uV */
  1980. 300000 800000
  1981. 800000 800000
  1982. 1500000 800000
  1983. 1848000 1000000
  1984. >;
  1985. };
  1986. c910_1: cpu@1 {
  1987. operating-points = <
  1988. /* kHz uV */
  1989. 300000 650000
  1990. 800000 700000
  1991. 1500000 800000
  1992. 1848000 1000000
  1993. >;
  1994. light,dvddm-operating-points = <
  1995. /* kHz uV */
  1996. 300000 800000
  1997. 800000 800000
  1998. 1500000 800000
  1999. 1848000 1000000
  2000. >;
  2001. };
  2002. c910_2: cpu@2 {
  2003. operating-points = <
  2004. /* kHz uV */
  2005. 300000 650000
  2006. 800000 700000
  2007. 1500000 800000
  2008. 1848000 1000000
  2009. >;
  2010. light,dvddm-operating-points = <
  2011. /* kHz uV */
  2012. 300000 800000
  2013. 800000 800000
  2014. 1500000 800000
  2015. 1848000 1000000
  2016. >;
  2017. };
  2018. c910_3: cpu@3 {
  2019. operating-points = <
  2020. /* kHz uV */
  2021. 300000 650000
  2022. 800000 700000
  2023. 1500000 800000
  2024. 1848000 1000000
  2025. >;
  2026. light,dvddm-operating-points = <
  2027. /* kHz uV */
  2028. 300000 800000
  2029. 800000 800000
  2030. 1500000 800000
  2031. 1848000 1000000
  2032. >;
  2033. };
  2034. };