fire-emu-soc-base.dts 1.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
  4. */
  5. /dts-v1/;
  6. #include "fire-emu.dts"
  7. &sdhci0 {
  8. status = "okay";
  9. };
  10. &usb3_drd {
  11. status = "okay";
  12. };
  13. &usb {
  14. status = "okay";
  15. };
  16. &spi0 {
  17. num-cs = <1>;
  18. cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
  19. rx-sample-delay-ns = <10>;
  20. status = "okay";
  21. spi_norflash@0 {
  22. #address-cells = <1>;
  23. #size-cells = <1>;
  24. compatible = "winbond,w25q64jwm", "jedec,spi-nor";
  25. reg = <0>;
  26. spi-max-frequency = <50000000>;
  27. w25q,fast-read;
  28. status = "okay";
  29. };
  30. spidev@1 {
  31. compatible = "spidev";
  32. #address-cells = <0x1>;
  33. #size-cells = <0x1>;
  34. reg = <0x1>;
  35. spi-max-frequency = <50000000>;
  36. };
  37. };
  38. &qspi0 {
  39. num-cs = <1>;
  40. cs-gpios = <&gpio2_porta 3 0>;
  41. rx-sample-dly = <4>;
  42. status = "okay";
  43. spi-flash@0 {
  44. #address-cells = <1>;
  45. #size-cells = <1>;
  46. compatible = "spi-nand";
  47. spi-max-frequency = <100000000>;
  48. spi-tx-bus-width = <4>;
  49. spi-rx-bus-width = <4>;
  50. reg = <0>;
  51. partition@0 {
  52. label = "ubi1";
  53. reg = <0x00000000 0x08000000>;
  54. };
  55. };
  56. };
  57. &qspi1 {
  58. num-cs = <1>;
  59. cs-gpios = <&gpio0_porta 1 0>;
  60. status = "okay";
  61. spi-flash@0 {
  62. #address-cells = <1>;
  63. #size-cells = <1>;
  64. compatible = "spi-nand";
  65. spi-max-frequency = <66000000>;
  66. spi-tx-bus-width = <4>;
  67. spi-rx-bus-width = <4>;
  68. reg = <0>;
  69. partition@0 {
  70. label = "ubi2";
  71. reg = <0x00000000 0x08000000>;
  72. };
  73. };
  74. };