Browse Source

WS cleanup: remove trailing empty lines

Signed-off-by: Wolfgang Denk <wd@denx.de>
Wolfgang Denk 2 years ago
parent
commit
66356b4c06
100 changed files with 0 additions and 111 deletions
  1. 0 1
      arch/arm/cpu/arm926ejs/cache.c
  2. 0 1
      arch/arm/cpu/armv7/psci-common.c
  3. 0 2
      arch/arm/cpu/armv8/hisilicon/pinmux.c
  4. 0 1
      arch/arm/cpu/armv8/xen/hypercall.S
  5. 0 1
      arch/arm/dts/sama7g5-pinfunc.h
  6. 0 1
      arch/arm/include/asm/arch-imxrt/imxrt.h
  7. 0 1
      arch/arm/include/asm/arch-rockchip/f_rockusb.h
  8. 0 1
      arch/arm/include/asm/arch-stm32/stm32f.h
  9. 0 1
      arch/arm/include/asm/arch-stv0991/stv0991_defs.h
  10. 0 1
      arch/arm/include/asm/xen.h
  11. 0 1
      arch/arm/lib/ccn504.S
  12. 0 1
      arch/arm/mach-at91/armv7/sama7g5_devices.c
  13. 0 1
      arch/arm/mach-at91/atmel_sfr.c
  14. 0 1
      arch/arm/mach-bcm283x/msg.c
  15. 0 1
      arch/arm/mach-imx/mx7/soc.c
  16. 0 1
      arch/arm/mach-kirkwood/cpu.c
  17. 0 1
      arch/arm/mach-octeontx/Makefile
  18. 0 1
      arch/arm/mach-octeontx2/Makefile
  19. 0 1
      arch/arm/mach-omap2/pipe3-phy.c
  20. 0 1
      arch/arm/mach-snapdragon/dram.c
  21. 0 1
      arch/arm/mach-tegra/tegra20/display.c
  22. 0 1
      arch/arm/mach-versatile/timer.c
  23. 0 1
      arch/m68k/cpu/mcf530x/Makefile
  24. 0 1
      arch/m68k/include/asm/immap_5307.h
  25. 0 1
      arch/m68k/include/asm/m5307.h
  26. 0 1
      arch/mips/mach-jz47xx/include/mach/jz4780_dram.h
  27. 0 1
      arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
  28. 0 1
      arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
  29. 0 1
      arch/powerpc/lib/ppccache.S
  30. 0 1
      arch/sh/lib/time.c
  31. 0 1
      arch/xtensa/include/asm/arch-dc232b/core.h
  32. 0 1
      arch/xtensa/include/asm/arch-dc232b/tie-asm.h
  33. 0 1
      arch/xtensa/include/asm/arch-dc232b/tie.h
  34. 0 1
      arch/xtensa/include/asm/arch-dc233c/core.h
  35. 0 1
      arch/xtensa/include/asm/arch-dc233c/tie-asm.h
  36. 0 1
      arch/xtensa/include/asm/arch-dc233c/tie.h
  37. 0 1
      arch/xtensa/include/asm/arch-de212/core.h
  38. 0 1
      arch/xtensa/include/asm/arch-de212/tie-asm.h
  39. 0 1
      arch/xtensa/include/asm/arch-de212/tie.h
  40. 0 1
      arch/xtensa/include/asm/regs.h
  41. 0 1
      arch/xtensa/lib/relocate.c
  42. 0 1
      board/Marvell/octeontx/smc.c
  43. 0 1
      board/Marvell/octeontx2/soc-utils.c
  44. 0 1
      board/atmark-techno/armadillo-800eva/Makefile
  45. 0 1
      board/atmel/sama7g5ek/sama7g5ek.c
  46. 0 1
      board/beacon/imx8mn/README
  47. 0 1
      board/beacon/imx8mn/lpddr4_timing.c
  48. 0 1
      board/boundary/nitrogen6x/README.mx6qsabrelite
  49. 0 1
      board/cadence/xtfpga/README
  50. 0 1
      board/compulab/cm_t43/spl.c
  51. 0 1
      board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_01061010.1_2.c
  52. 0 1
      board/freescale/common/zm7300.c
  53. 0 1
      board/freescale/imx8mn_evk/ddr4_timing.c
  54. 0 1
      board/freescale/imx8mn_evk/ddr4_timing_ld.c
  55. 0 1
      board/freescale/ls2080aqds/README
  56. 0 1
      board/freescale/ls2080ardb/README
  57. 0 1
      board/freescale/mx6memcal/mx6memcal.c
  58. 0 1
      board/freescale/t4rdb/cpld.h
  59. 0 1
      board/gateworks/gw_ventana/Makefile
  60. 0 1
      board/gateworks/gw_ventana/gsc.h
  61. 0 1
      board/gdsys/a38x/dt_helpers.c
  62. 0 1
      board/ge/common/ge_rtc.c
  63. 0 1
      board/ge/mx53ppd/mx53ppd_video.c
  64. 0 1
      board/hisilicon/poplar/poplar.c
  65. 0 1
      board/keymile/common/qrio.c
  66. 0 1
      board/logicpd/imx6/Makefile
  67. 0 1
      board/logicpd/imx6/README
  68. 0 1
      board/mediatek/mt7622/Makefile
  69. 0 1
      board/mqmaker/miqi_rk3288/miqi-rk3288.c
  70. 0 1
      board/mscc/jr2/Makefile
  71. 0 1
      board/mscc/ocelot/Makefile
  72. 0 1
      board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.c
  73. 0 1
      board/phytium/durian/Makefile
  74. 0 1
      board/phytium/durian/cpu.h
  75. 0 1
      board/phytium/durian/durian.c
  76. 0 1
      board/rockchip/evb_rk3229/evb_rk3229.c
  77. 0 1
      board/rockchip/evb_rk3288/evb-rk3288.c
  78. 0 1
      board/rockchip/evb_rk3328/evb-rk3328.c
  79. 0 1
      board/synopsys/axs10x/axs10x.h
  80. 0 1
      board/technexion/pico-imx7d/pico-imx7d.c
  81. 0 1
      board/technexion/pico-imx8mq/lpddr4_timing_1gb.c
  82. 0 1
      board/technexion/pico-imx8mq/lpddr4_timing_2gb.c
  83. 0 1
      board/technexion/pico-imx8mq/lpddr4_timing_3gb.c
  84. 0 1
      board/technexion/pico-imx8mq/lpddr4_timing_4gb.c
  85. 0 1
      board/terasic/de0-nano-soc/qts/pll_config.h
  86. 0 1
      board/xen/xenguest_arm64/xenguest_arm64.c
  87. 0 1
      board/xilinx/versal/cmds.c
  88. 0 4
      board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c
  89. 0 4
      board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c
  90. 0 4
      board/xilinx/zynq/zynq-zed/ps7_init_gpl.c
  91. 0 1
      board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c
  92. 0 1
      cmd/pvblock.c
  93. 0 1
      cmd/scp03.c
  94. 0 1
      cmd/smccc.c
  95. 0 1
      common/lcd_console.c
  96. 0 2
      common/spl/spl_ram.c
  97. 0 1
      doc/README.pcap
  98. 0 1
      doc/device-tree-bindings/mmc/snps,dw-mmc.txt
  99. 0 1
      doc/device-tree-bindings/net/mdio.txt
  100. 0 1
      doc/device-tree-bindings/w1-eeprom/ds24xxx.txt

+ 0 - 1
arch/arm/cpu/arm926ejs/cache.c

@@ -89,4 +89,3 @@ void enable_caches(void)
 	dcache_enable();
 	dcache_enable();
 #endif
 #endif
 }
 }
-

+ 0 - 1
arch/arm/cpu/armv7/psci-common.c

@@ -43,4 +43,3 @@ u32 __secure psci_get_context_id(int cpu)
 {
 {
 	return psci_context_id[cpu];
 	return psci_context_id[cpu];
 }
 }
-

+ 0 - 2
arch/arm/cpu/armv8/hisilicon/pinmux.c

@@ -181,5 +181,3 @@ int hi6220_pinmux_config(int peripheral)
 
 
 	return 0;
 	return 0;
 }
 }
-
-

+ 0 - 1
arch/arm/cpu/armv8/xen/hypercall.S

@@ -76,4 +76,3 @@ HYPERCALL2(sched_op);
 HYPERCALL2(event_channel_op);
 HYPERCALL2(event_channel_op);
 HYPERCALL2(hvm_op);
 HYPERCALL2(hvm_op);
 HYPERCALL2(memory_op);
 HYPERCALL2(memory_op);
-

+ 0 - 1
arch/arm/dts/sama7g5-pinfunc.h

@@ -921,4 +921,3 @@
 #define PIN_PE7__TIOA4			PINMUX_PIN(PIN_PE7, 3, 3)
 #define PIN_PE7__TIOA4			PINMUX_PIN(PIN_PE7, 3, 3)
 #define PIN_PE7__ISC_D11		PINMUX_PIN(PIN_PE7, 5, 2)
 #define PIN_PE7__ISC_D11		PINMUX_PIN(PIN_PE7, 5, 2)
 #define PIN_PE7__G1_TSUCOMP		PINMUX_PIN(PIN_PE7, 7, 1)
 #define PIN_PE7__G1_TSUCOMP		PINMUX_PIN(PIN_PE7, 7, 1)
-

+ 0 - 1
arch/arm/include/asm/arch-imxrt/imxrt.h

@@ -8,4 +8,3 @@
 #define _ASM_ARCH_IMXRT_H
 #define _ASM_ARCH_IMXRT_H
 
 
 #endif /* _ASM_ARCH_IMXRT_H */
 #endif /* _ASM_ARCH_IMXRT_H */
-

+ 0 - 1
arch/arm/include/asm/arch-rockchip/f_rockusb.h

@@ -133,4 +133,3 @@ struct f_rockusb {
 /* init rockusb device, tell rockusb which device you want to read/write*/
 /* init rockusb device, tell rockusb which device you want to read/write*/
 void rockusb_dev_init(char *dev_type, int dev_index);
 void rockusb_dev_init(char *dev_type, int dev_index);
 #endif /* _F_ROCKUSB_H_ */
 #endif /* _F_ROCKUSB_H_ */
-

+ 0 - 1
arch/arm/include/asm/arch-stm32/stm32f.h

@@ -18,4 +18,3 @@
 void stm32_flash_latency_cfg(int latency);
 void stm32_flash_latency_cfg(int latency);
 
 
 #endif /* _ASM_ARCH_STM32F_H */
 #endif /* _ASM_ARCH_STM32F_H */
-

+ 0 - 1
arch/arm/include/asm/arch-stv0991/stv0991_defs.h

@@ -12,4 +12,3 @@ extern int stv0991_pinmux_config(enum periph_id);
 extern int clock_setup(enum periph_clock);
 extern int clock_setup(enum periph_clock);
 
 
 #endif
 #endif
-

+ 0 - 1
arch/arm/include/asm/xen.h

@@ -4,4 +4,3 @@
  */
  */
 
 
 extern unsigned long rom_pointer[];
 extern unsigned long rom_pointer[];
-

+ 0 - 1
arch/arm/lib/ccn504.S

@@ -78,4 +78,3 @@ ENTRY(ccn504_set_aux)
 
 
 	ret
 	ret
 ENDPROC(ccn504_set_aux)
 ENDPROC(ccn504_set_aux)
-

+ 0 - 1
arch/arm/mach-at91/armv7/sama7g5_devices.c

@@ -8,4 +8,3 @@ char *get_cpu_name(void)
 {
 {
 	return "SAMA7G5";
 	return "SAMA7G5";
 }
 }
-

+ 0 - 1
arch/arm/mach-at91/atmel_sfr.c

@@ -39,4 +39,3 @@ void configure_ddrcfg_input_buffers(bool open)
 	else
 	else
 		writel(0, &sfr->ddrcfg);
 		writel(0, &sfr->ddrcfg);
 }
 }
-

+ 0 - 1
arch/arm/mach-bcm283x/msg.c

@@ -196,4 +196,3 @@ int bcm2711_notify_vl805_reset(void)
 
 
 	return 0;
 	return 0;
 }
 }
-

+ 0 - 1
arch/arm/mach-imx/mx7/soc.c

@@ -445,4 +445,3 @@ void reset_misc(void)
 #endif
 #endif
 #endif
 #endif
 }
 }
-

+ 0 - 1
arch/arm/mach-kirkwood/cpu.c

@@ -278,4 +278,3 @@ int cpu_eth_init(struct bd_info *bis)
 	return 0;
 	return 0;
 }
 }
 #endif
 #endif
-

+ 0 - 1
arch/arm/mach-octeontx/Makefile

@@ -6,4 +6,3 @@
 # */
 # */
 
 
 obj-y += lowlevel_init.o clock.o cpu.o
 obj-y += lowlevel_init.o clock.o cpu.o
-

+ 0 - 1
arch/arm/mach-octeontx2/Makefile

@@ -6,4 +6,3 @@
 # */
 # */
 
 
 obj-y += lowlevel_init.o clock.o cpu.o
 obj-y += lowlevel_init.o clock.o cpu.o
-

+ 0 - 1
arch/arm/mach-omap2/pipe3-phy.c

@@ -229,4 +229,3 @@ int phy_pipe3_power_off(struct omap_pipe3 *phy)
 
 
 	return 0;
 	return 0;
 }
 }
-

+ 0 - 1
arch/arm/mach-snapdragon/dram.c

@@ -97,4 +97,3 @@ int msm_fixup_memory(void *blob)
 
 
 	return 0;
 	return 0;
 }
 }
-

+ 0 - 1
arch/arm/mach-tegra/tegra20/display.c

@@ -12,4 +12,3 @@
 #include <asm/arch-tegra/dc.h>
 #include <asm/arch-tegra/dc.h>
 #include <asm/arch-tegra/clk_rst.h>
 #include <asm/arch-tegra/clk_rst.h>
 #include <asm/arch-tegra/timer.h>
 #include <asm/arch-tegra/timer.h>
-

+ 0 - 1
arch/arm/mach-versatile/timer.c

@@ -60,4 +60,3 @@ int timer_init (void)
 
 
 	return 0;
 	return 0;
 }
 }
-

+ 0 - 1
arch/m68k/cpu/mcf530x/Makefile

@@ -4,4 +4,3 @@
 
 
 extra-y	= start.o
 extra-y	= start.o
 obj-y	= interrupts.o cpu.o speed.o cpu_init.o
 obj-y	= interrupts.o cpu.o speed.o cpu_init.o
-

+ 0 - 1
arch/m68k/include/asm/immap_5307.h

@@ -114,4 +114,3 @@ typedef struct gpio {
 } gpio_t;
 } gpio_t;
 
 
 #endif				/* __IMMAP_5307__ */
 #endif				/* __IMMAP_5307__ */
-

+ 0 - 1
arch/m68k/include/asm/m5307.h

@@ -66,4 +66,3 @@
 #define	MCFSIM_ICR_PRI3		0x03	/* Priority 3 intr */
 #define	MCFSIM_ICR_PRI3		0x03	/* Priority 3 intr */
 
 
 #endif	/* mcf5307_h */
 #endif	/* mcf5307_h */
-

+ 0 - 1
arch/mips/mach-jz47xx/include/mach/jz4780_dram.h

@@ -454,4 +454,3 @@ void pll_init(void);
 void sdram_init(void);
 void sdram_init(void);
 
 
 #endif	/* __JZ4780_DRAM_H__ */
 #endif	/* __JZ4780_DRAM_H__ */
-

+ 0 - 1
arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c

@@ -399,4 +399,3 @@ const char *serdes_clock_to_string(u32 clock)
 #endif
 #endif
 	}
 	}
 }
 }
-

+ 0 - 1
arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c

@@ -885,4 +885,3 @@ const char *serdes_clock_to_string(u32 clock)
 		return "150";
 		return "150";
 	}
 	}
 }
 }
-

+ 0 - 1
arch/powerpc/lib/ppccache.S

@@ -104,4 +104,3 @@ _GLOBAL(invalidate_dcache_range)
 	sync				/* wait for dcbi's to get to ram */
 	sync				/* wait for dcbi's to get to ram */
 #endif
 #endif
 	blr
 	blr
-

+ 0 - 1
arch/sh/lib/time.c

@@ -32,4 +32,3 @@ int timer_init(void)
 
 
 	return 0;
 	return 0;
 }
 }
-

+ 0 - 1
arch/xtensa/include/asm/arch-dc232b/core.h

@@ -419,4 +419,3 @@
 
 
 
 
 #endif /* _XTENSA_CORE_CONFIGURATION_H */
 #endif /* _XTENSA_CORE_CONFIGURATION_H */
-

+ 0 - 1
arch/xtensa/include/asm/arch-dc232b/tie-asm.h

@@ -117,4 +117,3 @@
 #define XCHAL_SA_NUM_ATMPS	2
 #define XCHAL_SA_NUM_ATMPS	2
 
 
 #endif /*_XTENSA_CORE_TIE_ASM_H*/
 #endif /*_XTENSA_CORE_TIE_ASM_H*/
-

+ 0 - 1
arch/xtensa/include/asm/arch-dc232b/tie.h

@@ -126,4 +126,3 @@
 #define XCHAL_OP0_FORMAT_LENGTHS	3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3
 #define XCHAL_OP0_FORMAT_LENGTHS	3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3
 
 
 #endif /*_XTENSA_CORE_TIE_H*/
 #endif /*_XTENSA_CORE_TIE_H*/
-

+ 0 - 1
arch/xtensa/include/asm/arch-dc233c/core.h

@@ -450,4 +450,3 @@
 
 
 
 
 #endif /* _XTENSA_CORE_CONFIGURATION_H */
 #endif /* _XTENSA_CORE_CONFIGURATION_H */
-

+ 0 - 1
arch/xtensa/include/asm/arch-dc233c/tie-asm.h

@@ -169,4 +169,3 @@
 #define XCHAL_SA_NUM_ATMPS	1
 #define XCHAL_SA_NUM_ATMPS	1
 
 
 #endif /*_XTENSA_CORE_TIE_ASM_H*/
 #endif /*_XTENSA_CORE_TIE_ASM_H*/
-

+ 0 - 1
arch/xtensa/include/asm/arch-dc233c/tie.h

@@ -126,4 +126,3 @@
 #define XCHAL_OP0_FORMAT_LENGTHS	3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3
 #define XCHAL_OP0_FORMAT_LENGTHS	3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3
 
 
 #endif /*_XTENSA_CORE_TIE_H*/
 #endif /*_XTENSA_CORE_TIE_H*/
-

+ 0 - 1
arch/xtensa/include/asm/arch-de212/core.h

@@ -569,4 +569,3 @@
 
 
 
 
 #endif /* _XTENSA_CORE_CONFIGURATION_H */
 #endif /* _XTENSA_CORE_CONFIGURATION_H */
-

+ 0 - 1
arch/xtensa/include/asm/arch-de212/tie-asm.h

@@ -146,4 +146,3 @@
 #define XCHAL_SA_NUM_ATMPS	1
 #define XCHAL_SA_NUM_ATMPS	1
 
 
 #endif /*_XTENSA_CORE_TIE_ASM_H*/
 #endif /*_XTENSA_CORE_TIE_ASM_H*/
-

+ 0 - 1
arch/xtensa/include/asm/arch-de212/tie.h

@@ -112,4 +112,3 @@
 	3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3
 	3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3, 3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3
 
 
 #endif /*_XTENSA_CORE_TIE_H*/
 #endif /*_XTENSA_CORE_TIE_H*/
-

+ 0 - 1
arch/xtensa/include/asm/regs.h

@@ -91,4 +91,3 @@
 #define DEBUGCAUSE_ICOUNT_BIT		0	/* ICOUNT would incr. to zero */
 #define DEBUGCAUSE_ICOUNT_BIT		0	/* ICOUNT would incr. to zero */
 
 
 #endif /* _XTENSA_SPECREG_H */
 #endif /* _XTENSA_SPECREG_H */
-

+ 0 - 1
arch/xtensa/lib/relocate.c

@@ -14,4 +14,3 @@ int clear_bss(void)
 	memset((void *)&__bss_start, 0x00, len);
 	memset((void *)&__bss_start, 0x00, len);
 	return 0;
 	return 0;
 }
 }
-

+ 0 - 1
board/Marvell/octeontx/smc.c

@@ -22,4 +22,3 @@ ssize_t smc_dram_size(unsigned int node)
 
 
 	return regs.regs[0];
 	return regs.regs[0];
 }
 }
-

+ 0 - 1
board/Marvell/octeontx2/soc-utils.c

@@ -46,4 +46,3 @@ const char *read_board_name(void)
 {
 {
 	return fdt_get_board_model();
 	return fdt_get_board_model();
 }
 }
-

+ 0 - 1
board/atmark-techno/armadillo-800eva/Makefile

@@ -3,4 +3,3 @@
 # Copyright (C) 2012  Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
 # Copyright (C) 2012  Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
 
 
 obj-y	+= armadillo-800eva.o
 obj-y	+= armadillo-800eva.o
-

+ 0 - 1
board/atmel/sama7g5ek/sama7g5ek.c

@@ -74,4 +74,3 @@ int dram_init(void)
 				    CONFIG_SYS_SDRAM_SIZE);
 				    CONFIG_SYS_SDRAM_SIZE);
 	return 0;
 	return 0;
 }
 }
-

+ 0 - 1
board/beacon/imx8mn/README

@@ -36,4 +36,3 @@ Boot
 ====
 ====
 Set baseboard DIP switch:
 Set baseboard DIP switch:
 S17: 1100XXXX
 S17: 1100XXXX
-

+ 0 - 1
board/beacon/imx8mn/lpddr4_timing.c

@@ -1431,4 +1431,3 @@ struct dram_timing_info dram_timing = {
 	.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
 	.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
 	.fsp_table = { 3200, 400, 100, },
 	.fsp_table = { 3200, 400, 100, },
 };
 };
-

+ 0 - 1
board/boundary/nitrogen6x/README.mx6qsabrelite

@@ -116,4 +116,3 @@ Note: This will upload and run the U-Boot image in memory, the SPI will not be
 5. Use one of previous descriptions to re-flash the SPI-NOR as required.
 5. Use one of previous descriptions to re-flash the SPI-NOR as required.
 
 
 6. Ensure SW1 is returned to "00" to boot from the fuses once done.
 6. Ensure SW1 is returned to "00" to boot from the fuses once done.
-

+ 0 - 1
board/cadence/xtfpga/README

@@ -122,4 +122,3 @@ variable to make.
 Because this problem is easy to fall into and difficult to debug
 Because this problem is easy to fall into and difficult to debug
 if one doesn't expect it, the linker script provides a link-time
 if one doesn't expect it, the linker script provides a link-time
 check and fatal error message if the image size exceeds 128 KB.
 check and fatal error message if the image size exceeds 128 KB.
-

+ 0 - 1
board/compulab/cm_t43/spl.c

@@ -133,4 +133,3 @@ void sdram_init(void)
 
 
 	hang();
 	hang();
 }
 }
-

+ 0 - 1
board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_01061010.1_2.c

@@ -1845,4 +1845,3 @@ struct dram_timing_info ucm_dram_timing_01061010 = {
 	.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
 	.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
 	.fsp_table = { 2400, 400, 100, },
 	.fsp_table = { 2400, 400, 100, },
 };
 };
-

+ 0 - 1
board/freescale/common/zm7300.c

@@ -230,4 +230,3 @@ int zm_enable_wp()
 	}
 	}
 	return 0;
 	return 0;
 }
 }
-

+ 0 - 1
board/freescale/imx8mn_evk/ddr4_timing.c

@@ -1052,4 +1052,3 @@ struct dram_timing_info dram_timing = {
 	.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
 	.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
 	.fsp_table = { 2400, 1066, },
 	.fsp_table = { 2400, 1066, },
 };
 };
-

+ 0 - 1
board/freescale/imx8mn_evk/ddr4_timing_ld.c

@@ -1054,4 +1054,3 @@ struct dram_timing_info dram_timing = {
 	.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
 	.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
 	.fsp_table = { 1600, 1066, },
 	.fsp_table = { 1600, 1066, },
 };
 };
-

+ 0 - 1
board/freescale/ls2080aqds/README

@@ -213,4 +213,3 @@ DPMAC13 -> PHY4-P0
 DPMAC14 -> PHY4-P1
 DPMAC14 -> PHY4-P1
 DPMAC15 -> PHY4-P2
 DPMAC15 -> PHY4-P2
 DPMAC16 -> PHY4-P3
 DPMAC16 -> PHY4-P3
-

+ 0 - 1
board/freescale/ls2080ardb/README

@@ -132,4 +132,3 @@ below:
 => setenv bootargs 'console=ttyS1,115200 root=/dev/ram
 => setenv bootargs 'console=ttyS1,115200 root=/dev/ram
    earlycon=uart8250,mmio,0x21c0600,115200 default_hugepagesz=2m hugepagesz=2m
    earlycon=uart8250,mmio,0x21c0600,115200 default_hugepagesz=2m hugepagesz=2m
    hugepages=16 mem=2048M'
    hugepages=16 mem=2048M'
-

+ 0 - 1
board/freescale/mx6memcal/mx6memcal.c

@@ -30,4 +30,3 @@ int dram_init(void)
 	gd->ram_size = imx_ddr_size();
 	gd->ram_size = imx_ddr_size();
 	return 0;
 	return 0;
 }
 }
-

+ 0 - 1
board/freescale/t4rdb/cpld.h

@@ -45,4 +45,3 @@ void cpld_write(unsigned int reg, u8 value);
 #define CPLD_READ(reg) cpld_read(offsetof(struct cpld_data, reg))
 #define CPLD_READ(reg) cpld_read(offsetof(struct cpld_data, reg))
 #define CPLD_WRITE(reg, value) \
 #define CPLD_WRITE(reg, value) \
 		cpld_write(offsetof(struct cpld_data, reg), value)
 		cpld_write(offsetof(struct cpld_data, reg), value)
-

+ 0 - 1
board/gateworks/gw_ventana/Makefile

@@ -8,4 +8,3 @@
 
 
 obj-y  := gw_ventana.o gsc.o eeprom.o common.o
 obj-y  := gw_ventana.o gsc.o eeprom.o common.o
 obj-$(CONFIG_SPL_BUILD) += gw_ventana_spl.o
 obj-$(CONFIG_SPL_BUILD) += gw_ventana_spl.o
-

+ 0 - 1
board/gateworks/gw_ventana/gsc.h

@@ -69,4 +69,3 @@ int gsc_info(int verbose);
 int gsc_boot_wd_disable(void);
 int gsc_boot_wd_disable(void);
 const char *gsc_get_dtb_name(int level, char *buf, int sz);
 const char *gsc_get_dtb_name(int level, char *buf, int sz);
 #endif
 #endif
-

+ 0 - 1
board/gdsys/a38x/dt_helpers.c

@@ -39,4 +39,3 @@ int request_gpio_by_name(struct gpio_desc *gpio, const char *gpio_dev_name,
 
 
 	return dm_gpio_request(gpio, gpio_name);
 	return dm_gpio_request(gpio, gpio_name);
 }
 }
-

+ 0 - 1
board/ge/common/ge_rtc.c

@@ -53,4 +53,3 @@ void check_time(void)
 	else
 	else
 		env_set("rtc_status", "OK");
 		env_set("rtc_status", "OK");
 }
 }
-

+ 0 - 1
board/ge/mx53ppd/mx53ppd_video.c

@@ -92,4 +92,3 @@ struct display_info_t const displays[] = {
 };
 };
 
 
 size_t display_count = ARRAY_SIZE(displays);
 size_t display_count = ARRAY_SIZE(displays);
-

+ 0 - 1
board/hisilicon/poplar/poplar.c

@@ -195,4 +195,3 @@ int board_init(void)
 
 
 	return 0;
 	return 0;
 }
 }
-

+ 0 - 1
board/keymile/common/qrio.c

@@ -290,4 +290,3 @@ int get_scl(void)
 	return qrio_get_gpio(KM_I2C_DEBLOCK_PORT,
 	return qrio_get_gpio(KM_I2C_DEBLOCK_PORT,
 			     KM_I2C_DEBLOCK_SCL);
 			     KM_I2C_DEBLOCK_SCL);
 }
 }
-

+ 0 - 1
board/logicpd/imx6/Makefile

@@ -7,4 +7,3 @@
 #
 #
 
 
 obj-y  := imx6logic.o
 obj-y  := imx6logic.o
-

+ 0 - 1
board/logicpd/imx6/README

@@ -80,4 +80,3 @@ while starting.
 
 
 Additional Support Documentation can be found at:
 Additional Support Documentation can be found at:
 https://support.logicpd.com/
 https://support.logicpd.com/
-

+ 0 - 1
board/mediatek/mt7622/Makefile

@@ -1,4 +1,3 @@
 # SPDX-License-Identifier:	GPL-2.0
 # SPDX-License-Identifier:	GPL-2.0
 
 
 obj-y	+= mt7622_rfb.o
 obj-y	+= mt7622_rfb.o
-

+ 0 - 1
board/mqmaker/miqi_rk3288/miqi-rk3288.c

@@ -2,4 +2,3 @@
 /*
 /*
  * (C) Copyright 2016 Rockchip Electronics Co., Ltd
  * (C) Copyright 2016 Rockchip Electronics Co., Ltd
  */
  */
-

+ 0 - 1
board/mscc/jr2/Makefile

@@ -1,4 +1,3 @@
 # SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 # SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 
 
 obj-$(CONFIG_SOC_JR2)	:= jr2.o
 obj-$(CONFIG_SOC_JR2)	:= jr2.o
-

+ 0 - 1
board/mscc/ocelot/Makefile

@@ -1,4 +1,3 @@
 # SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 # SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 
 
 obj-$(CONFIG_SOC_OCELOT)	:= ocelot.o
 obj-$(CONFIG_SOC_OCELOT)	:= ocelot.o
-

+ 0 - 1
board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.c

@@ -289,4 +289,3 @@ int ps7_init(void)
 		return ret;
 		return ret;
 	return PS7_INIT_SUCCESS;
 	return PS7_INIT_SUCCESS;
 }
 }
-

+ 0 - 1
board/phytium/durian/Makefile

@@ -6,4 +6,3 @@
 #
 #
 
 
 obj-y += durian.o
 obj-y += durian.o
-

+ 0 - 1
board/phytium/durian/cpu.h

@@ -20,4 +20,3 @@
 #define HNF_BASE            (unsigned long)(0x3A200000)
 #define HNF_BASE            (unsigned long)(0x3A200000)
 
 
 #endif /* _FT_DURIAN_H */
 #endif /* _FT_DURIAN_H */
-

+ 0 - 1
board/phytium/durian/durian.c

@@ -113,4 +113,3 @@ int last_stage_init(void)
 	}
 	}
 	return ret;
 	return ret;
 }
 }
-

+ 0 - 1
board/rockchip/evb_rk3229/evb_rk3229.c

@@ -7,4 +7,3 @@
 #include <dm.h>
 #include <dm.h>
 #include <asm/io.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/uart.h>
 #include <asm/arch-rockchip/uart.h>
-

+ 0 - 1
board/rockchip/evb_rk3288/evb-rk3288.c

@@ -2,4 +2,3 @@
 /*
 /*
  * (C) Copyright 2016 Rockchip Electronics Co., Ltd
  * (C) Copyright 2016 Rockchip Electronics Co., Ltd
  */
  */
-

+ 0 - 1
board/rockchip/evb_rk3328/evb-rk3328.c

@@ -2,4 +2,3 @@
 /*
 /*
  * (C) Copyright 2016 Rockchip Electronics Co., Ltd
  * (C) Copyright 2016 Rockchip Electronics Co., Ltd
  */
  */
-

+ 0 - 1
board/synopsys/axs10x/axs10x.h

@@ -12,4 +12,3 @@ enum {
 };
 };
 
 
 #endif /* _BOARD_SYNOPSYS_AXS10X_H */
 #endif /* _BOARD_SYNOPSYS_AXS10X_H */
-

+ 0 - 1
board/technexion/pico-imx7d/pico-imx7d.c

@@ -244,4 +244,3 @@ int board_ehci_hcd_init(int port)
 	}
 	}
 	return 0;
 	return 0;
 }
 }
-

+ 0 - 1
board/technexion/pico-imx8mq/lpddr4_timing_1gb.c

@@ -1731,4 +1731,3 @@ struct dram_timing_info dram_timing_1gb = {
 	.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
 	.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
 	.fsp_table = { 3200, 667, },
 	.fsp_table = { 3200, 667, },
 };
 };
-

+ 0 - 1
board/technexion/pico-imx8mq/lpddr4_timing_2gb.c

@@ -1731,4 +1731,3 @@ struct dram_timing_info dram_timing_2gb = {
 	.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
 	.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
 	.fsp_table = { 3200, 667, },
 	.fsp_table = { 3200, 667, },
 };
 };
-

+ 0 - 1
board/technexion/pico-imx8mq/lpddr4_timing_3gb.c

@@ -1731,4 +1731,3 @@ struct dram_timing_info dram_timing_3gb = {
 	.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
 	.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
 	.fsp_table = { 3200, 667, },
 	.fsp_table = { 3200, 667, },
 };
 };
-

+ 0 - 1
board/technexion/pico-imx8mq/lpddr4_timing_4gb.c

@@ -1731,4 +1731,3 @@ struct dram_timing_info dram_timing_4gb = {
 	.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
 	.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
 	.fsp_table = { 3200, 667, },
 	.fsp_table = { 3200, 667, },
 };
 };
-

+ 0 - 1
board/terasic/de0-nano-soc/qts/pll_config.h

@@ -81,4 +81,3 @@
 #define CONFIG_HPS_ALTERAGRP_DBGATCLK 4
 #define CONFIG_HPS_ALTERAGRP_DBGATCLK 4
 
 
 #endif /* _PRELOADER_PLL_CONFIG_H_ */
 #endif /* _PRELOADER_PLL_CONFIG_H_ */
-

+ 0 - 1
board/xen/xenguest_arm64/xenguest_arm64.c

@@ -195,4 +195,3 @@ void board_cleanup_before_linux(void)
 {
 {
 	xen_fini();
 	xen_fini();
 }
 }
-

+ 0 - 1
board/xilinx/versal/cmds.c

@@ -102,4 +102,3 @@ U_BOOT_CMD(versal, 4, 1, do_versal,
 	   "versal sub-system",
 	   "versal sub-system",
 	   versal_help_text
 	   versal_help_text
 )
 )
-

+ 0 - 4
board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c

@@ -12485,7 +12485,3 @@ ps7_init()
   //xil_printf ("\n PCW Silicon Version : %d.0", pcw_ver);
   //xil_printf ("\n PCW Silicon Version : %d.0", pcw_ver);
   return PS7_INIT_SUCCESS;
   return PS7_INIT_SUCCESS;
 }
 }
-
-
-
-

+ 0 - 4
board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c

@@ -12725,7 +12725,3 @@ ps7_init()
   //xil_printf ("\n PCW Silicon Version : %d.0", pcw_ver);
   //xil_printf ("\n PCW Silicon Version : %d.0", pcw_ver);
   return PS7_INIT_SUCCESS;
   return PS7_INIT_SUCCESS;
 }
 }
-
-
-
-

+ 0 - 4
board/xilinx/zynq/zynq-zed/ps7_init_gpl.c

@@ -12383,7 +12383,3 @@ ps7_init()
   //xil_printf ("\n PCW Silicon Version : %d.0", pcw_ver);
   //xil_printf ("\n PCW Silicon Version : %d.0", pcw_ver);
   return PS7_INIT_SUCCESS;
   return PS7_INIT_SUCCESS;
 }
 }
-
-
-
-

+ 0 - 1
board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c

@@ -12565,4 +12565,3 @@ int ps7_init(void)
 		return ret;
 		return ret;
 	return PS7_INIT_SUCCESS;
 	return PS7_INIT_SUCCESS;
 }
 }
-

+ 0 - 1
cmd/pvblock.c

@@ -27,4 +27,3 @@ U_BOOT_CMD(pvblock, 5, 1, do_pvblock,
 	   "pvblock write addr blk# cnt - read/write `cnt'"
 	   "pvblock write addr blk# cnt - read/write `cnt'"
 	   " blocks starting at block `blk#'\n"
 	   " blocks starting at block `blk#'\n"
 	   "    to/from memory address `addr'");
 	   "    to/from memory address `addr'");
-

+ 0 - 1
cmd/scp03.c

@@ -49,4 +49,3 @@ static char text[] =
 U_BOOT_CMD_WITH_SUBCMDS(scp03, "Secure Channel Protocol 03 control", text,
 U_BOOT_CMD_WITH_SUBCMDS(scp03, "Secure Channel Protocol 03 control", text,
 	U_BOOT_SUBCMD_MKENT(enable, 1, 1, do_scp03_enable),
 	U_BOOT_SUBCMD_MKENT(enable, 1, 1, do_scp03_enable),
 	U_BOOT_SUBCMD_MKENT(provision, 1, 1, do_scp03_provision));
 	U_BOOT_SUBCMD_MKENT(provision, 1, 1, do_scp03_provision));
-

+ 0 - 1
cmd/smccc.c

@@ -69,4 +69,3 @@ U_BOOT_CMD(
 	"  - id  Session ID, passed to W7 (defaults to zero)\n"
 	"  - id  Session ID, passed to W7 (defaults to zero)\n"
 );
 );
 #endif
 #endif
-

+ 0 - 1
common/lcd_console.c

@@ -258,4 +258,3 @@ U_BOOT_CMD(
 	"print string on lcd-framebuffer",
 	"print string on lcd-framebuffer",
 	"    <string>"
 	"    <string>"
 );
 );
-

+ 0 - 2
common/spl/spl_ram.c

@@ -81,5 +81,3 @@ SPL_LOAD_IMAGE_METHOD("RAM", 0, BOOT_DEVICE_RAM, spl_ram_load_image);
 #if CONFIG_IS_ENABLED(DFU)
 #if CONFIG_IS_ENABLED(DFU)
 SPL_LOAD_IMAGE_METHOD("DFU", 0, BOOT_DEVICE_DFU, spl_ram_load_image);
 SPL_LOAD_IMAGE_METHOD("DFU", 0, BOOT_DEVICE_DFU, spl_ram_load_image);
 #endif
 #endif
-
-

+ 0 - 1
doc/README.pcap

@@ -59,4 +59,3 @@ PCAP status:
 
 
 # pcap stop
 # pcap stop
 # tftpput 0xffffffff80100000 $pcapsize 10.0.2.2:capture.pcap
 # tftpput 0xffffffff80100000 $pcapsize 10.0.2.2:capture.pcap
-

+ 0 - 1
doc/device-tree-bindings/mmc/snps,dw-mmc.txt

@@ -30,4 +30,3 @@ mmc0@f000a000 {
 	clock-names = "biu", "ciu";
 	clock-names = "biu", "ciu";
 	max-frequency = <25000000>;
 	max-frequency = <25000000>;
 };
 };
-

+ 0 - 1
doc/device-tree-bindings/net/mdio.txt

@@ -33,4 +33,3 @@ requires no compatible property for probing.
 		reg = <2>;
 		reg = <2>;
 	};
 	};
 };
 };
-

+ 0 - 1
doc/device-tree-bindings/w1-eeprom/ds24xxx.txt

@@ -34,4 +34,3 @@ onewire_tm: onewire {
 			compatible = "maxim,ds24xxx";
 			compatible = "maxim,ds24xxx";
 		}
 		}
 };
 };
-

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