msg.c 5.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2012 Stephen Warren
  4. */
  5. #include <common.h>
  6. #include <memalign.h>
  7. #include <phys2bus.h>
  8. #include <asm/arch/mbox.h>
  9. #include <linux/delay.h>
  10. struct msg_set_power_state {
  11. struct bcm2835_mbox_hdr hdr;
  12. struct bcm2835_mbox_tag_set_power_state set_power_state;
  13. u32 end_tag;
  14. };
  15. struct msg_get_clock_rate {
  16. struct bcm2835_mbox_hdr hdr;
  17. struct bcm2835_mbox_tag_get_clock_rate get_clock_rate;
  18. u32 end_tag;
  19. };
  20. struct msg_query {
  21. struct bcm2835_mbox_hdr hdr;
  22. struct bcm2835_mbox_tag_physical_w_h physical_w_h;
  23. u32 end_tag;
  24. };
  25. struct msg_setup {
  26. struct bcm2835_mbox_hdr hdr;
  27. struct bcm2835_mbox_tag_physical_w_h physical_w_h;
  28. struct bcm2835_mbox_tag_virtual_w_h virtual_w_h;
  29. struct bcm2835_mbox_tag_depth depth;
  30. struct bcm2835_mbox_tag_pixel_order pixel_order;
  31. struct bcm2835_mbox_tag_alpha_mode alpha_mode;
  32. struct bcm2835_mbox_tag_virtual_offset virtual_offset;
  33. struct bcm2835_mbox_tag_overscan overscan;
  34. struct bcm2835_mbox_tag_allocate_buffer allocate_buffer;
  35. struct bcm2835_mbox_tag_pitch pitch;
  36. u32 end_tag;
  37. };
  38. struct msg_notify_vl805_reset {
  39. struct bcm2835_mbox_hdr hdr;
  40. struct bcm2835_mbox_tag_pci_dev_addr dev_addr;
  41. u32 end_tag;
  42. };
  43. int bcm2835_power_on_module(u32 module)
  44. {
  45. ALLOC_CACHE_ALIGN_BUFFER(struct msg_set_power_state, msg_pwr, 1);
  46. int ret;
  47. BCM2835_MBOX_INIT_HDR(msg_pwr);
  48. BCM2835_MBOX_INIT_TAG(&msg_pwr->set_power_state,
  49. SET_POWER_STATE);
  50. msg_pwr->set_power_state.body.req.device_id = module;
  51. msg_pwr->set_power_state.body.req.state =
  52. BCM2835_MBOX_SET_POWER_STATE_REQ_ON |
  53. BCM2835_MBOX_SET_POWER_STATE_REQ_WAIT;
  54. ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN,
  55. &msg_pwr->hdr);
  56. if (ret) {
  57. printf("bcm2835: Could not set module %u power state\n",
  58. module);
  59. return -EIO;
  60. }
  61. return 0;
  62. }
  63. int bcm2835_get_mmc_clock(u32 clock_id)
  64. {
  65. ALLOC_CACHE_ALIGN_BUFFER(struct msg_get_clock_rate, msg_clk, 1);
  66. int ret;
  67. ret = bcm2835_power_on_module(BCM2835_MBOX_POWER_DEVID_SDHCI);
  68. if (ret)
  69. return ret;
  70. BCM2835_MBOX_INIT_HDR(msg_clk);
  71. BCM2835_MBOX_INIT_TAG(&msg_clk->get_clock_rate, GET_CLOCK_RATE);
  72. msg_clk->get_clock_rate.body.req.clock_id = clock_id;
  73. ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_clk->hdr);
  74. if (ret) {
  75. printf("bcm2835: Could not query eMMC clock rate\n");
  76. return -EIO;
  77. }
  78. return msg_clk->get_clock_rate.body.resp.rate_hz;
  79. }
  80. int bcm2835_get_video_size(int *widthp, int *heightp)
  81. {
  82. ALLOC_CACHE_ALIGN_BUFFER(struct msg_query, msg_query, 1);
  83. int ret;
  84. BCM2835_MBOX_INIT_HDR(msg_query);
  85. BCM2835_MBOX_INIT_TAG_NO_REQ(&msg_query->physical_w_h,
  86. GET_PHYSICAL_W_H);
  87. ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_query->hdr);
  88. if (ret) {
  89. printf("bcm2835: Could not query display resolution\n");
  90. return ret;
  91. }
  92. *widthp = msg_query->physical_w_h.body.resp.width;
  93. *heightp = msg_query->physical_w_h.body.resp.height;
  94. return 0;
  95. }
  96. int bcm2835_set_video_params(int *widthp, int *heightp, int depth_bpp,
  97. int pixel_order, int alpha_mode, ulong *fb_basep,
  98. ulong *fb_sizep, int *pitchp)
  99. {
  100. ALLOC_CACHE_ALIGN_BUFFER(struct msg_setup, msg_setup, 1);
  101. int ret;
  102. BCM2835_MBOX_INIT_HDR(msg_setup);
  103. BCM2835_MBOX_INIT_TAG(&msg_setup->physical_w_h, SET_PHYSICAL_W_H);
  104. msg_setup->physical_w_h.body.req.width = *widthp;
  105. msg_setup->physical_w_h.body.req.height = *heightp;
  106. BCM2835_MBOX_INIT_TAG(&msg_setup->virtual_w_h, SET_VIRTUAL_W_H);
  107. msg_setup->virtual_w_h.body.req.width = *widthp;
  108. msg_setup->virtual_w_h.body.req.height = *heightp;
  109. BCM2835_MBOX_INIT_TAG(&msg_setup->depth, SET_DEPTH);
  110. msg_setup->depth.body.req.bpp = 32;
  111. BCM2835_MBOX_INIT_TAG(&msg_setup->pixel_order, SET_PIXEL_ORDER);
  112. msg_setup->pixel_order.body.req.order = pixel_order;
  113. BCM2835_MBOX_INIT_TAG(&msg_setup->alpha_mode, SET_ALPHA_MODE);
  114. msg_setup->alpha_mode.body.req.alpha = alpha_mode;
  115. BCM2835_MBOX_INIT_TAG(&msg_setup->virtual_offset, SET_VIRTUAL_OFFSET);
  116. msg_setup->virtual_offset.body.req.x = 0;
  117. msg_setup->virtual_offset.body.req.y = 0;
  118. BCM2835_MBOX_INIT_TAG(&msg_setup->overscan, SET_OVERSCAN);
  119. msg_setup->overscan.body.req.top = 0;
  120. msg_setup->overscan.body.req.bottom = 0;
  121. msg_setup->overscan.body.req.left = 0;
  122. msg_setup->overscan.body.req.right = 0;
  123. BCM2835_MBOX_INIT_TAG(&msg_setup->allocate_buffer, ALLOCATE_BUFFER);
  124. msg_setup->allocate_buffer.body.req.alignment = 0x100;
  125. BCM2835_MBOX_INIT_TAG_NO_REQ(&msg_setup->pitch, GET_PITCH);
  126. ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_setup->hdr);
  127. if (ret) {
  128. printf("bcm2835: Could not configure display\n");
  129. return ret;
  130. }
  131. *widthp = msg_setup->physical_w_h.body.resp.width;
  132. *heightp = msg_setup->physical_w_h.body.resp.height;
  133. *pitchp = msg_setup->pitch.body.resp.pitch;
  134. *fb_basep = bus_to_phys(
  135. msg_setup->allocate_buffer.body.resp.fb_address);
  136. *fb_sizep = msg_setup->allocate_buffer.body.resp.fb_size;
  137. return 0;
  138. }
  139. /*
  140. * On the Raspberry Pi 4, after a PCI reset, VL805's (the xHCI chip) firmware
  141. * may either be loaded directly from an EEPROM or, if not present, by the
  142. * SoC's VideoCore. This informs VideoCore that VL805 needs its firmware
  143. * loaded.
  144. */
  145. int bcm2711_notify_vl805_reset(void)
  146. {
  147. ALLOC_CACHE_ALIGN_BUFFER(struct msg_notify_vl805_reset,
  148. msg_notify_vl805_reset, 1);
  149. int ret;
  150. BCM2835_MBOX_INIT_HDR(msg_notify_vl805_reset);
  151. BCM2835_MBOX_INIT_TAG(&msg_notify_vl805_reset->dev_addr,
  152. NOTIFY_XHCI_RESET);
  153. /*
  154. * The pci device address is expected like this:
  155. *
  156. * PCI_BUS << 20 | PCI_SLOT << 15 | PCI_FUNC << 12
  157. *
  158. * But since RPi4's PCIe setup is hardwired, we know the address in
  159. * advance.
  160. */
  161. msg_notify_vl805_reset->dev_addr.body.req.dev_addr = 0x100000;
  162. ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN,
  163. &msg_notify_vl805_reset->hdr);
  164. if (ret) {
  165. printf("bcm2711: Faild to load vl805's firmware, %d\n", ret);
  166. return -EIO;
  167. }
  168. udelay(200);
  169. return 0;
  170. }