timer.c 1.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2003
  4. * Texas Instruments <www.ti.com>
  5. *
  6. * (C) Copyright 2002
  7. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  8. * Marius Groeger <mgroeger@sysgo.de>
  9. *
  10. * (C) Copyright 2002
  11. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  12. * Alex Zuepke <azu@sysgo.de>
  13. *
  14. * (C) Copyright 2002-2004
  15. * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
  16. *
  17. * (C) Copyright 2004
  18. * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
  19. */
  20. #include <common.h>
  21. #define TIMER_ENABLE (1 << 7)
  22. #define TIMER_MODE_MSK (1 << 6)
  23. #define TIMER_MODE_FR (0 << 6)
  24. #define TIMER_MODE_PD (1 << 6)
  25. #define TIMER_INT_EN (1 << 5)
  26. #define TIMER_PRS_MSK (3 << 2)
  27. #define TIMER_PRS_8S (1 << 3)
  28. #define TIMER_SIZE_MSK (1 << 2)
  29. #define TIMER_ONE_SHT (1 << 0)
  30. int timer_init (void)
  31. {
  32. ulong tmr_ctrl_val;
  33. /* 1st disable the Timer */
  34. tmr_ctrl_val = *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8);
  35. tmr_ctrl_val &= ~TIMER_ENABLE;
  36. *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = tmr_ctrl_val;
  37. /*
  38. * The Timer Control Register has one Undefined/Shouldn't Use Bit
  39. * So we should do read/modify/write Operation
  40. */
  41. /*
  42. * Timer Mode : Free Running
  43. * Interrupt : Disabled
  44. * Prescale : 8 Stage, Clk/256
  45. * Tmr Siz : 16 Bit Counter
  46. * Tmr in Wrapping Mode
  47. */
  48. tmr_ctrl_val = *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8);
  49. tmr_ctrl_val &= ~(TIMER_MODE_MSK | TIMER_INT_EN | TIMER_PRS_MSK | TIMER_SIZE_MSK | TIMER_ONE_SHT );
  50. tmr_ctrl_val |= (TIMER_ENABLE | TIMER_PRS_8S);
  51. *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = tmr_ctrl_val;
  52. return 0;
  53. }