Browse Source

Merge tag 'ti-v2020.10-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti

- Sync DMA and CPSW DT bindings for K3 devices
- Other minor fixes for mmc and other TI devices
Tom Rini 3 years ago
parent
commit
3f126c764d

+ 128 - 0
arch/arm/dts/k3-am65-mcu.dtsi

@@ -6,6 +6,20 @@
  */
 
 &cbass_mcu {
+	mcu_conf: scm_conf@40f00000 {
+		compatible = "syscon", "simple-mfd";
+		reg = <0x0 0x40f00000 0x0 0x20000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0x0 0x0 0x40f00000 0x20000>;
+
+		phy_gmii_sel: phy@4040 {
+			compatible = "ti,am654-phy-gmii-sel";
+			reg = <0x4040 0x4>;
+			#phy-cells = <1>;
+		};
+	};
+
 	mcu_uart0: serial@40a00000 {
 		compatible = "ti,am654-uart";
 			reg = <0x00 0x40a00000 0x00 0x100>;
@@ -102,4 +116,118 @@
 			#size-cells = <0>;
 		};
 	};
+
+	mcu_navss {
+		compatible = "simple-mfd";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		dma-coherent;
+		dma-ranges;
+
+		ti,sci-dev-id = <119>;
+
+		mcu_ringacc: ringacc@2b800000 {
+			compatible = "ti,am654-navss-ringacc";
+			reg =	<0x0 0x2b800000 0x0 0x400000>,
+				<0x0 0x2b000000 0x0 0x400000>,
+				<0x0 0x28590000 0x0 0x100>,
+				<0x0 0x2a500000 0x0 0x40000>;
+			reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
+			ti,num-rings = <286>;
+			ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
+			ti,dma-ring-reset-quirk;
+			ti,sci = <&dmsc>;
+			ti,sci-dev-id = <195>;
+		};
+
+		mcu_udmap: dma-controller@285c0000 {
+			compatible = "ti,am654-navss-mcu-udmap";
+			reg =	<0x0 0x285c0000 0x0 0x100>,
+				<0x0 0x2a800000 0x0 0x40000>,
+				<0x0 0x2aa00000 0x0 0x40000>;
+			reg-names = "gcfg", "rchanrt", "tchanrt";
+			#dma-cells = <1>;
+
+			ti,sci = <&dmsc>;
+			ti,sci-dev-id = <194>;
+			ti,ringacc = <&mcu_ringacc>;
+
+			ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
+						<0x2>; /* TX_CHAN */
+			ti,sci-rm-range-rchan = <0x3>, /* RX_HCHAN */
+						<0x4>; /* RX_CHAN */
+			ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */
+		};
+	};
+
+	mcu_cpsw: ethernet@46000000 {
+		compatible = "ti,am654-cpsw-nuss";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		reg = <0x0 0x46000000 0x0 0x200000>;
+		reg-names = "cpsw_nuss";
+		ranges = <0x0 0x0 0x0 0x46000000 0x0 0x200000>;
+		dma-coherent;
+		clocks = <&k3_clks 5 10>;
+		clock-names = "fck";
+		power-domains = <&k3_pds 5 TI_SCI_PD_EXCLUSIVE>;
+
+		dmas = <&mcu_udmap 0xf000>,
+		       <&mcu_udmap 0xf001>,
+		       <&mcu_udmap 0xf002>,
+		       <&mcu_udmap 0xf003>,
+		       <&mcu_udmap 0xf004>,
+		       <&mcu_udmap 0xf005>,
+		       <&mcu_udmap 0xf006>,
+		       <&mcu_udmap 0xf007>,
+		       <&mcu_udmap 0x7000>;
+		dma-names = "tx0", "tx1", "tx2", "tx3",
+			    "tx4", "tx5", "tx6", "tx7",
+			    "rx";
+
+		ethernet-ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			cpsw_port1: port@1 {
+				reg = <1>;
+				ti,mac-only;
+				label = "port1";
+				ti,syscon-efuse = <&mcu_conf 0x200>;
+				phys = <&phy_gmii_sel 1>;
+			};
+		};
+
+		davinci_mdio: mdio@f00 {
+			compatible = "ti,cpsw-mdio","ti,davinci_mdio";
+			reg = <0x0 0xf00 0x0 0x100>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&k3_clks 5 10>;
+			clock-names = "fck";
+			bus_freq = <1000000>;
+		};
+
+		cpts@3d000 {
+			compatible = "ti,am65-cpts";
+			reg = <0x0 0x3d000 0x0 0x400>;
+			clocks = <&mcu_cpsw_cpts_mux>;
+			clock-names = "cpts";
+			interrupts-extended = <&gic500 GIC_SPI 570 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "cpts";
+			ti,cpts-ext-ts-inputs = <4>;
+			ti,cpts-periodic-outputs = <2>;
+
+			mcu_cpsw_cpts_mux: refclk-mux {
+				#clock-cells = <0>;
+				clocks = <&k3_clks 118 5>, <&k3_clks 118 11>,
+					<&k3_clks 118 6>, <&k3_clks 118 3>,
+					<&k3_clks 118 8>, <&k3_clks 118 14>,
+					<&k3_clks 120 3>, <&k3_clks 121 3>;
+				assigned-clocks = <&mcu_cpsw_cpts_mux>;
+				assigned-clock-parents = <&k3_clks 118 5>;
+			};
+		};
+	};
 };

+ 4 - 151
arch/arm/dts/k3-am654-base-board-u-boot.dtsi

@@ -4,7 +4,6 @@
  */
 
 #include <dt-bindings/pinctrl/k3.h>
-#include <dt-bindings/dma/k3-udma.h>
 #include <dt-bindings/net/ti-dp83867.h>
 
 / {
@@ -47,164 +46,17 @@
 &cbass_mcu {
 	u-boot,dm-spl;
 
-	navss_mcu: navss-mcu {
-		compatible = "simple-bus";
-		#address-cells = <2>;
-		#size-cells = <2>;
-		ranges;
+	mcu_navss {
 		u-boot,dm-spl;
 
-		ti,sci-dev-id = <119>;
-
-		mcu_ringacc: ringacc@2b800000 {
-			compatible = "ti,am654-navss-ringacc";
-			reg =	<0x0 0x2b800000 0x0 0x400000>,
-				<0x0 0x2b000000 0x0 0x400000>,
-				<0x0 0x28590000 0x0 0x100>,
-				<0x0 0x2a500000 0x0 0x40000>;
-			reg-names = "rt", "fifos",
-				    "proxy_gcfg", "proxy_target";
-			ti,num-rings = <286>;
-			ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
-			ti,dma-ring-reset-quirk;
-			ti,sci = <&dmsc>;
-			ti,sci-dev-id = <195>;
+		ringacc@2b800000 {
 			u-boot,dm-spl;
 		};
 
-		mcu_udmap: udmap@285c0000 {
-			compatible = "ti,k3-navss-udmap";
-			reg =	<0x0 0x285c0000 0x0 0x100>,
-				<0x0 0x2a800000 0x0 0x40000>,
-				<0x0 0x2aa00000 0x0 0x40000>;
-			reg-names = "gcfg", "rchanrt", "tchanrt";
-			#dma-cells = <3>;
-
-			ti,ringacc = <&mcu_ringacc>;
-			ti,psil-base = <0x6000>;
-
-			ti,sci = <&dmsc>;
-			ti,sci-dev-id = <194>;
-
-			ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
-						<0x2>; /* TX_CHAN */
-			ti,sci-rm-range-rchan = <0x3>, /* RX_HCHAN */
-						<0x4>; /* RX_CHAN */
-			ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */
-			dma-coherent;
+		dma-controller@285c0000 {
 			u-boot,dm-spl;
 		};
 	};
-
-	mcu_conf: scm_conf@40f00000 {
-		compatible = "syscon";
-		reg = <0x0 0x40f00000 0x0 0x20000>;
-	};
-
-	mcu_cpsw: cpsw_nuss@046000000 {
-		compatible = "ti,am654-cpsw-nuss";
-		#address-cells = <2>;
-		#size-cells = <2>;
-		reg = <0x0 0x46000000 0x0 0x200000>;
-		reg-names = "cpsw_nuss";
-		ranges;
-		dma-coherent;
-		clocks = <&k3_clks 5 10>;
-		clock-names = "fck";
-		power-domains = <&k3_pds 5 TI_SCI_PD_EXCLUSIVE>;
-		ti,psil-base = <0x7000>;
-
-		dmas = <&mcu_udmap &mcu_cpsw 0 UDMA_DIR_TX>,
-		       <&mcu_udmap &mcu_cpsw 1 UDMA_DIR_TX>,
-		       <&mcu_udmap &mcu_cpsw 2 UDMA_DIR_TX>,
-		       <&mcu_udmap &mcu_cpsw 3 UDMA_DIR_TX>,
-		       <&mcu_udmap &mcu_cpsw 4 UDMA_DIR_TX>,
-		       <&mcu_udmap &mcu_cpsw 5 UDMA_DIR_TX>,
-		       <&mcu_udmap &mcu_cpsw 6 UDMA_DIR_TX>,
-		       <&mcu_udmap &mcu_cpsw 7 UDMA_DIR_TX>,
-		       <&mcu_udmap &mcu_cpsw 0 UDMA_DIR_RX>;
-		dma-names = "tx0", "tx1", "tx2", "tx3",
-			    "tx4", "tx5", "tx6", "tx7",
-			    "rx";
-
-		ports {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			host: host@0 {
-				reg = <0>;
-				ti,label = "host";
-			};
-
-			cpsw_port1: port@1 {
-				reg = <1>;
-				ti,mac-only;
-				ti,label = "port1";
-				ti,syscon-efuse = <&mcu_conf 0x200>;
-			};
-		};
-
-		davinci_mdio: mdio {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			bus_freq = <1000000>;
-		};
-
-		ti,psil-config0 {
-			linux,udma-mode = <UDMA_PKT_MODE>;
-			statictr-type = <PSIL_STATIC_TR_NONE>;
-			ti,needs-epib;
-			ti,psd-size = <16>;
-		};
-
-		ti,psil-config1 {
-			linux,udma-mode = <UDMA_PKT_MODE>;
-			statictr-type = <PSIL_STATIC_TR_NONE>;
-			ti,needs-epib;
-			ti,psd-size = <16>;
-		};
-
-		ti,psil-config2 {
-			linux,udma-mode = <UDMA_PKT_MODE>;
-			statictr-type = <PSIL_STATIC_TR_NONE>;
-			ti,needs-epib;
-			ti,psd-size = <16>;
-		};
-
-		ti,psil-config3 {
-			linux,udma-mode = <UDMA_PKT_MODE>;
-			statictr-type = <PSIL_STATIC_TR_NONE>;
-			ti,needs-epib;
-			ti,psd-size = <16>;
-		};
-
-		ti,psil-config4 {
-			linux,udma-mode = <UDMA_PKT_MODE>;
-			statictr-type = <PSIL_STATIC_TR_NONE>;
-			ti,needs-epib;
-			ti,psd-size = <16>;
-		};
-
-		ti,psil-config5 {
-			linux,udma-mode = <UDMA_PKT_MODE>;
-			statictr-type = <PSIL_STATIC_TR_NONE>;
-			ti,needs-epib;
-			ti,psd-size = <16>;
-		};
-
-		ti,psil-config6 {
-			linux,udma-mode = <UDMA_PKT_MODE>;
-			statictr-type = <PSIL_STATIC_TR_NONE>;
-			ti,needs-epib;
-			ti,psd-size = <16>;
-		};
-
-		ti,psil-config7 {
-			linux,udma-mode = <UDMA_PKT_MODE>;
-			statictr-type = <PSIL_STATIC_TR_NONE>;
-			ti,needs-epib;
-			ti,psd-size = <16>;
-		};
-	};
 };
 
 &cbass_wakeup {
@@ -366,6 +218,7 @@
 	reg = <0x0 0x46000000 0x0 0x200000>,
 	      <0x0 0x40f00200 0x0 0x2>;
 	reg-names = "cpsw_nuss", "mac_efuse";
+	/delete-property/ ranges;
 
 	cpsw-phy-sel@40f04040 {
 		compatible = "ti,am654-cpsw-phy-sel";

+ 4 - 170
arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi

@@ -3,7 +3,6 @@
  * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
  */
 
-#include <dt-bindings/dma/k3-udma.h>
 #include <dt-bindings/net/ti-dp83867.h>
 
 / {
@@ -32,183 +31,17 @@
 		u-boot,dm-spl;
 	};
 
-	mcu_conf: scm_conf@40f00000 {
-		compatible = "syscon", "simple-mfd";
-		reg = <0x0 0x40f00000 0x0 0x20000>;
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges = <0x0 0x0 0x40f00000 0x20000>;
-
-		phy_sel: cpsw-phy-sel@4040 {
-			compatible = "ti,am654-cpsw-phy-sel";
-			reg = <0x4040 0x4>;
-			reg-names = "gmii-sel";
-		};
-	};
-
-	cbass_mcu_navss: mcu_navss {
-		compatible = "simple-bus";
-		#address-cells = <2>;
-		#size-cells = <2>;
-		dma-coherent;
-		dma-ranges;
-		ranges;
-
-		ti,sci-dev-id = <232>;
+	mcu_navss {
 		u-boot,dm-spl;
 
-		mcu_ringacc: ringacc@2b800000 {
-			compatible = "ti,am654-navss-ringacc";
-			reg =	<0x0 0x2b800000 0x0 0x400000>,
-				<0x0 0x2b000000 0x0 0x400000>,
-				<0x0 0x28590000 0x0 0x100>,
-				<0x0 0x2a500000 0x0 0x40000>;
-			reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
-			ti,num-rings = <286>;
-			ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
-			ti,sci = <&dmsc>;
-			ti,sci-dev-id = <235>;
+		ringacc@2b800000 {
 			u-boot,dm-spl;
 		};
 
-		mcu_udmap: udmap@31150000 {
-			compatible = "ti,j721e-navss-mcu-udmap";
-			reg =	<0x0 0x285c0000 0x0 0x100>,
-				<0x0 0x2a800000 0x0 0x40000>,
-				<0x0 0x2aa00000 0x0 0x40000>;
-			reg-names = "gcfg", "rchanrt", "tchanrt";
-			#dma-cells = <3>;
-
-			ti,ringacc = <&mcu_ringacc>;
-			ti,psil-base = <0x6000>;
-
-			ti,sci = <&dmsc>;
-			ti,sci-dev-id = <236>;
-
-			ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */
-						<0x0f>; /* TX_HCHAN */
-			ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */
-						<0x0b>; /* RX_HCHAN */
-			ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
+		dma-controller@285c0000 {
 			u-boot,dm-spl;
 		};
 	};
-
-	mcu_cpsw: ethernet@046000000 {
-		compatible = "ti,j721e-cpsw-nuss";
-		#address-cells = <2>;
-		#size-cells = <2>;
-		reg = <0x0 0x46000000 0x0 0x200000>;
-		reg-names = "cpsw_nuss";
-		ranges;
-		dma-coherent;
-		clocks = <&k3_clks 18 22>;
-		clock-names = "fck";
-		power-domains = <&k3_pds 18 TI_SCI_PD_EXCLUSIVE>;
-		ti,psil-base = <0x7000>;
-		cpsw-phy-sel = <&phy_sel>;
-
-		dmas = <&mcu_udmap &mcu_cpsw 0 UDMA_DIR_TX>,
-		       <&mcu_udmap &mcu_cpsw 1 UDMA_DIR_TX>,
-		       <&mcu_udmap &mcu_cpsw 2 UDMA_DIR_TX>,
-		       <&mcu_udmap &mcu_cpsw 3 UDMA_DIR_TX>,
-		       <&mcu_udmap &mcu_cpsw 4 UDMA_DIR_TX>,
-		       <&mcu_udmap &mcu_cpsw 5 UDMA_DIR_TX>,
-		       <&mcu_udmap &mcu_cpsw 6 UDMA_DIR_TX>,
-		       <&mcu_udmap &mcu_cpsw 7 UDMA_DIR_TX>,
-		       <&mcu_udmap &mcu_cpsw 0 UDMA_DIR_RX>;
-		dma-names = "tx0", "tx1", "tx2", "tx3",
-			    "tx4", "tx5", "tx6", "tx7",
-			    "rx";
-
-		ports {
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			host: host@0 {
-				reg = <0>;
-				ti,label = "host";
-			};
-
-			cpsw_port1: port@1 {
-				reg = <1>;
-				ti,mac-only;
-				ti,label = "port1";
-				ti,syscon-efuse = <&mcu_conf 0x200>;
-			};
-		};
-
-		davinci_mdio: mdio {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			bus_freq = <1000000>;
-		};
-
-		cpts {
-			clocks = <&k3_clks 18 2>;
-			clock-names = "cpts";
-			interrupts-extended = <&gic500 GIC_SPI 858 IRQ_TYPE_LEVEL_HIGH>;
-			interrupt-names = "cpts";
-			ti,cpts-ext-ts-inputs = <4>;
-			ti,cpts-periodic-outputs = <2>;
-		};
-
-		ti,psil-config0 {
-			linux,udma-mode = <UDMA_PKT_MODE>;
-			statictr-type = <PSIL_STATIC_TR_NONE>;
-			ti,needs-epib;
-			ti,psd-size = <16>;
-		};
-
-		ti,psil-config1 {
-			linux,udma-mode = <UDMA_PKT_MODE>;
-			statictr-type = <PSIL_STATIC_TR_NONE>;
-			ti,needs-epib;
-			ti,psd-size = <16>;
-		};
-
-		ti,psil-config2 {
-			linux,udma-mode = <UDMA_PKT_MODE>;
-			statictr-type = <PSIL_STATIC_TR_NONE>;
-			ti,needs-epib;
-			ti,psd-size = <16>;
-		};
-
-		ti,psil-config3 {
-			linux,udma-mode = <UDMA_PKT_MODE>;
-			statictr-type = <PSIL_STATIC_TR_NONE>;
-			ti,needs-epib;
-			ti,psd-size = <16>;
-		};
-
-		ti,psil-config4 {
-			linux,udma-mode = <UDMA_PKT_MODE>;
-			statictr-type = <PSIL_STATIC_TR_NONE>;
-			ti,needs-epib;
-			ti,psd-size = <16>;
-		};
-
-		ti,psil-config5 {
-			linux,udma-mode = <UDMA_PKT_MODE>;
-			statictr-type = <PSIL_STATIC_TR_NONE>;
-			ti,needs-epib;
-			ti,psd-size = <16>;
-		};
-
-		ti,psil-config6 {
-			linux,udma-mode = <UDMA_PKT_MODE>;
-			statictr-type = <PSIL_STATIC_TR_NONE>;
-			ti,needs-epib;
-			ti,psd-size = <16>;
-		};
-
-		ti,psil-config7 {
-			linux,udma-mode = <UDMA_PKT_MODE>;
-			statictr-type = <PSIL_STATIC_TR_NONE>;
-			ti,needs-epib;
-			ti,psd-size = <16>;
-		};
-	};
 };
 
 &secure_proxy_main {
@@ -318,6 +151,7 @@
 	reg = <0x0 0x46000000 0x0 0x200000>,
 	      <0x0 0x40f00200 0x0 0x2>;
 	reg-names = "cpsw_nuss", "mac_efuse";
+	/delete-property/ ranges;
 
 	cpsw-phy-sel@40f04040 {
 		compatible = "ti,am654-cpsw-phy-sel";

+ 117 - 0
arch/arm/dts/k3-j721e-mcu-wakeup.dtsi

@@ -35,6 +35,20 @@
 		};
 	};
 
+	mcu_conf: syscon@40f00000 {
+		compatible = "syscon", "simple-mfd";
+		reg = <0x0 0x40f00000 0x0 0x20000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0x0 0x0 0x40f00000 0x20000>;
+
+		phy_gmii_sel: phy@4040 {
+			compatible = "ti,am654-phy-gmii-sel";
+			reg = <0x4040 0x4>;
+			#phy-cells = <1>;
+		};
+	};
+
 	wkup_pmx0: pinmux@4301c000 {
 		compatible = "pinctrl-single";
 		/* Proxy 0 addressing */
@@ -199,4 +213,107 @@
 		clocks = <&k3_clks 195 0>;
 		power-domains = <&k3_pds 195 TI_SCI_PD_EXCLUSIVE>;
 	};
+
+	mcu_navss {
+		compatible = "simple-mfd";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		dma-coherent;
+		dma-ranges;
+
+		ti,sci-dev-id = <232>;
+
+		mcu_ringacc: ringacc@2b800000 {
+			compatible = "ti,am654-navss-ringacc";
+			reg =	<0x0 0x2b800000 0x0 0x400000>,
+				<0x0 0x2b000000 0x0 0x400000>,
+				<0x0 0x28590000 0x0 0x100>,
+				<0x0 0x2a500000 0x0 0x40000>;
+			reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
+			ti,num-rings = <286>;
+			ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
+			ti,sci = <&dmsc>;
+			ti,sci-dev-id = <235>;
+		};
+
+		mcu_udmap: dma-controller@285c0000 {
+			compatible = "ti,j721e-navss-mcu-udmap";
+			reg =	<0x0 0x285c0000 0x0 0x100>,
+				<0x0 0x2a800000 0x0 0x40000>,
+				<0x0 0x2aa00000 0x0 0x40000>;
+			reg-names = "gcfg", "rchanrt", "tchanrt";
+			#dma-cells = <1>;
+
+			ti,sci = <&dmsc>;
+			ti,sci-dev-id = <236>;
+			ti,ringacc = <&mcu_ringacc>;
+
+			ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */
+						<0x0f>; /* TX_HCHAN */
+			ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */
+						<0x0b>; /* RX_HCHAN */
+			ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
+		};
+	};
+
+	mcu_cpsw: ethernet@46000000 {
+		compatible = "ti,j721e-cpsw-nuss";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		reg = <0x0 0x46000000 0x0 0x200000>;
+		reg-names = "cpsw_nuss";
+		ranges = <0x0 0x0 0x0 0x46000000 0x0 0x200000>;
+		dma-coherent;
+		clocks = <&k3_clks 18 22>;
+		clock-names = "fck";
+		power-domains = <&k3_pds 18 TI_SCI_PD_EXCLUSIVE>;
+
+		dmas = <&mcu_udmap 0xf000>,
+		       <&mcu_udmap 0xf001>,
+		       <&mcu_udmap 0xf002>,
+		       <&mcu_udmap 0xf003>,
+		       <&mcu_udmap 0xf004>,
+		       <&mcu_udmap 0xf005>,
+		       <&mcu_udmap 0xf006>,
+		       <&mcu_udmap 0xf007>,
+		       <&mcu_udmap 0x7000>;
+		dma-names = "tx0", "tx1", "tx2", "tx3",
+			    "tx4", "tx5", "tx6", "tx7",
+			    "rx";
+
+		ethernet-ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			cpsw_port1: port@1 {
+				reg = <1>;
+				ti,mac-only;
+				label = "port1";
+				ti,syscon-efuse = <&mcu_conf 0x200>;
+				phys = <&phy_gmii_sel 1>;
+			};
+		};
+
+		davinci_mdio: mdio@f00 {
+			compatible = "ti,cpsw-mdio","ti,davinci_mdio";
+			reg = <0x0 0xf00 0x0 0x100>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&k3_clks 18 22>;
+			clock-names = "fck";
+			bus_freq = <1000000>;
+		};
+
+		cpts@3d000 {
+			compatible = "ti,am65-cpts";
+			reg = <0x0 0x3d000 0x0 0x400>;
+			clocks = <&k3_clks 18 2>;
+			clock-names = "cpts";
+			interrupts-extended = <&gic500 GIC_SPI 858 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "cpts";
+			ti,cpts-ext-ts-inputs = <4>;
+			ti,cpts-periodic-outputs = <2>;
+		};
+	};
 };

+ 1 - 1
arch/arm/mach-k3/common.c

@@ -440,7 +440,7 @@ void spl_board_prepare_for_boot(void)
 	dcache_disable();
 }
 
-void spl_board_prepare_for_boot_linux(void)
+void spl_board_prepare_for_linux(void)
 {
 	dcache_disable();
 }

+ 9 - 8
arch/arm/mach-k3/config.mk

@@ -48,22 +48,23 @@ ALL-y	+= tiboot3.bin
 endif
 
 ifdef CONFIG_ARM64
+
 ifeq ($(CONFIG_TI_SECURE_DEVICE),y)
 SPL_ITS := u-boot-spl-k3_HS.its
-$(SPL_ITS): FORCE
-	IS_HS=1 \
-	$(srctree)/tools/k3_fit_atf.sh \
-	$(patsubst %,$(obj)/dts/%.dtb,$(subst ",,$(CONFIG_SPL_OF_LIST))) > $@
-
+$(SPL_ITS): export IS_HS=1
 ALL-y	+= tispl.bin_HS
 else
 SPL_ITS := u-boot-spl-k3.its
-$(SPL_ITS): FORCE
+ALL-y	+= tispl.bin
+endif
+
+quiet_cmd_k3_mkits = MKITS   $@
+cmd_k3_mkits = \
 	$(srctree)/tools/k3_fit_atf.sh \
 	$(patsubst %,$(obj)/dts/%.dtb,$(subst ",,$(CONFIG_SPL_OF_LIST))) > $@
 
-ALL-y	+= tispl.bin
-endif
+$(SPL_ITS): FORCE
+	$(call cmd,k3_mkits)
 endif
 
 else

+ 3 - 3
board/davinci/da8xxevm/da850evm.c

@@ -205,7 +205,7 @@ int misc_init_r(void)
 }
 
 static const struct pinmux_config gpio_pins[] = {
-#ifdef CONFIG_USE_NOR
+#ifdef CONFIG_MTD_NOR_FLASH
 	/* GP0[11] is required for NOR to work on Rev 3 EVMs */
 	{ pinmux(0), 8, 4 },	/* GP0[11] */
 #endif
@@ -235,7 +235,7 @@ const struct pinmux_resource pinmuxes[] = {
 	PINMUX_ITEM(emifa_pins_cs3),
 	PINMUX_ITEM(emifa_pins_cs4),
 	PINMUX_ITEM(emifa_pins_nand),
-#elif defined(CONFIG_USE_NOR)
+#elif defined(CONFIG_MTD_NOR_FLASH)
 	PINMUX_ITEM(emifa_pins_cs2),
 	PINMUX_ITEM(emifa_pins_nor),
 #endif
@@ -341,7 +341,7 @@ int board_init(void)
 		 DAVINCI_SYSCFG_SUSPSRC_UART2),
 	       &davinci_syscfg_regs->suspsrc);
 
-#ifdef CONFIG_USE_NOR
+#ifdef CONFIG_MTD_NOR_FLASH
 	/* Set the GPIO direction as output */
 	clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11));
 

+ 0 - 70
board/ti/beagle/beagle.c

@@ -40,11 +40,6 @@
 #include "beagle.h"
 #include <command.h>
 
-#ifdef CONFIG_USB_EHCI_HCD
-#include <usb.h>
-#include <asm/ehci-omap.h>
-#endif
-
 #define TWL4030_I2C_BUS			0
 #define EXPANSION_EEPROM_I2C_BUS	1
 #define EXPANSION_EEPROM_I2C_ADDRESS	0x50
@@ -297,33 +292,6 @@ static void beagle_dvi_pup(void)
 }
 #endif
 
-#ifdef CONFIG_USB_MUSB_OMAP2PLUS
-static struct musb_hdrc_config musb_config = {
-	.multipoint     = 1,
-	.dyn_fifo       = 1,
-	.num_eps        = 16,
-	.ram_bits       = 12,
-};
-
-static struct omap_musb_board_data musb_board_data = {
-	.interface_type	= MUSB_INTERFACE_ULPI,
-};
-
-static struct musb_hdrc_platform_data musb_plat = {
-#if defined(CONFIG_USB_MUSB_HOST)
-	.mode           = MUSB_HOST,
-#elif defined(CONFIG_USB_MUSB_GADGET)
-	.mode		= MUSB_PERIPHERAL,
-#else
-#error "Please define either CONFIG_USB_MUSB_HOST or CONFIG_USB_MUSB_GADGET"
-#endif
-	.config         = &musb_config,
-	.power          = 100,
-	.platform_ops	= &omap2430_ops,
-	.board_data	= &musb_board_data,
-};
-#endif
-
 /*
  * Routine: misc_init_r
  * Description: Configure board specific parts
@@ -506,10 +474,6 @@ int misc_init_r(void)
 	omap3_dss_enable();
 #endif
 
-#ifdef CONFIG_USB_MUSB_OMAP2PLUS
-	musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE);
-#endif
-
 	if (generate_fake_mac)
 		omap_die_id_usbethaddr();
 
@@ -548,37 +512,3 @@ void board_mmc_power_init(void)
 	twl4030_power_mmc_init(0);
 }
 #endif
-
-#if defined(CONFIG_USB_EHCI_HCD) && !defined(CONFIG_SPL_BUILD)
-/* Call usb_stop() before starting the kernel */
-void show_boot_progress(int val)
-{
-	if (val == BOOTSTAGE_ID_RUN_OS)
-		usb_stop();
-}
-
-static struct omap_usbhs_board_data usbhs_bdata = {
-	.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
-	.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
-	.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
-};
-
-int ehci_hcd_init(int index, enum usb_init_type init,
-		struct ehci_hccr **hccr, struct ehci_hcor **hcor)
-{
-	return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
-}
-
-int ehci_hcd_stop(int index)
-{
-	return omap_ehci_hcd_stop();
-}
-
-#endif /* CONFIG_USB_EHCI_HCD */
-
-#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET)
-int board_eth_init(bd_t *bis)
-{
-	return usb_eth_initialize(bis);
-}
-#endif

+ 0 - 1
configs/da850evm_direct_nor_defconfig

@@ -10,7 +10,6 @@ CONFIG_ENV_SIZE=0x2800
 CONFIG_ENV_SECT_SIZE=0x20000
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
-CONFIG_SYS_EXTRA_OPTIONS="USE_NOR,DIRECT_NOR_BOOT"
 CONFIG_BOOTDELAY=3
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp"

+ 3 - 0
configs/omap3_beagle_defconfig

@@ -73,10 +73,13 @@ CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
 CONFIG_SPL_NAND_SIMPLE=y
+CONFIG_DM_ETH=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
+# CONFIG_SPL_DM_USB is not set
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_OMAP3=y
 CONFIG_USB_MUSB_GADGET=y

+ 7 - 3
doc/README.davinci

@@ -37,11 +37,15 @@ Bootloaders
 ===============
 
 For DA850 an SPL (secondary program loader, see doc/README.SPL) is provided
-to load U-Boot directly from SPI flash. The SPL takes care of the low level
+to load U-Boot from SPI flash, MMC or NAND. The SPL takes care of the low level
 initialization.
 
-The SPL is built as u-boot.ais for all DA850 defconfigs. The resulting
-image file can be programmed to the SPI flash of the DA850 EVM/LCDK.
+The SPL is built as u-boot.ais for all DA850 defconfigs except those booting
+from NOR flash. The resulting image file can be programmed to the SPI flash
+of the DA850 EVM/LCDK.
+
+Devices that support booting from NOR utilize execute in place (XIP) and do
+not require SPL to perform low level initialization.
 
 Environment Variables
 =====================

+ 4 - 0
drivers/dma/ti/Kconfig

@@ -8,7 +8,11 @@ config TI_K3_NAVSS_UDMA
         select DMA
         select TI_K3_NAVSS_RINGACC
         select TI_K3_NAVSS_PSILCFG
+        select TI_K3_PSIL
         default n
         help
           Support for UDMA used in K3 devices.
 endif
+
+config TI_K3_PSIL
+	bool

+ 4 - 0
drivers/dma/ti/Makefile

@@ -1,3 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0+
 
 obj-$(CONFIG_TI_K3_NAVSS_UDMA) += k3-udma.o
+obj-$(CONFIG_TI_K3_PSIL) += k3-psil-data.o
+k3-psil-data-y += k3-psil.o
+k3-psil-data-$(CONFIG_SOC_K3_AM6) += k3-psil-am654.o
+k3-psil-data-$(CONFIG_SOC_K3_J721E) += k3-psil-j721e.o

+ 89 - 0
drivers/dma/ti/k3-psil-am654.c

@@ -0,0 +1,89 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ *  Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com
+ *  Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
+ */
+
+#include <linux/kernel.h>
+
+#include "k3-psil-priv.h"
+
+#define PSIL_ETHERNET(x)				\
+	{						\
+		.thread_id = x,				\
+		.ep_config = {				\
+			.ep_type = PSIL_EP_NATIVE,	\
+			.pkt_mode = 1,			\
+			.needs_epib = 1,		\
+			.psd_size = 16,			\
+		},					\
+	}
+
+/* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
+static struct psil_ep am654_src_ep_map[] = {
+	/* PRU_ICSSG0 */
+	PSIL_ETHERNET(0x4100),
+	PSIL_ETHERNET(0x4101),
+	PSIL_ETHERNET(0x4102),
+	PSIL_ETHERNET(0x4103),
+	/* PRU_ICSSG1 */
+	PSIL_ETHERNET(0x4200),
+	PSIL_ETHERNET(0x4201),
+	PSIL_ETHERNET(0x4202),
+	PSIL_ETHERNET(0x4203),
+	/* PRU_ICSSG2 */
+	PSIL_ETHERNET(0x4300),
+	PSIL_ETHERNET(0x4301),
+	PSIL_ETHERNET(0x4302),
+	PSIL_ETHERNET(0x4303),
+	/* CPSW0 */
+	PSIL_ETHERNET(0x7000),
+};
+
+/* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */
+static struct psil_ep am654_dst_ep_map[] = {
+	/* PRU_ICSSG0 */
+	PSIL_ETHERNET(0xc100),
+	PSIL_ETHERNET(0xc101),
+	PSIL_ETHERNET(0xc102),
+	PSIL_ETHERNET(0xc103),
+	PSIL_ETHERNET(0xc104),
+	PSIL_ETHERNET(0xc105),
+	PSIL_ETHERNET(0xc106),
+	PSIL_ETHERNET(0xc107),
+	/* PRU_ICSSG1 */
+	PSIL_ETHERNET(0xc200),
+	PSIL_ETHERNET(0xc201),
+	PSIL_ETHERNET(0xc202),
+	PSIL_ETHERNET(0xc203),
+	PSIL_ETHERNET(0xc204),
+	PSIL_ETHERNET(0xc205),
+	PSIL_ETHERNET(0xc206),
+	PSIL_ETHERNET(0xc207),
+	/* PRU_ICSSG2 */
+	PSIL_ETHERNET(0xc300),
+	PSIL_ETHERNET(0xc301),
+	PSIL_ETHERNET(0xc302),
+	PSIL_ETHERNET(0xc303),
+	PSIL_ETHERNET(0xc304),
+	PSIL_ETHERNET(0xc305),
+	PSIL_ETHERNET(0xc306),
+	PSIL_ETHERNET(0xc307),
+	/* CPSW0 */
+	PSIL_ETHERNET(0xf000),
+	PSIL_ETHERNET(0xf001),
+	PSIL_ETHERNET(0xf002),
+	PSIL_ETHERNET(0xf003),
+	PSIL_ETHERNET(0xf004),
+	PSIL_ETHERNET(0xf005),
+	PSIL_ETHERNET(0xf006),
+	PSIL_ETHERNET(0xf007),
+};
+
+struct psil_ep_map am654_ep_map = {
+	.name = "am654",
+	.src = am654_src_ep_map,
+	.src_count = ARRAY_SIZE(am654_src_ep_map),
+	.dst = am654_dst_ep_map,
+	.dst_count = ARRAY_SIZE(am654_dst_ep_map),
+};

+ 47 - 0
drivers/dma/ti/k3-psil-j721e.c

@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ *  Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com
+ *  Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
+ */
+
+#include <linux/kernel.h>
+
+#include "k3-psil-priv.h"
+
+#define PSIL_ETHERNET(x)				\
+	{						\
+		.thread_id = x,				\
+		.ep_config = {				\
+			.ep_type = PSIL_EP_NATIVE,	\
+			.pkt_mode = 1,			\
+			.needs_epib = 1,		\
+			.psd_size = 16,			\
+		},					\
+	}
+
+/* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
+static struct psil_ep j721e_src_ep_map[] = {
+	/* CPSW0 */
+	PSIL_ETHERNET(0x7000),
+};
+
+/* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */
+static struct psil_ep j721e_dst_ep_map[] = {
+	/* CPSW0 */
+	PSIL_ETHERNET(0xf000),
+	PSIL_ETHERNET(0xf001),
+	PSIL_ETHERNET(0xf002),
+	PSIL_ETHERNET(0xf003),
+	PSIL_ETHERNET(0xf004),
+	PSIL_ETHERNET(0xf005),
+	PSIL_ETHERNET(0xf006),
+	PSIL_ETHERNET(0xf007),
+};
+
+struct psil_ep_map j721e_ep_map = {
+	.name = "j721e",
+	.src = j721e_src_ep_map,
+	.src_count = ARRAY_SIZE(j721e_src_ep_map),
+	.dst = j721e_dst_ep_map,
+	.dst_count = ARRAY_SIZE(j721e_dst_ep_map),
+};

+ 43 - 0
drivers/dma/ti/k3-psil-priv.h

@@ -0,0 +1,43 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ *  Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com
+ */
+
+#ifndef K3_PSIL_PRIV_H_
+#define K3_PSIL_PRIV_H_
+
+#include "k3-psil.h"
+
+struct psil_ep {
+	u32 thread_id;
+	struct psil_endpoint_config ep_config;
+};
+
+/**
+ * struct psil_ep_map - PSI-L thread ID configuration maps
+ * @name:	Name of the map, set it to the name of the SoC
+ * @src:	Array of source PSI-L thread configurations
+ * @src_count:	Number of entries in the src array
+ * @dst:	Array of destination PSI-L thread configurations
+ * @dst_count:	Number of entries in the dst array
+ *
+ * In case of symmetric configuration for a matching src/dst thread (for example
+ * 0x4400 and 0xc400) only the src configuration can be present. If no dst
+ * configuration found the code will look for (dst_thread_id & ~0x8000) to find
+ * the symmetric match.
+ */
+struct psil_ep_map {
+	char *name;
+	struct psil_ep	*src;
+	int src_count;
+	struct psil_ep	*dst;
+	int dst_count;
+};
+
+struct psil_endpoint_config *psil_get_ep_config(u32 thread_id);
+
+/* SoC PSI-L endpoint maps */
+extern struct psil_ep_map am654_ep_map;
+extern struct psil_ep_map j721e_ep_map;
+
+#endif /* K3_PSIL_PRIV_H_ */

+ 42 - 0
drivers/dma/ti/k3-psil.c

@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ *  Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com
+ *  Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
+ */
+
+#include <linux/kernel.h>
+#include <linux/err.h>
+
+#include "k3-psil-priv.h"
+
+static const struct psil_ep_map *soc_ep_map;
+
+struct psil_endpoint_config *psil_get_ep_config(u32 thread_id)
+{
+	int i;
+
+	if (!soc_ep_map) {
+		if (IS_ENABLED(CONFIG_SOC_K3_AM6))
+			soc_ep_map = &am654_ep_map;
+		else if (IS_ENABLED(CONFIG_SOC_K3_J721E))
+			soc_ep_map = &j721e_ep_map;
+	}
+
+	if (thread_id & K3_PSIL_DST_THREAD_ID_OFFSET && soc_ep_map->dst) {
+		/* check in destination thread map */
+		for (i = 0; i < soc_ep_map->dst_count; i++) {
+			if (soc_ep_map->dst[i].thread_id == thread_id)
+				return &soc_ep_map->dst[i].ep_config;
+		}
+	}
+
+	thread_id &= ~K3_PSIL_DST_THREAD_ID_OFFSET;
+	if (soc_ep_map->src) {
+		for (i = 0; i < soc_ep_map->src_count; i++) {
+			if (soc_ep_map->src[i].thread_id == thread_id)
+				return &soc_ep_map->src[i].ep_config;
+		}
+	}
+
+	return ERR_PTR(-ENOENT);
+}

+ 67 - 0
drivers/dma/ti/k3-psil.h

@@ -0,0 +1,67 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ *  Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com
+ */
+
+#ifndef K3_PSIL_H_
+#define K3_PSIL_H_
+
+#include <linux/types.h>
+
+#define K3_PSIL_DST_THREAD_ID_OFFSET 0x8000
+
+struct device;
+
+/**
+ * enum udma_tp_level - Channel Throughput Levels
+ * @UDMA_TP_NORMAL:	Normal channel
+ * @UDMA_TP_HIGH:	High Throughput channel
+ * @UDMA_TP_ULTRAHIGH:	Ultra High Throughput channel
+ */
+enum udma_tp_level {
+	UDMA_TP_NORMAL = 0,
+	UDMA_TP_HIGH,
+	UDMA_TP_ULTRAHIGH,
+	UDMA_TP_LAST,
+};
+
+/**
+ * enum psil_endpoint_type - PSI-L Endpoint type
+ * @PSIL_EP_NATIVE:	Normal channel
+ * @PSIL_EP_PDMA_XY:	XY mode PDMA
+ * @PSIL_EP_PDMA_MCAN:	MCAN mode PDMA
+ * @PSIL_EP_PDMA_AASRC: AASRC mode PDMA
+ */
+enum psil_endpoint_type {
+	PSIL_EP_NATIVE = 0,
+	PSIL_EP_PDMA_XY,
+	PSIL_EP_PDMA_MCAN,
+	PSIL_EP_PDMA_AASRC,
+};
+
+/**
+ * struct psil_endpoint_config - PSI-L Endpoint configuration
+ * @ep_type:		PSI-L endpoint type
+ * @pkt_mode:		If set, the channel must be in Packet mode, otherwise in
+ *			TR mode
+ * @notdpkt:		TDCM must be suppressed on the TX channel
+ * @needs_epib:		Endpoint needs EPIB
+ * @psd_size:		If set, PSdata is used by the endpoint
+ * @channel_tpl:	Desired throughput level for the channel
+ * @pdma_acc32:		ACC32 must be enabled on the PDMA side
+ * @pdma_burst:		BURST must be enabled on the PDMA side
+ */
+struct psil_endpoint_config {
+	enum psil_endpoint_type ep_type;
+
+	unsigned pkt_mode:1;
+	unsigned notdpkt:1;
+	unsigned needs_epib:1;
+	u32 psd_size;
+	enum udma_tp_level channel_tpl;
+
+	/* PDMA properties, valid for PSIL_EP_PDMA_* */
+	unsigned pdma_acc32:1;
+	unsigned pdma_burst:1;
+};
+#endif /* K3_PSIL_H_ */

+ 231 - 171
drivers/dma/ti/k3-udma.c

@@ -22,7 +22,6 @@
 #include <dma.h>
 #include <dma-uclass.h>
 #include <linux/delay.h>
-#include <dt-bindings/dma/k3-udma.h>
 #include <linux/bitmap.h>
 #include <linux/err.h>
 #include <linux/soc/ti/k3-navss-ringacc.h>
@@ -31,12 +30,7 @@
 #include <linux/soc/ti/ti_sci_protocol.h>
 
 #include "k3-udma-hwdef.h"
-
-#if BITS_PER_LONG == 64
-#define RINGACC_RING_USE_PROXY	(0)
-#else
-#define RINGACC_RING_USE_PROXY	(1)
-#endif
+#include "k3-psil-priv.h"
 
 #define K3_UDMA_MAX_RFLOWS 1024
 
@@ -65,12 +59,28 @@ struct udma_rchan {
 	void __iomem *reg_rt;
 
 	int id;
-	struct k3_nav_ring *fd_ring; /* Free Descriptor ring */
-	struct k3_nav_ring *r_ring; /* Receive ring*/
+};
+
+#define UDMA_FLAG_PDMA_ACC32		BIT(0)
+#define UDMA_FLAG_PDMA_BURST		BIT(1)
+#define UDMA_FLAG_TDTYPE		BIT(2)
+
+struct udma_match_data {
+	u32 psil_base;
+	bool enable_memcpy_support;
+	u32 flags;
+	u32 statictr_z_mask;
+	u32 rchan_oes_offset;
+
+	u8 tpl_levels;
+	u32 level_start_idx[];
 };
 
 struct udma_rflow {
 	int id;
+
+	struct k3_nav_ring *fd_ring; /* Free Descriptor ring */
+	struct k3_nav_ring *r_ring; /* Receive ring*/
 };
 
 enum udma_rm_range {
@@ -114,12 +124,34 @@ struct udma_dev {
 	struct udma_rchan *rchans;
 	struct udma_rflow *rflows;
 
+	struct udma_match_data *match_data;
+
 	struct udma_chan *channels;
 	u32 psil_base;
 
 	u32 ch_count;
 };
 
+struct udma_chan_config {
+	u32 psd_size; /* size of Protocol Specific Data */
+	u32 metadata_size; /* (needs_epib ? 16:0) + psd_size */
+	u32 hdesc_size; /* Size of a packet descriptor in packet mode */
+	int remote_thread_id;
+	u32 atype;
+	u32 src_thread;
+	u32 dst_thread;
+	enum psil_endpoint_type ep_type;
+	enum udma_tp_level channel_tpl; /* Channel Throughput Level */
+
+	enum dma_direction dir;
+
+	unsigned int pkt_mode:1; /* TR or packet */
+	unsigned int needs_epib:1; /* EPIB is needed for the communication or not */
+	unsigned int enable_acc32:1;
+	unsigned int enable_burst:1;
+	unsigned int notdpkt:1; /* Suppress sending TDC packet */
+};
+
 struct udma_chan {
 	struct udma_dev *ud;
 	char name[20];
@@ -132,20 +164,11 @@ struct udma_chan {
 
 	u32 bcnt; /* number of bytes completed since the start of the channel */
 
-	bool pkt_mode; /* TR or packet */
-	bool needs_epib; /* EPIB is needed for the communication or not */
-	u32 psd_size; /* size of Protocol Specific Data */
-	u32 metadata_size; /* (needs_epib ? 16:0) + psd_size */
-	int slave_thread_id;
-	u32 src_thread;
-	u32 dst_thread;
-	u32 static_tr_type;
+	struct udma_chan_config config;
 
 	u32 id;
-	enum dma_direction dir;
 
 	struct cppi5_host_desc_t *desc_tx;
-	u32 hdesc_size;
 	bool in_use;
 	void	*desc_rx;
 	u32	num_rx_bufs;
@@ -271,7 +294,7 @@ static inline bool udma_is_chan_running(struct udma_chan *uc)
 	u32 trt_ctl = 0;
 	u32 rrt_ctl = 0;
 
-	switch (uc->dir) {
+	switch (uc->config.dir) {
 	case DMA_DEV_TO_MEM:
 		rrt_ctl = udma_rchanrt_read(uc->rchan, UDMA_RCHAN_RT_CTL_REG);
 		pr_debug("%s: rrt_ctl: 0x%08x (peer: 0x%08x)\n",
@@ -305,9 +328,9 @@ static int udma_pop_from_ring(struct udma_chan *uc, dma_addr_t *addr)
 	struct k3_nav_ring *ring = NULL;
 	int ret = -ENOENT;
 
-	switch (uc->dir) {
+	switch (uc->config.dir) {
 	case DMA_DEV_TO_MEM:
-		ring = uc->rchan->r_ring;
+		ring = uc->rflow->r_ring;
 		break;
 	case DMA_MEM_TO_DEV:
 		ring = uc->tchan->tc_ring;
@@ -330,10 +353,10 @@ static void udma_reset_rings(struct udma_chan *uc)
 	struct k3_nav_ring *ring1 = NULL;
 	struct k3_nav_ring *ring2 = NULL;
 
-	switch (uc->dir) {
+	switch (uc->config.dir) {
 	case DMA_DEV_TO_MEM:
-		ring1 = uc->rchan->fd_ring;
-		ring2 = uc->rchan->r_ring;
+		ring1 = uc->rflow->fd_ring;
+		ring2 = uc->rflow->r_ring;
 		break;
 	case DMA_MEM_TO_DEV:
 		ring1 = uc->tchan->t_ring;
@@ -392,7 +415,7 @@ static inline int udma_stop_hard(struct udma_chan *uc)
 {
 	pr_debug("%s: ENTER (chan%d)\n", __func__, uc->id);
 
-	switch (uc->dir) {
+	switch (uc->config.dir) {
 	case DMA_DEV_TO_MEM:
 		udma_rchanrt_write(uc->rchan, UDMA_RCHAN_RT_PEER_RT_EN_REG, 0);
 		udma_rchanrt_write(uc->rchan, UDMA_RCHAN_RT_CTL_REG, 0);
@@ -418,9 +441,8 @@ static int udma_start(struct udma_chan *uc)
 	if (udma_is_chan_running(uc))
 		goto out;
 
-	pr_debug("%s: chan:%d dir:%s (static_tr_type: %d)\n",
-		 __func__, uc->id, udma_get_dir_text(uc->dir),
-		 uc->static_tr_type);
+	pr_debug("%s: chan:%d dir:%s\n",
+		 __func__, uc->id, udma_get_dir_text(uc->config.dir));
 
 	/* Make sure that we clear the teardown bit, if it is set */
 	udma_stop_hard(uc);
@@ -428,7 +450,7 @@ static int udma_start(struct udma_chan *uc)
 	/* Reset all counters */
 	udma_reset_counters(uc);
 
-	switch (uc->dir) {
+	switch (uc->config.dir) {
 	case DMA_DEV_TO_MEM:
 		udma_rchanrt_write(uc->rchan, UDMA_RCHAN_RT_CTL_REG,
 				   UDMA_CHAN_RT_CTL_EN);
@@ -530,10 +552,10 @@ static inline void udma_stop_dev2mem(struct udma_chan *uc, bool sync)
 static inline int udma_stop(struct udma_chan *uc)
 {
 	pr_debug("%s: chan:%d dir:%s\n",
-		 __func__, uc->id, udma_get_dir_text(uc->dir));
+		 __func__, uc->id, udma_get_dir_text(uc->config.dir));
 
 	udma_reset_counters(uc);
-	switch (uc->dir) {
+	switch (uc->config.dir) {
 	case DMA_DEV_TO_MEM:
 		udma_stop_dev2mem(uc, true);
 		break;
@@ -768,21 +790,14 @@ static int udma_alloc_tx_resources(struct udma_chan *uc)
 	if (ret)
 		return ret;
 
-	uc->tchan->t_ring = k3_nav_ringacc_request_ring(
-				ud->ringacc, uc->tchan->id,
-				RINGACC_RING_USE_PROXY);
-	if (!uc->tchan->t_ring) {
+	ret = k3_nav_ringacc_request_rings_pair(ud->ringacc, uc->tchan->id, -1,
+						&uc->tchan->t_ring,
+						&uc->tchan->tc_ring);
+	if (ret) {
 		ret = -EBUSY;
 		goto err_tx_ring;
 	}
 
-	uc->tchan->tc_ring = k3_nav_ringacc_request_ring(
-				ud->ringacc, -1, RINGACC_RING_USE_PROXY);
-	if (!uc->tchan->tc_ring) {
-		ret = -EBUSY;
-		goto err_txc_ring;
-	}
-
 	memset(&ring_cfg, 0, sizeof(ring_cfg));
 	ring_cfg.size = 16;
 	ring_cfg.elm_size = K3_NAV_RINGACC_RING_ELSIZE_8;
@@ -799,7 +814,6 @@ static int udma_alloc_tx_resources(struct udma_chan *uc)
 err_ringcfg:
 	k3_nav_ringacc_ring_free(uc->tchan->tc_ring);
 	uc->tchan->tc_ring = NULL;
-err_txc_ring:
 	k3_nav_ringacc_ring_free(uc->tchan->t_ring);
 	uc->tchan->t_ring = NULL;
 err_tx_ring:
@@ -813,12 +827,15 @@ static void udma_free_rx_resources(struct udma_chan *uc)
 	if (!uc->rchan)
 		return;
 
-	k3_nav_ringacc_ring_free(uc->rchan->fd_ring);
-	k3_nav_ringacc_ring_free(uc->rchan->r_ring);
-	uc->rchan->fd_ring = NULL;
-	uc->rchan->r_ring = NULL;
+        if (uc->rflow) {
+		k3_nav_ringacc_ring_free(uc->rflow->fd_ring);
+		k3_nav_ringacc_ring_free(uc->rflow->r_ring);
+		uc->rflow->fd_ring = NULL;
+		uc->rflow->r_ring = NULL;
+
+		udma_put_rflow(uc);
+	}
 
-	udma_put_rflow(uc);
 	udma_put_rchan(uc);
 }
 
@@ -826,6 +843,7 @@ static int udma_alloc_rx_resources(struct udma_chan *uc)
 {
 	struct k3_nav_ring_cfg ring_cfg;
 	struct udma_dev *ud = uc->ud;
+	struct udma_rflow *rflow;
 	int fd_ring_id;
 	int ret;
 
@@ -834,7 +852,7 @@ static int udma_alloc_rx_resources(struct udma_chan *uc)
 		return ret;
 
 	/* For MEM_TO_MEM we don't need rflow or rings */
-	if (uc->dir == DMA_MEM_TO_MEM)
+	if (uc->config.dir == DMA_MEM_TO_MEM)
 		return 0;
 
 	ret = udma_get_rflow(uc, uc->rchan->id);
@@ -845,40 +863,31 @@ static int udma_alloc_rx_resources(struct udma_chan *uc)
 
 	fd_ring_id = ud->tchan_cnt + ud->echan_cnt + uc->rchan->id;
 
-	uc->rchan->fd_ring = k3_nav_ringacc_request_ring(
-				ud->ringacc, fd_ring_id,
-				RINGACC_RING_USE_PROXY);
-	if (!uc->rchan->fd_ring) {
+	rflow = uc->rflow;
+	ret = k3_nav_ringacc_request_rings_pair(ud->ringacc, fd_ring_id, -1,
+						&rflow->fd_ring, &rflow->r_ring);
+	if (ret) {
 		ret = -EBUSY;
 		goto err_rx_ring;
 	}
 
-	uc->rchan->r_ring = k3_nav_ringacc_request_ring(
-				ud->ringacc, -1, RINGACC_RING_USE_PROXY);
-	if (!uc->rchan->r_ring) {
-		ret = -EBUSY;
-		goto err_rxc_ring;
-	}
-
 	memset(&ring_cfg, 0, sizeof(ring_cfg));
 	ring_cfg.size = 16;
 	ring_cfg.elm_size = K3_NAV_RINGACC_RING_ELSIZE_8;
 	ring_cfg.mode = K3_NAV_RINGACC_RING_MODE_RING;
 
-	ret = k3_nav_ringacc_ring_cfg(uc->rchan->fd_ring, &ring_cfg);
-	ret |= k3_nav_ringacc_ring_cfg(uc->rchan->r_ring, &ring_cfg);
-
+	ret = k3_nav_ringacc_ring_cfg(rflow->fd_ring, &ring_cfg);
+	ret |= k3_nav_ringacc_ring_cfg(rflow->r_ring, &ring_cfg);
 	if (ret)
 		goto err_ringcfg;
 
 	return 0;
 
 err_ringcfg:
-	k3_nav_ringacc_ring_free(uc->rchan->r_ring);
-	uc->rchan->r_ring = NULL;
-err_rxc_ring:
-	k3_nav_ringacc_ring_free(uc->rchan->fd_ring);
-	uc->rchan->fd_ring = NULL;
+	k3_nav_ringacc_ring_free(rflow->r_ring);
+	rflow->r_ring = NULL;
+	k3_nav_ringacc_ring_free(rflow->fd_ring);
+	rflow->fd_ring = NULL;
 err_rx_ring:
 	udma_put_rflow(uc);
 err_rflow:
@@ -896,7 +905,7 @@ static int udma_alloc_tchan_sci_req(struct udma_chan *uc)
 	u32 mode;
 	int ret;
 
-	if (uc->pkt_mode)
+	if (uc->config.pkt_mode)
 		mode = TI_SCI_RM_UDMAP_CHAN_TYPE_PKT_PBRR;
 	else
 		mode = TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_BCOPY_PBRR;
@@ -907,11 +916,11 @@ static int udma_alloc_tchan_sci_req(struct udma_chan *uc)
 	req.nav_id = tisci_rm->tisci_dev_id;
 	req.index = uc->tchan->id;
 	req.tx_chan_type = mode;
-	if (uc->dir == DMA_MEM_TO_MEM)
+	if (uc->config.dir == DMA_MEM_TO_MEM)
 		req.tx_fetch_size = sizeof(struct cppi5_desc_hdr_t) >> 2;
 	else
-		req.tx_fetch_size = cppi5_hdesc_calc_size(uc->needs_epib,
-							  uc->psd_size,
+		req.tx_fetch_size = cppi5_hdesc_calc_size(uc->config.needs_epib,
+							  uc->config.psd_size,
 							  0) >> 2;
 	req.txcq_qnum = tc_ring;
 
@@ -925,8 +934,8 @@ static int udma_alloc_tchan_sci_req(struct udma_chan *uc)
 static int udma_alloc_rchan_sci_req(struct udma_chan *uc)
 {
 	struct udma_dev *ud = uc->ud;
-	int fd_ring = k3_nav_ringacc_get_ring_id(uc->rchan->fd_ring);
-	int rx_ring = k3_nav_ringacc_get_ring_id(uc->rchan->r_ring);
+	int fd_ring = k3_nav_ringacc_get_ring_id(uc->rflow->fd_ring);
+	int rx_ring = k3_nav_ringacc_get_ring_id(uc->rflow->r_ring);
 	int tc_ring = k3_nav_ringacc_get_ring_id(uc->tchan->tc_ring);
 	struct ti_sci_msg_rm_udmap_rx_ch_cfg req = { 0 };
 	struct ti_sci_msg_rm_udmap_flow_cfg flow_req = { 0 };
@@ -934,7 +943,7 @@ static int udma_alloc_rchan_sci_req(struct udma_chan *uc)
 	u32 mode;
 	int ret;
 
-	if (uc->pkt_mode)
+	if (uc->config.pkt_mode)
 		mode = TI_SCI_RM_UDMAP_CHAN_TYPE_PKT_PBRR;
 	else
 		mode = TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_BCOPY_PBRR;
@@ -947,16 +956,16 @@ static int udma_alloc_rchan_sci_req(struct udma_chan *uc)
 	req.nav_id = tisci_rm->tisci_dev_id;
 	req.index = uc->rchan->id;
 	req.rx_chan_type = mode;
-	if (uc->dir == DMA_MEM_TO_MEM) {
+	if (uc->config.dir == DMA_MEM_TO_MEM) {
 		req.rx_fetch_size = sizeof(struct cppi5_desc_hdr_t) >> 2;
 		req.rxcq_qnum = tc_ring;
 	} else {
-		req.rx_fetch_size = cppi5_hdesc_calc_size(uc->needs_epib,
-							  uc->psd_size,
+		req.rx_fetch_size = cppi5_hdesc_calc_size(uc->config.needs_epib,
+							  uc->config.psd_size,
 							  0) >> 2;
 		req.rxcq_qnum = rx_ring;
 	}
-	if (uc->rflow->id != uc->rchan->id && uc->dir != DMA_MEM_TO_MEM) {
+	if (uc->rflow->id != uc->rchan->id && uc->config.dir != DMA_MEM_TO_MEM) {
 		req.flowid_start = uc->rflow->id;
 		req.flowid_cnt = 1;
 	}
@@ -967,7 +976,7 @@ static int udma_alloc_rchan_sci_req(struct udma_chan *uc)
 			uc->rchan->id, ret);
 		return ret;
 	}
-	if (uc->dir == DMA_MEM_TO_MEM)
+	if (uc->config.dir == DMA_MEM_TO_MEM)
 		return ret;
 
 	flow_req.valid_params =
@@ -989,12 +998,12 @@ static int udma_alloc_rchan_sci_req(struct udma_chan *uc)
 	flow_req.nav_id = tisci_rm->tisci_dev_id;
 	flow_req.flow_index = uc->rflow->id;
 
-	if (uc->needs_epib)
+	if (uc->config.needs_epib)
 		flow_req.rx_einfo_present = 1;
 	else
 		flow_req.rx_einfo_present = 0;
 
-	if (uc->psd_size)
+	if (uc->config.psd_size)
 		flow_req.rx_psinfo_present = 1;
 	else
 		flow_req.rx_psinfo_present = 0;
@@ -1027,11 +1036,12 @@ static int udma_alloc_chan_resources(struct udma_chan *uc)
 	int ret;
 
 	pr_debug("%s: chan:%d as %s\n",
-		 __func__, uc->id, udma_get_dir_text(uc->dir));
+		 __func__, uc->id, udma_get_dir_text(uc->config.dir));
 
-	switch (uc->dir) {
+	switch (uc->config.dir) {
 	case DMA_MEM_TO_MEM:
 		/* Non synchronized - mem to mem type of transfer */
+		uc->config.pkt_mode = false;
 		ret = udma_get_chan_pair(uc);
 		if (ret)
 			return ret;
@@ -1044,8 +1054,8 @@ static int udma_alloc_chan_resources(struct udma_chan *uc)
 		if (ret)
 			goto err_free_res;
 
-		uc->src_thread = ud->psil_base + uc->tchan->id;
-		uc->dst_thread = (ud->psil_base + uc->rchan->id) | 0x8000;
+		uc->config.src_thread = ud->psil_base + uc->tchan->id;
+		uc->config.dst_thread = (ud->psil_base + uc->rchan->id) | 0x8000;
 		break;
 	case DMA_MEM_TO_DEV:
 		/* Slave transfer synchronized - mem to dev (TX) trasnfer */
@@ -1053,10 +1063,9 @@ static int udma_alloc_chan_resources(struct udma_chan *uc)
 		if (ret)
 			goto err_free_res;
 
-		uc->src_thread = ud->psil_base + uc->tchan->id;
-		uc->dst_thread = uc->slave_thread_id;
-		if (!(uc->dst_thread & 0x8000))
-			uc->dst_thread |= 0x8000;
+		uc->config.src_thread = ud->psil_base + uc->tchan->id;
+		uc->config.dst_thread = uc->config.remote_thread_id;
+		uc->config.dst_thread |= 0x8000;
 
 		break;
 	case DMA_DEV_TO_MEM:
@@ -1065,19 +1074,19 @@ static int udma_alloc_chan_resources(struct udma_chan *uc)
 		if (ret)
 			goto err_free_res;
 
-		uc->src_thread = uc->slave_thread_id;
-		uc->dst_thread = (ud->psil_base + uc->rchan->id) | 0x8000;
+		uc->config.src_thread = uc->config.remote_thread_id;
+		uc->config.dst_thread = (ud->psil_base + uc->rchan->id) | 0x8000;
 
 		break;
 	default:
 		/* Can not happen */
 		pr_debug("%s: chan:%d invalid direction (%u)\n",
-			 __func__, uc->id, uc->dir);
+			 __func__, uc->id, uc->config.dir);
 		return -EINVAL;
 	}
 
 	/* We have channel indexes and rings */
-	if (uc->dir == DMA_MEM_TO_MEM) {
+	if (uc->config.dir == DMA_MEM_TO_MEM) {
 		ret = udma_alloc_tchan_sci_req(uc);
 		if (ret)
 			goto err_free_res;
@@ -1087,7 +1096,7 @@ static int udma_alloc_chan_resources(struct udma_chan *uc)
 			goto err_free_res;
 	} else {
 		/* Slave transfer */
-		if (uc->dir == DMA_MEM_TO_DEV) {
+		if (uc->config.dir == DMA_MEM_TO_DEV) {
 			ret = udma_alloc_tchan_sci_req(uc);
 			if (ret)
 				goto err_free_res;
@@ -1108,7 +1117,7 @@ static int udma_alloc_chan_resources(struct udma_chan *uc)
 	}
 
 	/* PSI-L pairing */
-	ret = udma_navss_psil_pair(ud, uc->src_thread, uc->dst_thread);
+	ret = udma_navss_psil_pair(ud, uc->config.src_thread, uc->config.dst_thread);
 	if (ret) {
 		dev_err(ud->dev, "k3_nav_psil_request_link fail\n");
 		goto err_free_res;
@@ -1119,7 +1128,7 @@ static int udma_alloc_chan_resources(struct udma_chan *uc)
 err_free_res:
 	udma_free_tx_resources(uc);
 	udma_free_rx_resources(uc);
-	uc->slave_thread_id = -1;
+	uc->config.remote_thread_id = -1;
 	return ret;
 }
 
@@ -1128,15 +1137,15 @@ static void udma_free_chan_resources(struct udma_chan *uc)
 	/* Some configuration to UDMA-P channel: disable, reset, whatever */
 
 	/* Release PSI-L pairing */
-	udma_navss_psil_unpair(uc->ud, uc->src_thread, uc->dst_thread);
+	udma_navss_psil_unpair(uc->ud, uc->config.src_thread, uc->config.dst_thread);
 
 	/* Reset the rings for a new start */
 	udma_reset_rings(uc);
 	udma_free_tx_resources(uc);
 	udma_free_rx_resources(uc);
 
-	uc->slave_thread_id = -1;
-	uc->dir = DMA_MEM_TO_MEM;
+	uc->config.remote_thread_id = -1;
+	uc->config.dir = DMA_MEM_TO_MEM;
 }
 
 static int udma_get_mmrs(struct udevice *dev)
@@ -1293,12 +1302,8 @@ static int udma_probe(struct udevice *dev)
 	if (IS_ERR(ud->ringacc))
 		return PTR_ERR(ud->ringacc);
 
-	ud->psil_base = dev_read_u32_default(dev, "ti,psil-base", 0);
-	if (!ud->psil_base) {
-		dev_info(dev,
-			 "Missing ti,psil-base property, using %d.\n", ret);
-		return -EINVAL;
-	}
+	ud->match_data = (void *)dev_get_driver_data(dev);
+	ud->psil_base = ud->match_data->psil_base;
 
 	ret = uclass_get_device_by_phandle(UCLASS_FIRMWARE, dev,
 					   "ti,sci", &tisci_dev);
@@ -1364,10 +1369,10 @@ static int udma_probe(struct udevice *dev)
 
 		uc->ud = ud;
 		uc->id = i;
-		uc->slave_thread_id = -1;
+		uc->config.remote_thread_id = -1;
 		uc->tchan = NULL;
 		uc->rchan = NULL;
-		uc->dir = DMA_MEM_TO_MEM;
+		uc->config.dir = DMA_MEM_TO_MEM;
 		sprintf(uc->name, "UDMA chan%d\n", i);
 		if (!i)
 			uc->in_use = true;
@@ -1514,6 +1519,7 @@ static int udma_transfer(struct udevice *dev, int direction,
 static int udma_request(struct dma *dma)
 {
 	struct udma_dev *ud = dev_get_priv(dma->dev);
+	struct udma_chan_config *ucc;
 	struct udma_chan *uc;
 	unsigned long dummy;
 	int ret;
@@ -1524,30 +1530,27 @@ static int udma_request(struct dma *dma)
 	}
 
 	uc = &ud->channels[dma->id];
+	ucc = &uc->config;
 	ret = udma_alloc_chan_resources(uc);
 	if (ret) {
 		dev_err(dma->dev, "alloc dma res failed %d\n", ret);
 		return -EINVAL;
 	}
 
-	uc->hdesc_size = cppi5_hdesc_calc_size(uc->needs_epib,
-					       uc->psd_size, 0);
-	uc->hdesc_size = ALIGN(uc->hdesc_size, ARCH_DMA_MINALIGN);
-
-	if (uc->dir == DMA_MEM_TO_DEV) {
-		uc->desc_tx = dma_alloc_coherent(uc->hdesc_size, &dummy);
-		memset(uc->desc_tx, 0, uc->hdesc_size);
+	if (uc->config.dir == DMA_MEM_TO_DEV) {
+		uc->desc_tx = dma_alloc_coherent(ucc->hdesc_size, &dummy);
+		memset(uc->desc_tx, 0, ucc->hdesc_size);
 	} else {
 		uc->desc_rx = dma_alloc_coherent(
-				uc->hdesc_size * UDMA_RX_DESC_NUM, &dummy);
-		memset(uc->desc_rx, 0, uc->hdesc_size * UDMA_RX_DESC_NUM);
+				ucc->hdesc_size * UDMA_RX_DESC_NUM, &dummy);
+		memset(uc->desc_rx, 0, ucc->hdesc_size * UDMA_RX_DESC_NUM);
 	}
 
 	uc->in_use = true;
 	uc->desc_rx_cur = 0;
 	uc->num_rx_bufs = 0;
 
-	if (uc->dir == DMA_DEV_TO_MEM) {
+	if (uc->config.dir == DMA_DEV_TO_MEM) {
 		uc->cfg_data.flow_id_base = uc->rflow->id;
 		uc->cfg_data.flow_id_cnt = 1;
 	}
@@ -1632,7 +1635,7 @@ static int udma_send(struct dma *dma, void *src, size_t len, void *metadata)
 	}
 	uc = &ud->channels[dma->id];
 
-	if (uc->dir != DMA_MEM_TO_DEV)
+	if (uc->config.dir != DMA_MEM_TO_DEV)
 		return -EINVAL;
 
 	tc_ring_id = k3_nav_ringacc_get_ring_id(uc->tchan->tc_ring);
@@ -1642,8 +1645,8 @@ static int udma_send(struct dma *dma, void *src, size_t len, void *metadata)
 	cppi5_hdesc_reset_hbdesc(desc_tx);
 
 	cppi5_hdesc_init(desc_tx,
-			 uc->needs_epib ? CPPI5_INFO0_HDESC_EPIB_PRESENT : 0,
-			 uc->psd_size);
+			 uc->config.needs_epib ? CPPI5_INFO0_HDESC_EPIB_PRESENT : 0,
+			 uc->config.psd_size);
 	cppi5_hdesc_set_pktlen(desc_tx, len);
 	cppi5_hdesc_attach_buf(desc_tx, dma_src, len, dma_src, len);
 	cppi5_desc_set_pktids(&desc_tx->hdr, uc->id, 0x3fff);
@@ -1656,7 +1659,7 @@ static int udma_send(struct dma *dma, void *src, size_t len, void *metadata)
 			   ALIGN((unsigned long)dma_src + len,
 				 ARCH_DMA_MINALIGN));
 	flush_dcache_range((unsigned long)desc_tx,
-			   ALIGN((unsigned long)desc_tx + uc->hdesc_size,
+			   ALIGN((unsigned long)desc_tx + uc->config.hdesc_size,
 				 ARCH_DMA_MINALIGN));
 
 	ret = udma_push_to_ring(uc->tchan->t_ring, uc->desc_tx);
@@ -1674,6 +1677,7 @@ static int udma_send(struct dma *dma, void *src, size_t len, void *metadata)
 static int udma_receive(struct dma *dma, void **dst, void *metadata)
 {
 	struct udma_dev *ud = dev_get_priv(dma->dev);
+	struct udma_chan_config *ucc;
 	struct cppi5_host_desc_t *desc_rx;
 	dma_addr_t buf_dma;
 	struct udma_chan *uc;
@@ -1686,13 +1690,14 @@ static int udma_receive(struct dma *dma, void **dst, void *metadata)
 		return -EINVAL;
 	}
 	uc = &ud->channels[dma->id];
+	ucc = &uc->config;
 
-	if (uc->dir != DMA_DEV_TO_MEM)
+	if (uc->config.dir != DMA_DEV_TO_MEM)
 		return -EINVAL;
 	if (!uc->num_rx_bufs)
 		return -EINVAL;
 
-	ret = k3_nav_ringacc_ring_pop(uc->rchan->r_ring, &desc_rx);
+	ret = k3_nav_ringacc_ring_pop(uc->rflow->r_ring, &desc_rx);
 	if (ret && ret != -ENODATA) {
 		dev_err(dma->dev, "rx dma fail ch_id:%lu %d\n", dma->id, ret);
 		return ret;
@@ -1702,7 +1707,7 @@ static int udma_receive(struct dma *dma, void **dst, void *metadata)
 
 	/* invalidate cache data */
 	invalidate_dcache_range((ulong)desc_rx,
-				(ulong)(desc_rx + uc->hdesc_size));
+				(ulong)(desc_rx + ucc->hdesc_size));
 
 	cppi5_hdesc_get_obuf(desc_rx, &buf_dma, &buf_dma_len);
 	pkt_len = cppi5_hdesc_get_pktlen(desc_rx);
@@ -1721,10 +1726,10 @@ static int udma_receive(struct dma *dma, void **dst, void *metadata)
 
 static int udma_of_xlate(struct dma *dma, struct ofnode_phandle_args *args)
 {
+	struct udma_chan_config *ucc;
 	struct udma_dev *ud = dev_get_priv(dma->dev);
 	struct udma_chan *uc = &ud->channels[0];
-	ofnode chconf_node, slave_node;
-	char prop[50];
+	struct psil_endpoint_config *ep_config;
 	u32 val;
 
 	for (val = 0; val < ud->ch_count; val++) {
@@ -1736,48 +1741,40 @@ static int udma_of_xlate(struct dma *dma, struct ofnode_phandle_args *args)
 	if (val == ud->ch_count)
 		return -EBUSY;
 
-	uc->dir = DMA_DEV_TO_MEM;
-	if (args->args[2] == UDMA_DIR_TX)
-		uc->dir = DMA_MEM_TO_DEV;
-
-	slave_node = ofnode_get_by_phandle(args->args[0]);
-	if (!ofnode_valid(slave_node)) {
-		dev_err(ud->dev, "slave node is missing\n");
-		return -EINVAL;
-	}
-
-	snprintf(prop, sizeof(prop), "ti,psil-config%u", args->args[1]);
-	chconf_node = ofnode_find_subnode(slave_node, prop);
-	if (!ofnode_valid(chconf_node)) {
-		dev_err(ud->dev, "Channel configuration node is missing\n");
-		return -EINVAL;
-	}
+	ucc = &uc->config;
+	ucc->remote_thread_id = args->args[0];
+	if (ucc->remote_thread_id & K3_PSIL_DST_THREAD_ID_OFFSET)
+		ucc->dir = DMA_MEM_TO_DEV;
+	else
+		ucc->dir = DMA_DEV_TO_MEM;
 
-	if (!ofnode_read_u32(chconf_node, "linux,udma-mode", &val)) {
-		if (val == UDMA_PKT_MODE)
-			uc->pkt_mode = true;
+	ep_config = psil_get_ep_config(ucc->remote_thread_id);
+	if (IS_ERR(ep_config)) {
+		dev_err(ud->dev, "No configuration for psi-l thread 0x%04x\n",
+			uc->config.remote_thread_id);
+		ucc->dir = DMA_MEM_TO_MEM;
+		ucc->remote_thread_id = -1;
+		return false;
 	}
 
-	if (!ofnode_read_u32(chconf_node, "statictr-type", &val))
-		uc->static_tr_type = val;
+	ucc->pkt_mode = ep_config->pkt_mode;
+	ucc->channel_tpl = ep_config->channel_tpl;
+	ucc->notdpkt = ep_config->notdpkt;
+	ucc->ep_type = ep_config->ep_type;
 
-	uc->needs_epib = ofnode_read_bool(chconf_node, "ti,needs-epib");
-	if (!ofnode_read_u32(chconf_node, "ti,psd-size", &val))
-		uc->psd_size = val;
-	uc->metadata_size = (uc->needs_epib ? 16 : 0) + uc->psd_size;
+	ucc->needs_epib = ep_config->needs_epib;
+	ucc->psd_size = ep_config->psd_size;
+	ucc->metadata_size = (ucc->needs_epib ? CPPI5_INFO0_HDESC_EPIB_SIZE : 0) + ucc->psd_size;
 
-	if (ofnode_read_u32(slave_node, "ti,psil-base", &val)) {
-		dev_err(ud->dev, "ti,psil-base is missing\n");
-		return -EINVAL;
-	}
-
-	uc->slave_thread_id = val + args->args[1];
+	ucc->hdesc_size = cppi5_hdesc_calc_size(ucc->needs_epib,
+						ucc->psd_size, 0);
+	ucc->hdesc_size = ALIGN(ucc->hdesc_size, ARCH_DMA_MINALIGN);
 
 	dma->id = uc->id;
 	pr_debug("Allocated dma chn:%lu epib:%d psdata:%u meta:%u thread_id:%x\n",
-		 dma->id, uc->needs_epib,
-		 uc->psd_size, uc->metadata_size,
-		 uc->slave_thread_id);
+		 dma->id, ucc->needs_epib,
+		 ucc->psd_size, ucc->metadata_size,
+		 ucc->remote_thread_id);
 
 	return 0;
 }
@@ -1796,29 +1793,29 @@ int udma_prepare_rcv_buf(struct dma *dma, void *dst, size_t size)
 	}
 	uc = &ud->channels[dma->id];
 
-	if (uc->dir != DMA_DEV_TO_MEM)
+	if (uc->config.dir != DMA_DEV_TO_MEM)
 		return -EINVAL;
 
 	if (uc->num_rx_bufs >= UDMA_RX_DESC_NUM)
 		return -EINVAL;
 
 	desc_num = uc->desc_rx_cur % UDMA_RX_DESC_NUM;
-	desc_rx = uc->desc_rx + (desc_num * uc->hdesc_size);
+	desc_rx = uc->desc_rx + (desc_num * uc->config.hdesc_size);
 	dma_dst = (dma_addr_t)dst;
 
 	cppi5_hdesc_reset_hbdesc(desc_rx);
 
 	cppi5_hdesc_init(desc_rx,
-			 uc->needs_epib ? CPPI5_INFO0_HDESC_EPIB_PRESENT : 0,
-			 uc->psd_size);
+			 uc->config.needs_epib ? CPPI5_INFO0_HDESC_EPIB_PRESENT : 0,
+			 uc->config.psd_size);
 	cppi5_hdesc_set_pktlen(desc_rx, size);
 	cppi5_hdesc_attach_buf(desc_rx, dma_dst, size, dma_dst, size);
 
 	flush_dcache_range((unsigned long)desc_rx,
-			   ALIGN((unsigned long)desc_rx + uc->hdesc_size,
+			   ALIGN((unsigned long)desc_rx + uc->config.hdesc_size,
 				 ARCH_DMA_MINALIGN));
 
-	udma_push_to_ring(uc->rchan->fd_ring, desc_rx);
+	udma_push_to_ring(uc->rflow->fd_ring, desc_rx);
 
 	uc->num_rx_bufs++;
 	uc->desc_rx_cur++;
@@ -1859,10 +1856,73 @@ static const struct dma_ops udma_ops = {
 	.get_cfg	= udma_get_cfg,
 };
 
+static struct udma_match_data am654_main_data = {
+	.psil_base = 0x1000,
+	.enable_memcpy_support = true,
+	.statictr_z_mask = GENMASK(11, 0),
+	.rchan_oes_offset = 0x200,
+	.tpl_levels = 2,
+	.level_start_idx = {
+		[0] = 8, /* Normal channels */
+		[1] = 0, /* High Throughput channels */
+	},
+};
+
+static struct udma_match_data am654_mcu_data = {
+	.psil_base = 0x6000,
+	.enable_memcpy_support = true,
+	.statictr_z_mask = GENMASK(11, 0),
+	.rchan_oes_offset = 0x200,
+	.tpl_levels = 2,
+	.level_start_idx = {
+		[0] = 2, /* Normal channels */
+		[1] = 0, /* High Throughput channels */
+	},
+};
+
+static struct udma_match_data j721e_main_data = {
+	.psil_base = 0x1000,
+	.enable_memcpy_support = true,
+	.flags = UDMA_FLAG_PDMA_ACC32 | UDMA_FLAG_PDMA_BURST | UDMA_FLAG_TDTYPE,
+	.statictr_z_mask = GENMASK(23, 0),
+	.rchan_oes_offset = 0x400,
+	.tpl_levels = 3,
+	.level_start_idx = {
+		[0] = 16, /* Normal channels */
+		[1] = 4, /* High Throughput channels */
+		[2] = 0, /* Ultra High Throughput channels */
+	},
+};
+
+static struct udma_match_data j721e_mcu_data = {
+	.psil_base = 0x6000,
+	.enable_memcpy_support = true,
+	.flags = UDMA_FLAG_PDMA_ACC32 | UDMA_FLAG_PDMA_BURST | UDMA_FLAG_TDTYPE,
+	.statictr_z_mask = GENMASK(23, 0),
+	.rchan_oes_offset = 0x400,
+	.tpl_levels = 2,
+	.level_start_idx = {
+		[0] = 2, /* Normal channels */
+		[1] = 0, /* High Throughput channels */
+	},
+};
+
 static const struct udevice_id udma_ids[] = {
-	{ .compatible = "ti,k3-navss-udmap" },
-	{ .compatible = "ti,j721e-navss-mcu-udmap" },
-	{ }
+	{
+		.compatible = "ti,am654-navss-main-udmap",
+		.data = (ulong)&am654_main_data,
+	},
+	{
+		.compatible = "ti,am654-navss-mcu-udmap",
+		.data = (ulong)&am654_mcu_data,
+	}, {
+		.compatible = "ti,j721e-navss-main-udmap",
+		.data = (ulong)&j721e_main_data,
+	}, {
+		.compatible = "ti,j721e-navss-mcu-udmap",
+		.data = (ulong)&j721e_mcu_data,
+	},
+	{ /* Sentinel */ },
 };
 
 U_BOOT_DRIVER(ti_edma3) = {

+ 1 - 1
drivers/mmc/omap_hsmmc.c

@@ -843,7 +843,7 @@ static int omap_hsmmc_init_setup(struct mmc *mmc)
 	omap_hsmmc_conf_bus_power(mmc, (reg_val & VS33_3V3SUP) ?
 			  MMC_SIGNAL_VOLTAGE_330 : MMC_SIGNAL_VOLTAGE_180);
 #else
-	writel(DTW_1_BITMODE | SDBP_PWROFF | SDVS_3V0, &mmc_base->hctl);
+	writel(DTW_1_BITMODE | SDBP_PWROFF | SDVS_3V3, &mmc_base->hctl);
 	writel(readl(&mmc_base->capa) | VS33_3V3SUP | VS18_1V8SUP,
 		&mmc_base->capa);
 #endif

+ 7 - 8
drivers/net/ti/am65-cpsw-nuss.c

@@ -61,6 +61,9 @@
 #define AM65_CPSW_ALE_PN_CTL_REG_MODE_FORWARD	0x3
 #define AM65_CPSW_ALE_PN_CTL_REG_MAC_ONLY	BIT(11)
 
+#define AM65_CPSW_ALE_THREADMAPDEF_REG		0x134
+#define AM65_CPSW_ALE_DEFTHREAD_EN		BIT(15)
+
 #define AM65_CPSW_MACSL_CTL_REG			0x0
 #define AM65_CPSW_MACSL_CTL_REG_IFCTL_A		BIT(15)
 #define AM65_CPSW_MACSL_CTL_EXT_EN		BIT(18)
@@ -364,6 +367,9 @@ static int am65_cpsw_start(struct udevice *dev)
 	writel(AM65_CPSW_ALE_PN_CTL_REG_MODE_FORWARD,
 	       common->ale_base + AM65_CPSW_ALE_PN_CTL_REG(0));
 
+	writel(AM65_CPSW_ALE_DEFTHREAD_EN,
+	       common->ale_base + AM65_CPSW_ALE_THREADMAPDEF_REG);
+
 	/* PORT x configuration */
 
 	/* Port x Max length register */
@@ -680,7 +686,7 @@ static int am65_cpsw_probe_cpsw(struct udevice *dev)
 				AM65_CPSW_CPSW_NU_ALE_BASE;
 	cpsw_common->mdio_base = cpsw_common->ss_base + AM65_CPSW_MDIO_BASE;
 
-	ports_np = dev_read_subnode(dev, "ports");
+	ports_np = dev_read_subnode(dev, "ethernet-ports");
 	if (!ofnode_valid(ports_np)) {
 		ret = -ENOENT;
 		goto out;
@@ -746,13 +752,6 @@ static int am65_cpsw_probe_cpsw(struct udevice *dev)
 		goto out;
 	}
 
-	node = dev_read_subnode(dev, "mdio");
-	if (!ofnode_valid(node)) {
-		dev_err(dev, "can't find mdio\n");
-		ret = -ENOENT;
-		goto out;
-	}
-
 	cpsw_common->bus_freq =
 			dev_read_u32_default(dev, "bus_freq",
 					     AM65_CPSW_MDIO_BUS_FREQ_DEF);

+ 109 - 52
drivers/soc/ti/k3-navss-ringacc.c

@@ -126,6 +126,22 @@ struct k3_nav_ring_ops {
 	int (*pop_head)(struct k3_nav_ring *ring, void *elm);
 };
 
+/**
+ * struct k3_nav_ring_state - Internal state tracking structure
+ *
+ * @free: Number of free entries
+ * @occ: Occupancy
+ * @windex: Write index
+ * @rindex: Read index
+ */
+struct k3_nav_ring_state {
+	u32 free;
+	u32 occ;
+	u32 windex;
+	u32 rindex;
+	u32 tdown_complete:1;
+};
+
 /**
  * struct k3_nav_ring - RA Ring descriptor
  *
@@ -139,10 +155,6 @@ struct k3_nav_ring_ops {
  * @elm_size - Size of the ring element
  * @mode - Ring mode
  * @flags - flags
- * @free - Number of free elements
- * @occ - Ring occupancy
- * @windex - Write index (only for @K3_NAV_RINGACC_RING_MODE_RING)
- * @rindex - Read index (only for @K3_NAV_RINGACC_RING_MODE_RING)
  * @ring_id - Ring Id
  * @parent - Pointer on struct @k3_nav_ringacc
  * @use_count - Use count for shared rings
@@ -161,16 +173,17 @@ struct k3_nav_ring {
 	u32		flags;
 #define KNAV_RING_FLAG_BUSY	BIT(1)
 #define K3_NAV_RING_FLAG_SHARED	BIT(2)
-	u32		free;
-	u32		occ;
-	u32		windex;
-	u32		rindex;
+	struct k3_nav_ring_state state;
 	u32		ring_id;
 	struct k3_nav_ringacc	*parent;
 	u32		use_count;
 	int		proxy_id;
 };
 
+struct k3_nav_ringacc_ops {
+	int (*init)(struct udevice *dev, struct k3_nav_ringacc *ringacc);
+};
+
 /**
  * struct k3_nav_ringacc - Rings accelerator descriptor
  *
@@ -186,6 +199,7 @@ struct k3_nav_ring {
  * @tisci - pointer ti-sci handle
  * @tisci_ring_ops - ti-sci rings ops
  * @tisci_dev_id - ti-sci device id
+ * @ops: SoC specific ringacc operation
  */
 struct k3_nav_ringacc {
 	struct udevice *dev;
@@ -204,6 +218,8 @@ struct k3_nav_ringacc {
 	const struct ti_sci_handle *tisci;
 	const struct ti_sci_rm_ringacc_ops *tisci_ring_ops;
 	u32  tisci_dev_id;
+
+	const struct k3_nav_ringacc_ops *ops;
 };
 
 static long k3_nav_ringacc_ring_get_fifo_pos(struct k3_nav_ring *ring)
@@ -312,6 +328,29 @@ error:
 	return NULL;
 }
 
+int k3_nav_ringacc_request_rings_pair(struct k3_nav_ringacc *ringacc,
+				      int fwd_id, int compl_id,
+				      struct k3_nav_ring **fwd_ring,
+				      struct k3_nav_ring **compl_ring)
+{
+	int ret = 0;
+
+	if (!fwd_ring || !compl_ring)
+		return -EINVAL;
+
+	*fwd_ring = k3_nav_ringacc_request_ring(ringacc, fwd_id, 0);
+	if (!(*fwd_ring))
+		return -ENODEV;
+
+	*compl_ring = k3_nav_ringacc_request_ring(ringacc, compl_id, 0);
+	if (!(*compl_ring)) {
+		k3_nav_ringacc_ring_free(*fwd_ring);
+		ret = -ENODEV;
+	}
+
+	return ret;
+}
+
 static void k3_ringacc_ring_reset_sci(struct k3_nav_ring *ring)
 {
 	struct k3_nav_ringacc *ringacc = ring->parent;
@@ -338,10 +377,7 @@ void k3_nav_ringacc_ring_reset(struct k3_nav_ring *ring)
 	if (!ring || !(ring->flags & KNAV_RING_FLAG_BUSY))
 		return;
 
-	ring->occ = 0;
-	ring->free = 0;
-	ring->rindex = 0;
-	ring->windex = 0;
+	memset(&ring->state, 0, sizeof(ring->state));
 
 	k3_ringacc_ring_reset_sci(ring);
 }
@@ -546,10 +582,7 @@ int k3_nav_ringacc_ring_cfg(struct k3_nav_ring *ring,
 	ring->size = cfg->size;
 	ring->elm_size = cfg->elm_size;
 	ring->mode = cfg->mode;
-	ring->occ = 0;
-	ring->free = 0;
-	ring->rindex = 0;
-	ring->windex = 0;
+	memset(&ring->state, 0, sizeof(ring->state));
 
 	if (ring->proxy_id != K3_RINGACC_PROXY_NOT_USED)
 		ring->proxy = ringacc->proxy_target_base +
@@ -625,10 +658,10 @@ u32 k3_nav_ringacc_ring_get_free(struct k3_nav_ring *ring)
 	if (!ring || !(ring->flags & KNAV_RING_FLAG_BUSY))
 		return -EINVAL;
 
-	if (!ring->free)
-		ring->free = ring->size - ringacc_readl(&ring->rt->occ);
+	if (!ring->state.free)
+		ring->state.free = ring->size - ringacc_readl(&ring->rt->occ);
 
-	return ring->free;
+	return ring->state.free;
 }
 
 u32 k3_nav_ringacc_ring_get_occ(struct k3_nav_ring *ring)
@@ -694,21 +727,21 @@ static int k3_nav_ringacc_ring_access_proxy(
 		pr_debug("proxy:memcpy_fromio(x): --> ptr(%p), mode:%d\n",
 			 ptr, access_mode);
 		memcpy_fromio(elem, ptr, (4 << ring->elm_size));
-		ring->occ--;
+		ring->state.occ--;
 		break;
 	case K3_RINGACC_ACCESS_MODE_PUSH_TAIL:
 	case K3_RINGACC_ACCESS_MODE_PUSH_HEAD:
 		pr_debug("proxy:memcpy_toio(x): --> ptr(%p), mode:%d\n",
 			 ptr, access_mode);
 		memcpy_toio(ptr, elem, (4 << ring->elm_size));
-		ring->free--;
+		ring->state.free--;
 		break;
 	default:
 		return -EINVAL;
 	}
 
 	pr_debug("proxy: free%d occ%d\n",
-		 ring->free, ring->occ);
+		 ring->state.free, ring->state.occ);
 	return 0;
 }
 
@@ -763,21 +796,21 @@ static int k3_nav_ringacc_ring_access_io(
 		pr_debug("memcpy_fromio(x): --> ptr(%p), mode:%d\n",
 			 ptr, access_mode);
 		memcpy_fromio(elem, ptr, (4 << ring->elm_size));
-		ring->occ--;
+		ring->state.occ--;
 		break;
 	case K3_RINGACC_ACCESS_MODE_PUSH_TAIL:
 	case K3_RINGACC_ACCESS_MODE_PUSH_HEAD:
 		pr_debug("memcpy_toio(x): --> ptr(%p), mode:%d\n",
 			 ptr, access_mode);
 		memcpy_toio(ptr, elem, (4 << ring->elm_size));
-		ring->free--;
+		ring->state.free--;
 		break;
 	default:
 		return -EINVAL;
 	}
 
 	pr_debug("free%d index%d occ%d index%d\n",
-		 ring->free, ring->windex, ring->occ, ring->rindex);
+		 ring->state.free, ring->state.windex, ring->state.occ, ring->state.rindex);
 	return 0;
 }
 
@@ -810,7 +843,7 @@ static int k3_nav_ringacc_ring_push_mem(struct k3_nav_ring *ring, void *elem)
 {
 	void *elem_ptr;
 
-	elem_ptr = k3_nav_ringacc_get_elm_addr(ring, ring->windex);
+	elem_ptr = k3_nav_ringacc_get_elm_addr(ring, ring->state.windex);
 
 	memcpy(elem_ptr, elem, (4 << ring->elm_size));
 
@@ -819,12 +852,12 @@ static int k3_nav_ringacc_ring_push_mem(struct k3_nav_ring *ring, void *elem)
 				 ring->size * (4 << ring->elm_size),
 				 ARCH_DMA_MINALIGN));
 
-	ring->windex = (ring->windex + 1) % ring->size;
-	ring->free--;
+	ring->state.windex = (ring->state.windex + 1) % ring->size;
+	ring->state.free--;
 	ringacc_writel(1, &ring->rt->db);
 
 	pr_debug("ring_push_mem: free%d index%d\n",
-		 ring->free, ring->windex);
+		 ring->state.free, ring->state.windex);
 
 	return 0;
 }
@@ -833,7 +866,7 @@ static int k3_nav_ringacc_ring_pop_mem(struct k3_nav_ring *ring, void *elem)
 {
 	void *elem_ptr;
 
-	elem_ptr = k3_nav_ringacc_get_elm_addr(ring, ring->rindex);
+	elem_ptr = k3_nav_ringacc_get_elm_addr(ring, ring->state.rindex);
 
 	invalidate_dcache_range((unsigned long)ring->ring_mem_virt,
 				ALIGN((unsigned long)ring->ring_mem_virt +
@@ -842,12 +875,12 @@ static int k3_nav_ringacc_ring_pop_mem(struct k3_nav_ring *ring, void *elem)
 
 	memcpy(elem, elem_ptr, (4 << ring->elm_size));
 
-	ring->rindex = (ring->rindex + 1) % ring->size;
-	ring->occ--;
+	ring->state.rindex = (ring->state.rindex + 1) % ring->size;
+	ring->state.occ--;
 	ringacc_writel(-1, &ring->rt->db);
 
 	pr_debug("ring_pop_mem: occ%d index%d pos_ptr%p\n",
-		 ring->occ, ring->rindex, elem_ptr);
+		 ring->state.occ, ring->state.rindex, elem_ptr);
 	return 0;
 }
 
@@ -859,7 +892,7 @@ int k3_nav_ringacc_ring_push(struct k3_nav_ring *ring, void *elem)
 		return -EINVAL;
 
 	pr_debug("ring_push%d: free%d index%d\n",
-		 ring->ring_id, ring->free, ring->windex);
+		 ring->ring_id, ring->state.free, ring->state.windex);
 
 	if (k3_nav_ringacc_ring_is_full(ring))
 		return -ENOMEM;
@@ -878,7 +911,7 @@ int k3_nav_ringacc_ring_push_head(struct k3_nav_ring *ring, void *elem)
 		return -EINVAL;
 
 	pr_debug("ring_push_head: free%d index%d\n",
-		 ring->free, ring->windex);
+		 ring->state.free, ring->state.windex);
 
 	if (k3_nav_ringacc_ring_is_full(ring))
 		return -ENOMEM;
@@ -896,13 +929,13 @@ int k3_nav_ringacc_ring_pop(struct k3_nav_ring *ring, void *elem)
 	if (!ring || !(ring->flags & KNAV_RING_FLAG_BUSY))
 		return -EINVAL;
 
-	if (!ring->occ)
-		ring->occ = k3_nav_ringacc_ring_get_occ(ring);
+	if (!ring->state.occ)
+		ring->state.occ = k3_nav_ringacc_ring_get_occ(ring);
 
 	pr_debug("ring_pop%d: occ%d index%d\n",
-		 ring->ring_id, ring->occ, ring->rindex);
+		 ring->ring_id, ring->state.occ, ring->state.rindex);
 
-	if (!ring->occ)
+	if (!ring->state.occ && !ring->state.tdown_complete)
 		return -ENODATA;
 
 	if (ring->ops && ring->ops->pop_head)
@@ -918,13 +951,13 @@ int k3_nav_ringacc_ring_pop_tail(struct k3_nav_ring *ring, void *elem)
 	if (!ring || !(ring->flags & KNAV_RING_FLAG_BUSY))
 		return -EINVAL;
 
-	if (!ring->occ)
-		ring->occ = k3_nav_ringacc_ring_get_occ(ring);
+	if (!ring->state.occ)
+		ring->state.occ = k3_nav_ringacc_ring_get_occ(ring);
 
 	pr_debug("ring_pop_tail: occ%d index%d\n",
-		 ring->occ, ring->rindex);
+		 ring->state.occ, ring->state.rindex);
 
-	if (!ring->occ)
+	if (!ring->state.occ)
 		return -ENODATA;
 
 	if (ring->ops && ring->ops->pop_tail)
@@ -982,18 +1015,11 @@ static int k3_nav_ringacc_probe_dt(struct k3_nav_ringacc *ringacc)
 	return 0;
 }
 
-static int k3_nav_ringacc_probe(struct udevice *dev)
+static int k3_nav_ringacc_init(struct udevice *dev, struct k3_nav_ringacc *ringacc)
 {
-	struct k3_nav_ringacc *ringacc;
 	void __iomem *base_fifo, *base_rt;
 	int ret, i;
 
-	ringacc = dev_get_priv(dev);
-	if (!ringacc)
-		return -ENOMEM;
-
-	ringacc->dev = dev;
-
 	ret = k3_nav_ringacc_probe_dt(ringacc);
 	if (ret)
 		return ret;
@@ -1063,11 +1089,42 @@ static int k3_nav_ringacc_probe(struct udevice *dev)
 	return 0;
 }
 
+struct ringacc_match_data {
+	struct k3_nav_ringacc_ops ops;
+};
+
+static struct ringacc_match_data k3_nav_ringacc_data = {
+	.ops = {
+		.init = k3_nav_ringacc_init,
+	},
+};
+
 static const struct udevice_id knav_ringacc_ids[] = {
-	{ .compatible = "ti,am654-navss-ringacc" },
+	{ .compatible = "ti,am654-navss-ringacc", .data = (ulong)&k3_nav_ringacc_data, },
 	{},
 };
 
+static int k3_nav_ringacc_probe(struct udevice *dev)
+{
+	struct k3_nav_ringacc *ringacc;
+	int ret;
+	const struct ringacc_match_data *match_data;
+
+	match_data = (struct ringacc_match_data *)dev_get_driver_data(dev);
+
+	ringacc = dev_get_priv(dev);
+	if (!ringacc)
+		return -ENOMEM;
+
+	ringacc->dev = dev;
+	ringacc->ops = &match_data->ops;
+	ret = ringacc->ops->init(dev, ringacc);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
 U_BOOT_DRIVER(k3_navss_ringacc) = {
 	.name	= "k3-navss-ringacc",
 	.id	= UCLASS_MISC,

+ 5 - 18
include/configs/da850evm.h

@@ -13,10 +13,6 @@
 /*
  * Board
  */
-/* check if direct NOR boot config is used */
-#ifndef CONFIG_DIRECT_NOR_BOOT
-#define CONFIG_USE_SPIFLASH
-#endif
 
 /*
  * SoC Configuration
@@ -28,7 +24,7 @@
 #define CONFIG_SYS_HZ_CLOCK		clk_get(DAVINCI_AUXCLK_CLKID)
 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
 
-#ifdef CONFIG_DIRECT_NOR_BOOT
+#ifdef CONFIG_MTD_NOR_FLASH
 #define CONFIG_SYS_DV_NOR_BOOT_CFG	(0x11)
 #endif
 
@@ -107,10 +103,6 @@
 
 #define CONFIG_SYS_SPI_CLK		clk_get(DAVINCI_SPI1_CLKID)
 
-#ifdef CONFIG_USE_SPIFLASH
-#define CONFIG_SYS_SPI_U_BOOT_SIZE	0x40000
-#endif
-
 /*
  * I2C Configuration
  */
@@ -170,7 +162,7 @@
 #define CONFIG_NET_RETRY_COUNT	10
 #endif
 
-#ifdef CONFIG_USE_NOR
+#ifdef CONFIG_MTD_NOR_FLASH
 #define CONFIG_SYS_MAX_FLASH_BANKS	1 /* max number of flash banks */
 #define CONFIG_SYS_FLASH_SECT_SZ	(128 << 10) /* 128KB */
 #define CONFIG_SYS_FLASH_BASE		DAVINCI_ASYNC_EMIF_DATA_CE2_BASE
@@ -223,16 +215,11 @@
 #define CONFIG_CLOCKS
 #endif
 
-#if !defined(CONFIG_MTD_RAW_NAND) && \
-	!defined(CONFIG_USE_NOR) && \
-	!defined(CONFIG_USE_SPIFLASH)
-#endif
-
 /* USB Configs */
 #define CONFIG_USB_OHCI_NEW
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	15
 
-#ifndef CONFIG_DIRECT_NOR_BOOT
+#ifdef CONFIG_SPL_BUILD
 /* defines for SPL */
 #define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SYS_TEXT_BASE - \
 						CONFIG_SYS_MALLOC_LEN)
@@ -247,12 +234,12 @@
 /* additions for new relocation code, must added to all boards */
 #define CONFIG_SYS_SDRAM_BASE		0xc0000000
 
-#ifdef CONFIG_DIRECT_NOR_BOOT
+#ifdef CONFIG_MTD_NOR_FLASH
 #define CONFIG_SYS_INIT_SP_ADDR		0x8001ff00
 #else
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
 					GENERATED_GBL_DATA_SIZE)
-#endif /* CONFIG_DIRECT_NOR_BOOT */
+#endif /* CONFIG_MTD_NOR_FLASH */
 
 #include <asm/arch/hardware.h>
 

+ 0 - 31
include/dt-bindings/dma/k3-udma.h

@@ -1,31 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- *  Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com
- */
-
-#ifndef __DT_TI_UDMA_H
-#define __DT_TI_UDMA_H
-
-#define UDMA_TR_MODE		0
-#define UDMA_PKT_MODE		1
-
-#define UDMA_DIR_TX		0
-#define UDMA_DIR_RX		1
-
-#define PSIL_STATIC_TR_NONE	0
-#define PSIL_STATIC_TR_XY	1
-#define PSIL_STATIC_TR_MCAN	2
-
-#define UDMA_PDMA_TR_XY(id)				\
-	ti,psil-config##id {				\
-		linux,udma-mode = <UDMA_TR_MODE>;	\
-		statictr-type = <PSIL_STATIC_TR_XY>;	\
-	}
-
-#define UDMA_PDMA_PKT_XY(id)				\
-	ti,psil-config##id {				\
-		linux,udma-mode = <UDMA_PKT_MODE>;	\
-		statictr-type = <PSIL_STATIC_TR_XY>;	\
-	}
-
-#endif /* __DT_TI_UDMA_H */

+ 4 - 0
include/linux/soc/ti/k3-navss-ringacc.h

@@ -100,6 +100,10 @@ struct k3_nav_ring_cfg {
 struct k3_nav_ring *k3_nav_ringacc_request_ring(struct k3_nav_ringacc *ringacc,
 						int id, u32 flags);
 
+int k3_nav_ringacc_request_rings_pair(struct k3_nav_ringacc *ringacc,
+				      int fwd_id, int compl_id,
+				      struct k3_nav_ring **fwd_ring,
+				      struct k3_nav_ring **compl_ring);
 /**
  * k3_nav_ringacc_get_dev - get pointer on RA device
  * @ringacc: pointer on RA

+ 0 - 2
scripts/config_whitelist.txt

@@ -312,7 +312,6 @@ CONFIG_DFU_ENV_SETTINGS
 CONFIG_DHCP_MIN_EXT_LEN
 CONFIG_DIALOG_POWER
 CONFIG_DIMM_SLOTS_PER_CTLR
-CONFIG_DIRECT_NOR_BOOT
 CONFIG_DISCONTIGMEM
 CONFIG_DISCOVER_PHY
 CONFIG_DISPLAY_AER_xxxx
@@ -4150,7 +4149,6 @@ CONFIG_USB_XHCI_EXYNOS
 CONFIG_USB_XHCI_OMAP
 CONFIG_USER_LOWLEVEL_INIT
 CONFIG_USE_INTERRUPT
-CONFIG_USE_NOR
 CONFIG_USE_ONENAND_BOARD_INIT
 CONFIG_USE_SPIFLASH
 CONFIG_UTBIPAR_INIT_TBIPA