Godzil 1d928e7091 Merge branch 'udev' into develop пре 10 година
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ipcore_dir 8f1dd1c1e2 FPGA: update project files (ISE 13.2) пре 12 година
address.v 1d928e7091 Merge branch 'udev' into develop пре 10 година
bsx.v 1d928e7091 Merge branch 'udev' into develop пре 10 година
clk_test.v a083d80ff9 FPGA: update clock speed to 88MHz пре 12 година
dac.v 1a52da6272 FPGA: Adjust DAC I²S signal timing пре 12 година
dcm.v f3a67ab5aa FPGA: rework shared memory access пре 12 година
main.ucf a083d80ff9 FPGA: update clock speed to 88MHz пре 12 година
main.v 1d928e7091 Merge branch 'udev' into develop пре 10 година
main_tf.v a3ac555e18 FPGA: add test fixtures пре 13 година
mcu_cmd.v 968c347986 FPGA/SPI: detect end of byte via MSB toggle instead of constant compare of async input пре 12 година
msu.v 9253cc45b0 FPGA: implement MSU1 "audio error" status bit пре 12 година
rtc.v a083d80ff9 FPGA: update clock speed to 88MHz пре 12 година
sd2snes.xise 1d928e7091 Merge branch 'udev' into develop пре 10 година
sd_dma.v effa2a6972 FPGA/SDDMA: fix clock glitch, adjust RAM write timings пре 12 година
spi.v 968c347986 FPGA/SPI: detect end of byte via MSB toggle instead of constant compare of async input пре 12 година
srtc.v 6b3a7eb4ae FPGA/SRTC: buffer register/address input пре 12 година
upd77c25.v 2ef480f751 FPGA/DSPx: buffer register input пре 12 година
updtest_tf.v ed1e398851 FPGA: fix ST0010 glitches пре 13 година