Godzil 1d928e7091 Merge branch 'udev' into develop il y a 10 ans
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ipcore_dir 8f1dd1c1e2 FPGA: update project files (ISE 13.2) il y a 12 ans
address.v 1d928e7091 Merge branch 'udev' into develop il y a 10 ans
bsx.v 1d928e7091 Merge branch 'udev' into develop il y a 10 ans
clk_test.v a083d80ff9 FPGA: update clock speed to 88MHz il y a 12 ans
dac.v 1a52da6272 FPGA: Adjust DAC I²S signal timing il y a 12 ans
dcm.v f3a67ab5aa FPGA: rework shared memory access il y a 12 ans
main.ucf a083d80ff9 FPGA: update clock speed to 88MHz il y a 12 ans
main.v 1d928e7091 Merge branch 'udev' into develop il y a 10 ans
main_tf.v a3ac555e18 FPGA: add test fixtures il y a 13 ans
mcu_cmd.v 968c347986 FPGA/SPI: detect end of byte via MSB toggle instead of constant compare of async input il y a 12 ans
msu.v 9253cc45b0 FPGA: implement MSU1 "audio error" status bit il y a 12 ans
rtc.v a083d80ff9 FPGA: update clock speed to 88MHz il y a 12 ans
sd2snes.xise 1d928e7091 Merge branch 'udev' into develop il y a 10 ans
sd_dma.v effa2a6972 FPGA/SDDMA: fix clock glitch, adjust RAM write timings il y a 12 ans
spi.v 968c347986 FPGA/SPI: detect end of byte via MSB toggle instead of constant compare of async input il y a 12 ans
srtc.v 6b3a7eb4ae FPGA/SRTC: buffer register/address input il y a 12 ans
upd77c25.v 2ef480f751 FPGA/DSPx: buffer register input il y a 12 ans
updtest_tf.v ed1e398851 FPGA: fix ST0010 glitches il y a 13 ans