|
@@ -112,16 +112,16 @@ static ulong PCI_findBIOSAddr(
|
|
|
int bar;
|
|
|
|
|
|
for (bar = 0x10; bar <= 0x14; bar++) {
|
|
|
- base = PCI_readPCIRegL(bar,device) & ~0xFF;
|
|
|
- if (!(base & 0x1)) {
|
|
|
- PCI_writePCIRegL(bar,0xFFFFFFFF,device);
|
|
|
- size = PCI_readPCIRegL(bar,device) & ~0xFF;
|
|
|
- size = ~size+1;
|
|
|
- PCI_writePCIRegL(bar,0,device);
|
|
|
- if (size >= MAX_BIOSLEN)
|
|
|
- return base;
|
|
|
- }
|
|
|
- }
|
|
|
+ base = PCI_readPCIRegL(bar,device) & ~0xFF;
|
|
|
+ if (!(base & 0x1)) {
|
|
|
+ PCI_writePCIRegL(bar,0xFFFFFFFF,device);
|
|
|
+ size = PCI_readPCIRegL(bar,device) & ~0xFF;
|
|
|
+ size = ~size+1;
|
|
|
+ PCI_writePCIRegL(bar,0,device);
|
|
|
+ if (size >= MAX_BIOSLEN)
|
|
|
+ return base;
|
|
|
+ }
|
|
|
+ }
|
|
|
return 0;
|
|
|
}
|
|
|
|
|
@@ -138,13 +138,13 @@ static void _PCI_fixupSecondaryBARs(void)
|
|
|
int i;
|
|
|
|
|
|
for (i = 0; i < NumDevices; i++) {
|
|
|
- PCI_writePCIRegL(0x10,PCI[DeviceIndex[i]].BaseAddress10,i);
|
|
|
- PCI_writePCIRegL(0x14,PCI[DeviceIndex[i]].BaseAddress14,i);
|
|
|
- PCI_writePCIRegL(0x18,PCI[DeviceIndex[i]].BaseAddress18,i);
|
|
|
- PCI_writePCIRegL(0x1C,PCI[DeviceIndex[i]].BaseAddress1C,i);
|
|
|
- PCI_writePCIRegL(0x20,PCI[DeviceIndex[i]].BaseAddress20,i);
|
|
|
- PCI_writePCIRegL(0x24,PCI[DeviceIndex[i]].BaseAddress24,i);
|
|
|
- }
|
|
|
+ PCI_writePCIRegL(0x10,PCI[DeviceIndex[i]].BaseAddress10,i);
|
|
|
+ PCI_writePCIRegL(0x14,PCI[DeviceIndex[i]].BaseAddress14,i);
|
|
|
+ PCI_writePCIRegL(0x18,PCI[DeviceIndex[i]].BaseAddress18,i);
|
|
|
+ PCI_writePCIRegL(0x1C,PCI[DeviceIndex[i]].BaseAddress1C,i);
|
|
|
+ PCI_writePCIRegL(0x20,PCI[DeviceIndex[i]].BaseAddress20,i);
|
|
|
+ PCI_writePCIRegL(0x24,PCI[DeviceIndex[i]].BaseAddress24,i);
|
|
|
+ }
|
|
|
}
|
|
|
|
|
|
/****************************************************************************
|
|
@@ -165,29 +165,29 @@ static void PCI_doBIOSPOST(
|
|
|
RMREGS regs;
|
|
|
RMSREGS sregs;
|
|
|
|
|
|
- // Determine the value to store in AX for BIOS POST
|
|
|
+ /* Determine the value to store in AX for BIOS POST */
|
|
|
regs.x.ax = (u16)(PCI[DeviceIndex[device]].slot.i >> 8);
|
|
|
if (useV86) {
|
|
|
- // Post the BIOS using the PM functions (ie: v86 mode on Linux)
|
|
|
- if (!PM_doBIOSPOST(regs.x.ax,BIOSPhysAddr,mappedBIOS,BIOSLen)) {
|
|
|
- // If the PM function fails, this probably means are we are on
|
|
|
- // DOS and can't re-map the real mode 0xC0000 region. In thise
|
|
|
- // case if the device is the primary, we can use the real
|
|
|
- // BIOS at 0xC0000 directly.
|
|
|
- if (device == 0)
|
|
|
- PM_doBIOSPOST(regs.x.ax,0xC0000,mappedBIOS,BIOSLen);
|
|
|
- }
|
|
|
- }
|
|
|
+ /* Post the BIOS using the PM functions (ie: v86 mode on Linux) */
|
|
|
+ if (!PM_doBIOSPOST(regs.x.ax,BIOSPhysAddr,mappedBIOS,BIOSLen)) {
|
|
|
+ /* If the PM function fails, this probably means are we are on */
|
|
|
+ /* DOS and can't re-map the real mode 0xC0000 region. In thise */
|
|
|
+ /* case if the device is the primary, we can use the real */
|
|
|
+ /* BIOS at 0xC0000 directly. */
|
|
|
+ if (device == 0)
|
|
|
+ PM_doBIOSPOST(regs.x.ax,0xC0000,mappedBIOS,BIOSLen);
|
|
|
+ }
|
|
|
+ }
|
|
|
else {
|
|
|
- // Setup the X86 emulator for the VGA BIOS
|
|
|
- BE_setVGA(&VGAInfo[device]);
|
|
|
+ /* Setup the X86 emulator for the VGA BIOS */
|
|
|
+ BE_setVGA(&VGAInfo[device]);
|
|
|
|
|
|
- // Execute the BIOS POST code
|
|
|
- BE_callRealMode(0xC000,0x0003,®s,&sregs);
|
|
|
+ /* Execute the BIOS POST code */
|
|
|
+ BE_callRealMode(0xC000,0x0003,®s,&sregs);
|
|
|
|
|
|
- // Cleanup and exit
|
|
|
- BE_getVGA(&VGAInfo[device]);
|
|
|
- }
|
|
|
+ /* Cleanup and exit */
|
|
|
+ BE_getVGA(&VGAInfo[device]);
|
|
|
+ }
|
|
|
}
|
|
|
|
|
|
/****************************************************************************
|
|
@@ -206,113 +206,113 @@ static ibool PCI_postControllers(void)
|
|
|
char filename[_MAX_PATH];
|
|
|
FILE *f;
|
|
|
|
|
|
- // Disable the primary display controller and AGP VGA pass-through
|
|
|
+ /* Disable the primary display controller and AGP VGA pass-through */
|
|
|
DISABLE_DEVICE(0);
|
|
|
if (AGPBridge)
|
|
|
- DISABLE_AGP_VGA();
|
|
|
+ DISABLE_AGP_VGA();
|
|
|
|
|
|
- // Now POST all the secondary controllers
|
|
|
+ /* Now POST all the secondary controllers */
|
|
|
for (device = 0; device < NumDevices; device++) {
|
|
|
- // Skip the device if it is not enabled (probably an ISA device)
|
|
|
- if (DeviceIndex[device] == -1)
|
|
|
- continue;
|
|
|
-
|
|
|
- // Enable secondary display controller. If the secondary controller
|
|
|
- // is on the AGP bus, then enable VGA resources for the AGP device.
|
|
|
- ENABLE_DEVICE(device);
|
|
|
- if (AGPBridge && AGPBridge->SecondayBusNumber == PCI[DeviceIndex[device]].slot.p.Bus)
|
|
|
- ENABLE_AGP_VGA();
|
|
|
-
|
|
|
- // Check if the controller has already been POST'ed
|
|
|
- if (VGA_NOT_ACTIVE()) {
|
|
|
- // Find a viable place to map the secondary PCI BIOS image and map it
|
|
|
- printk("Device %d not enabled, so attempting warm boot it\n", device);
|
|
|
-
|
|
|
- // For AGP devices (and PCI devices that do have the ROM base
|
|
|
- // address zero'ed out) we have to map the BIOS to a location
|
|
|
- // that is passed by the AGP bridge to the bus. Some AGP devices
|
|
|
- // have the ROM base address already set up for us, and some
|
|
|
- // do not (we map to one of the existing BAR locations in
|
|
|
- // this case).
|
|
|
- mappedBIOS = NULL;
|
|
|
- if (PCI[DeviceIndex[device]].ROMBaseAddress != 0)
|
|
|
- mappedBIOSPhys = PCI[DeviceIndex[device]].ROMBaseAddress & ~0xF;
|
|
|
- else
|
|
|
- mappedBIOSPhys = PCI_findBIOSAddr(device);
|
|
|
- printk("Mapping BIOS image to 0x%08X\n", mappedBIOSPhys);
|
|
|
- mappedBIOS = PM_mapPhysicalAddr(mappedBIOSPhys,MAX_BIOSLEN-1,false);
|
|
|
- PCI_writePCIRegL(0x30,mappedBIOSPhys | 0x1,device);
|
|
|
- BIOSImageLen = mappedBIOS[2] * 512;
|
|
|
- if ((copyOfBIOS = malloc(BIOSImageLen)) == NULL)
|
|
|
- return false;
|
|
|
- memcpy(copyOfBIOS,mappedBIOS,BIOSImageLen);
|
|
|
- PM_freePhysicalAddr(mappedBIOS,MAX_BIOSLEN-1);
|
|
|
-
|
|
|
- // Allocate memory to store copy of BIOS from secondary controllers
|
|
|
- VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]];
|
|
|
- VGAInfo[device].BIOSImage = copyOfBIOS;
|
|
|
- VGAInfo[device].BIOSImageLen = BIOSImageLen;
|
|
|
-
|
|
|
- // Restore device mappings
|
|
|
- PCI_writePCIRegL(0x30,PCI[DeviceIndex[device]].ROMBaseAddress,device);
|
|
|
- PCI_writePCIRegL(0x10,PCI[DeviceIndex[device]].BaseAddress10,device);
|
|
|
- PCI_writePCIRegL(0x14,PCI[DeviceIndex[device]].BaseAddress14,device);
|
|
|
-
|
|
|
- // Now execute the BIOS POST for the device
|
|
|
- if (copyOfBIOS[0] == 0x55 && copyOfBIOS[1] == 0xAA) {
|
|
|
- printk("Executing BIOS POST for controller.\n");
|
|
|
- PCI_doBIOSPOST(device,mappedBIOSPhys,copyOfBIOS,BIOSImageLen);
|
|
|
- }
|
|
|
-
|
|
|
- // Reset the size of the BIOS image to the final size
|
|
|
- VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN;
|
|
|
-
|
|
|
- // Save the BIOS and interrupt vector information to disk
|
|
|
- sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device);
|
|
|
- if ((f = fopen(filename,"wb")) != NULL) {
|
|
|
- fwrite(copyOfBIOS,1,FINAL_BIOSLEN,f);
|
|
|
- fwrite(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f);
|
|
|
- fclose(f);
|
|
|
- }
|
|
|
- }
|
|
|
- else {
|
|
|
- // Allocate memory to store copy of BIOS from secondary controllers
|
|
|
- if ((copyOfBIOS = malloc(FINAL_BIOSLEN)) == NULL)
|
|
|
- return false;
|
|
|
- VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]];
|
|
|
- VGAInfo[device].BIOSImage = copyOfBIOS;
|
|
|
- VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN;
|
|
|
-
|
|
|
- // Load the BIOS and interrupt vector information from disk
|
|
|
- sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device);
|
|
|
- if ((f = fopen(filename,"rb")) != NULL) {
|
|
|
- fread(copyOfBIOS,1,FINAL_BIOSLEN,f);
|
|
|
- fread(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f);
|
|
|
- fclose(f);
|
|
|
- }
|
|
|
- }
|
|
|
-
|
|
|
- // Fix up all the secondary PCI base address registers
|
|
|
- // (restores them all from the values we read previously)
|
|
|
- _PCI_fixupSecondaryBARs();
|
|
|
-
|
|
|
- // Disable the secondary controller and AGP VGA pass-through
|
|
|
- DISABLE_DEVICE(device);
|
|
|
- if (AGPBridge)
|
|
|
- DISABLE_AGP_VGA();
|
|
|
- }
|
|
|
-
|
|
|
- // Reenable primary display controller and reset AGP bridge control
|
|
|
+ /* Skip the device if it is not enabled (probably an ISA device) */
|
|
|
+ if (DeviceIndex[device] == -1)
|
|
|
+ continue;
|
|
|
+
|
|
|
+ /* Enable secondary display controller. If the secondary controller */
|
|
|
+ /* is on the AGP bus, then enable VGA resources for the AGP device. */
|
|
|
+ ENABLE_DEVICE(device);
|
|
|
+ if (AGPBridge && AGPBridge->SecondayBusNumber == PCI[DeviceIndex[device]].slot.p.Bus)
|
|
|
+ ENABLE_AGP_VGA();
|
|
|
+
|
|
|
+ /* Check if the controller has already been POST'ed */
|
|
|
+ if (VGA_NOT_ACTIVE()) {
|
|
|
+ /* Find a viable place to map the secondary PCI BIOS image and map it */
|
|
|
+ printk("Device %d not enabled, so attempting warm boot it\n", device);
|
|
|
+
|
|
|
+ /* For AGP devices (and PCI devices that do have the ROM base */
|
|
|
+ /* address zero'ed out) we have to map the BIOS to a location */
|
|
|
+ /* that is passed by the AGP bridge to the bus. Some AGP devices */
|
|
|
+ /* have the ROM base address already set up for us, and some */
|
|
|
+ /* do not (we map to one of the existing BAR locations in */
|
|
|
+ /* this case). */
|
|
|
+ mappedBIOS = NULL;
|
|
|
+ if (PCI[DeviceIndex[device]].ROMBaseAddress != 0)
|
|
|
+ mappedBIOSPhys = PCI[DeviceIndex[device]].ROMBaseAddress & ~0xF;
|
|
|
+ else
|
|
|
+ mappedBIOSPhys = PCI_findBIOSAddr(device);
|
|
|
+ printk("Mapping BIOS image to 0x%08X\n", mappedBIOSPhys);
|
|
|
+ mappedBIOS = PM_mapPhysicalAddr(mappedBIOSPhys,MAX_BIOSLEN-1,false);
|
|
|
+ PCI_writePCIRegL(0x30,mappedBIOSPhys | 0x1,device);
|
|
|
+ BIOSImageLen = mappedBIOS[2] * 512;
|
|
|
+ if ((copyOfBIOS = malloc(BIOSImageLen)) == NULL)
|
|
|
+ return false;
|
|
|
+ memcpy(copyOfBIOS,mappedBIOS,BIOSImageLen);
|
|
|
+ PM_freePhysicalAddr(mappedBIOS,MAX_BIOSLEN-1);
|
|
|
+
|
|
|
+ /* Allocate memory to store copy of BIOS from secondary controllers */
|
|
|
+ VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]];
|
|
|
+ VGAInfo[device].BIOSImage = copyOfBIOS;
|
|
|
+ VGAInfo[device].BIOSImageLen = BIOSImageLen;
|
|
|
+
|
|
|
+ /* Restore device mappings */
|
|
|
+ PCI_writePCIRegL(0x30,PCI[DeviceIndex[device]].ROMBaseAddress,device);
|
|
|
+ PCI_writePCIRegL(0x10,PCI[DeviceIndex[device]].BaseAddress10,device);
|
|
|
+ PCI_writePCIRegL(0x14,PCI[DeviceIndex[device]].BaseAddress14,device);
|
|
|
+
|
|
|
+ /* Now execute the BIOS POST for the device */
|
|
|
+ if (copyOfBIOS[0] == 0x55 && copyOfBIOS[1] == 0xAA) {
|
|
|
+ printk("Executing BIOS POST for controller.\n");
|
|
|
+ PCI_doBIOSPOST(device,mappedBIOSPhys,copyOfBIOS,BIOSImageLen);
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Reset the size of the BIOS image to the final size */
|
|
|
+ VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN;
|
|
|
+
|
|
|
+ /* Save the BIOS and interrupt vector information to disk */
|
|
|
+ sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device);
|
|
|
+ if ((f = fopen(filename,"wb")) != NULL) {
|
|
|
+ fwrite(copyOfBIOS,1,FINAL_BIOSLEN,f);
|
|
|
+ fwrite(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f);
|
|
|
+ fclose(f);
|
|
|
+ }
|
|
|
+ }
|
|
|
+ else {
|
|
|
+ /* Allocate memory to store copy of BIOS from secondary controllers */
|
|
|
+ if ((copyOfBIOS = malloc(FINAL_BIOSLEN)) == NULL)
|
|
|
+ return false;
|
|
|
+ VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]];
|
|
|
+ VGAInfo[device].BIOSImage = copyOfBIOS;
|
|
|
+ VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN;
|
|
|
+
|
|
|
+ /* Load the BIOS and interrupt vector information from disk */
|
|
|
+ sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device);
|
|
|
+ if ((f = fopen(filename,"rb")) != NULL) {
|
|
|
+ fread(copyOfBIOS,1,FINAL_BIOSLEN,f);
|
|
|
+ fread(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f);
|
|
|
+ fclose(f);
|
|
|
+ }
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Fix up all the secondary PCI base address registers */
|
|
|
+ /* (restores them all from the values we read previously) */
|
|
|
+ _PCI_fixupSecondaryBARs();
|
|
|
+
|
|
|
+ /* Disable the secondary controller and AGP VGA pass-through */
|
|
|
+ DISABLE_DEVICE(device);
|
|
|
+ if (AGPBridge)
|
|
|
+ DISABLE_AGP_VGA();
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Reenable primary display controller and reset AGP bridge control */
|
|
|
if (AGPBridge)
|
|
|
- RESTORE_AGP_VGA();
|
|
|
+ RESTORE_AGP_VGA();
|
|
|
ENABLE_DEVICE(0);
|
|
|
|
|
|
- // Free physical BIOS image mapping
|
|
|
+ /* Free physical BIOS image mapping */
|
|
|
PM_freePhysicalAddr(mappedBIOS,MAX_BIOSLEN-1);
|
|
|
|
|
|
- // Restore the X86 emulator BIOS info to primary controller
|
|
|
+ /* Restore the X86 emulator BIOS info to primary controller */
|
|
|
if (!useV86)
|
|
|
- BE_setVGA(&VGAInfo[0]);
|
|
|
+ BE_setVGA(&VGAInfo[0]);
|
|
|
return true;
|
|
|
}
|
|
|
|
|
@@ -327,123 +327,123 @@ static void EnumeratePCI(void)
|
|
|
PCIBridgeInfo *info;
|
|
|
|
|
|
printk("Displaying enumeration of PCI bus (%d devices, %d display devices)\n",
|
|
|
- NumPCI, NumDevices);
|
|
|
+ NumPCI, NumDevices);
|
|
|
for (index = 0; index < NumDevices; index++)
|
|
|
- printk(" Display device %d is PCI device %d\n",index,DeviceIndex[index]);
|
|
|
+ printk(" Display device %d is PCI device %d\n",index,DeviceIndex[index]);
|
|
|
printk("\n");
|
|
|
printk("Bus Slot Fnc DeviceID SubSystem Rev Class IRQ Int Cmd\n");
|
|
|
for (i = 0; i < NumPCI; i++) {
|
|
|
- printk("%2d %2d %2d %04X:%04X %04X:%04X %02X %02X:%02X %02X %02X %04X ",
|
|
|
- PCI[i].slot.p.Bus,
|
|
|
- PCI[i].slot.p.Device,
|
|
|
- PCI[i].slot.p.Function,
|
|
|
- PCI[i].VendorID,
|
|
|
- PCI[i].DeviceID,
|
|
|
- PCI[i].SubSystemVendorID,
|
|
|
- PCI[i].SubSystemID,
|
|
|
- PCI[i].RevID,
|
|
|
- PCI[i].BaseClass,
|
|
|
- PCI[i].SubClass,
|
|
|
- PCI[i].InterruptLine,
|
|
|
- PCI[i].InterruptPin,
|
|
|
- PCI[i].Command);
|
|
|
- for (index = 0; index < NumDevices; index++) {
|
|
|
- if (DeviceIndex[index] == i)
|
|
|
- break;
|
|
|
- }
|
|
|
- if (index < NumDevices)
|
|
|
- printk("<- %d\n", index);
|
|
|
- else
|
|
|
- printk("\n");
|
|
|
- }
|
|
|
+ printk("%2d %2d %2d %04X:%04X %04X:%04X %02X %02X:%02X %02X %02X %04X ",
|
|
|
+ PCI[i].slot.p.Bus,
|
|
|
+ PCI[i].slot.p.Device,
|
|
|
+ PCI[i].slot.p.Function,
|
|
|
+ PCI[i].VendorID,
|
|
|
+ PCI[i].DeviceID,
|
|
|
+ PCI[i].SubSystemVendorID,
|
|
|
+ PCI[i].SubSystemID,
|
|
|
+ PCI[i].RevID,
|
|
|
+ PCI[i].BaseClass,
|
|
|
+ PCI[i].SubClass,
|
|
|
+ PCI[i].InterruptLine,
|
|
|
+ PCI[i].InterruptPin,
|
|
|
+ PCI[i].Command);
|
|
|
+ for (index = 0; index < NumDevices; index++) {
|
|
|
+ if (DeviceIndex[index] == i)
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ if (index < NumDevices)
|
|
|
+ printk("<- %d\n", index);
|
|
|
+ else
|
|
|
+ printk("\n");
|
|
|
+ }
|
|
|
printk("\n");
|
|
|
printk("DeviceID Stat Ifc Cch Lat Hdr BIST\n");
|
|
|
for (i = 0; i < NumPCI; i++) {
|
|
|
- printk("%04X:%04X %04X %02X %02X %02X %02X %02X ",
|
|
|
- PCI[i].VendorID,
|
|
|
- PCI[i].DeviceID,
|
|
|
- PCI[i].Status,
|
|
|
- PCI[i].Interface,
|
|
|
- PCI[i].CacheLineSize,
|
|
|
- PCI[i].LatencyTimer,
|
|
|
- PCI[i].HeaderType,
|
|
|
- PCI[i].BIST);
|
|
|
- for (index = 0; index < NumDevices; index++) {
|
|
|
- if (DeviceIndex[index] == i)
|
|
|
- break;
|
|
|
- }
|
|
|
- if (index < NumDevices)
|
|
|
- printk("<- %d\n", index);
|
|
|
- else
|
|
|
- printk("\n");
|
|
|
- }
|
|
|
+ printk("%04X:%04X %04X %02X %02X %02X %02X %02X ",
|
|
|
+ PCI[i].VendorID,
|
|
|
+ PCI[i].DeviceID,
|
|
|
+ PCI[i].Status,
|
|
|
+ PCI[i].Interface,
|
|
|
+ PCI[i].CacheLineSize,
|
|
|
+ PCI[i].LatencyTimer,
|
|
|
+ PCI[i].HeaderType,
|
|
|
+ PCI[i].BIST);
|
|
|
+ for (index = 0; index < NumDevices; index++) {
|
|
|
+ if (DeviceIndex[index] == i)
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ if (index < NumDevices)
|
|
|
+ printk("<- %d\n", index);
|
|
|
+ else
|
|
|
+ printk("\n");
|
|
|
+ }
|
|
|
printk("\n");
|
|
|
printk("DeviceID Base10h Base14h Base18h Base1Ch Base20h Base24h ROMBase\n");
|
|
|
for (i = 0; i < NumPCI; i++) {
|
|
|
- printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ",
|
|
|
- PCI[i].VendorID,
|
|
|
- PCI[i].DeviceID,
|
|
|
- PCI[i].BaseAddress10,
|
|
|
- PCI[i].BaseAddress14,
|
|
|
- PCI[i].BaseAddress18,
|
|
|
- PCI[i].BaseAddress1C,
|
|
|
- PCI[i].BaseAddress20,
|
|
|
- PCI[i].BaseAddress24,
|
|
|
- PCI[i].ROMBaseAddress);
|
|
|
- for (index = 0; index < NumDevices; index++) {
|
|
|
- if (DeviceIndex[index] == i)
|
|
|
- break;
|
|
|
- }
|
|
|
- if (index < NumDevices)
|
|
|
- printk("<- %d\n", index);
|
|
|
- else
|
|
|
- printk("\n");
|
|
|
- }
|
|
|
+ printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ",
|
|
|
+ PCI[i].VendorID,
|
|
|
+ PCI[i].DeviceID,
|
|
|
+ PCI[i].BaseAddress10,
|
|
|
+ PCI[i].BaseAddress14,
|
|
|
+ PCI[i].BaseAddress18,
|
|
|
+ PCI[i].BaseAddress1C,
|
|
|
+ PCI[i].BaseAddress20,
|
|
|
+ PCI[i].BaseAddress24,
|
|
|
+ PCI[i].ROMBaseAddress);
|
|
|
+ for (index = 0; index < NumDevices; index++) {
|
|
|
+ if (DeviceIndex[index] == i)
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ if (index < NumDevices)
|
|
|
+ printk("<- %d\n", index);
|
|
|
+ else
|
|
|
+ printk("\n");
|
|
|
+ }
|
|
|
printk("\n");
|
|
|
printk("DeviceID BAR10Len BAR14Len BAR18Len BAR1CLen BAR20Len BAR24Len ROMLen\n");
|
|
|
for (i = 0; i < NumPCI; i++) {
|
|
|
- printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ",
|
|
|
- PCI[i].VendorID,
|
|
|
- PCI[i].DeviceID,
|
|
|
- PCI[i].BaseAddress10Len,
|
|
|
- PCI[i].BaseAddress14Len,
|
|
|
- PCI[i].BaseAddress18Len,
|
|
|
- PCI[i].BaseAddress1CLen,
|
|
|
- PCI[i].BaseAddress20Len,
|
|
|
- PCI[i].BaseAddress24Len,
|
|
|
- PCI[i].ROMBaseAddressLen);
|
|
|
- for (index = 0; index < NumDevices; index++) {
|
|
|
- if (DeviceIndex[index] == i)
|
|
|
- break;
|
|
|
- }
|
|
|
- if (index < NumDevices)
|
|
|
- printk("<- %d\n", index);
|
|
|
- else
|
|
|
- printk("\n");
|
|
|
- }
|
|
|
+ printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ",
|
|
|
+ PCI[i].VendorID,
|
|
|
+ PCI[i].DeviceID,
|
|
|
+ PCI[i].BaseAddress10Len,
|
|
|
+ PCI[i].BaseAddress14Len,
|
|
|
+ PCI[i].BaseAddress18Len,
|
|
|
+ PCI[i].BaseAddress1CLen,
|
|
|
+ PCI[i].BaseAddress20Len,
|
|
|
+ PCI[i].BaseAddress24Len,
|
|
|
+ PCI[i].ROMBaseAddressLen);
|
|
|
+ for (index = 0; index < NumDevices; index++) {
|
|
|
+ if (DeviceIndex[index] == i)
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ if (index < NumDevices)
|
|
|
+ printk("<- %d\n", index);
|
|
|
+ else
|
|
|
+ printk("\n");
|
|
|
+ }
|
|
|
printk("\n");
|
|
|
printk("Displaying enumeration of %d bridge devices\n",NumBridges);
|
|
|
printk("\n");
|
|
|
printk("DeviceID P# S# B# IOB IOL MemBase MemLimit PreBase PreLimit Ctrl\n");
|
|
|
for (i = 0; i < NumBridges; i++) {
|
|
|
- info = (PCIBridgeInfo*)&PCI[BridgeIndex[i]];
|
|
|
- printk("%04X:%04X %02X %02X %02X %04X %04X %08X %08X %08X %08X %04X\n",
|
|
|
- info->VendorID,
|
|
|
- info->DeviceID,
|
|
|
- info->PrimaryBusNumber,
|
|
|
- info->SecondayBusNumber,
|
|
|
- info->SubordinateBusNumber,
|
|
|
- ((u16)info->IOBase << 8) & 0xF000,
|
|
|
- info->IOLimit ?
|
|
|
- ((u16)info->IOLimit << 8) | 0xFFF : 0,
|
|
|
- ((u32)info->MemoryBase << 16) & 0xFFF00000,
|
|
|
- info->MemoryLimit ?
|
|
|
- ((u32)info->MemoryLimit << 16) | 0xFFFFF : 0,
|
|
|
- ((u32)info->PrefetchableMemoryBase << 16) & 0xFFF00000,
|
|
|
- info->PrefetchableMemoryLimit ?
|
|
|
- ((u32)info->PrefetchableMemoryLimit << 16) | 0xFFFFF : 0,
|
|
|
- info->BridgeControl);
|
|
|
- }
|
|
|
+ info = (PCIBridgeInfo*)&PCI[BridgeIndex[i]];
|
|
|
+ printk("%04X:%04X %02X %02X %02X %04X %04X %08X %08X %08X %08X %04X\n",
|
|
|
+ info->VendorID,
|
|
|
+ info->DeviceID,
|
|
|
+ info->PrimaryBusNumber,
|
|
|
+ info->SecondayBusNumber,
|
|
|
+ info->SubordinateBusNumber,
|
|
|
+ ((u16)info->IOBase << 8) & 0xF000,
|
|
|
+ info->IOLimit ?
|
|
|
+ ((u16)info->IOLimit << 8) | 0xFFF : 0,
|
|
|
+ ((u32)info->MemoryBase << 16) & 0xFFF00000,
|
|
|
+ info->MemoryLimit ?
|
|
|
+ ((u32)info->MemoryLimit << 16) | 0xFFFFF : 0,
|
|
|
+ ((u32)info->PrefetchableMemoryBase << 16) & 0xFFF00000,
|
|
|
+ info->PrefetchableMemoryLimit ?
|
|
|
+ ((u32)info->PrefetchableMemoryLimit << 16) | 0xFFFFF : 0,
|
|
|
+ info->BridgeControl);
|
|
|
+ }
|
|
|
printk("\n");
|
|
|
}
|
|
|
|
|
@@ -460,51 +460,51 @@ static int PCI_enumerateDevices(void)
|
|
|
int i,j;
|
|
|
PCIBridgeInfo *info;
|
|
|
|
|
|
- // If this is the first time we have been called, enumerate all
|
|
|
- // devices on the PCI bus.
|
|
|
+ /* If this is the first time we have been called, enumerate all */
|
|
|
+ /* devices on the PCI bus. */
|
|
|
if (NumPCI == -1) {
|
|
|
- for (i = 0; i < MAX_PCI_DEVICES; i++)
|
|
|
- PCI[i].dwSize = sizeof(PCI[i]);
|
|
|
- if ((NumPCI = PCI_enumerate(PCI,MAX_PCI_DEVICES)) == 0)
|
|
|
- return -1;
|
|
|
-
|
|
|
- // Build a list of all PCI bridge devices
|
|
|
- for (i = 0,NumBridges = 0,BridgeIndex[0] = -1; i < NumPCI; i++) {
|
|
|
- if (PCI[i].BaseClass == PCI_BRIDGE_CLASS) {
|
|
|
- if (NumBridges < MAX_PCI_DEVICES)
|
|
|
- BridgeIndex[NumBridges++] = i;
|
|
|
- }
|
|
|
- }
|
|
|
-
|
|
|
- // Now build a list of all display class devices
|
|
|
- for (i = 0,NumDevices = 1,DeviceIndex[0] = -1; i < NumPCI; i++) {
|
|
|
- if (PCI_IS_DISPLAY_CLASS(&PCI[i])) {
|
|
|
- if ((PCI[i].Command & 0x3) == 0x3) {
|
|
|
- DeviceIndex[0] = i;
|
|
|
- }
|
|
|
- else {
|
|
|
- if (NumDevices < MAX_PCI_DEVICES)
|
|
|
- DeviceIndex[NumDevices++] = i;
|
|
|
- }
|
|
|
- if (PCI[i].slot.p.Bus != 0) {
|
|
|
- // This device is on a different bus than the primary
|
|
|
- // PCI bus, so it is probably an AGP device. Find the
|
|
|
- // AGP bus device that controls that bus so we can
|
|
|
- // control it.
|
|
|
- for (j = 0; j < NumBridges; j++) {
|
|
|
- info = (PCIBridgeInfo*)&PCI[BridgeIndex[j]];
|
|
|
- if (info->SecondayBusNumber == PCI[i].slot.p.Bus) {
|
|
|
- AGPBridge = info;
|
|
|
- break;
|
|
|
- }
|
|
|
- }
|
|
|
- }
|
|
|
- }
|
|
|
- }
|
|
|
-
|
|
|
- // Enumerate all PCI and bridge devices to log file
|
|
|
- EnumeratePCI();
|
|
|
- }
|
|
|
+ for (i = 0; i < MAX_PCI_DEVICES; i++)
|
|
|
+ PCI[i].dwSize = sizeof(PCI[i]);
|
|
|
+ if ((NumPCI = PCI_enumerate(PCI,MAX_PCI_DEVICES)) == 0)
|
|
|
+ return -1;
|
|
|
+
|
|
|
+ /* Build a list of all PCI bridge devices */
|
|
|
+ for (i = 0,NumBridges = 0,BridgeIndex[0] = -1; i < NumPCI; i++) {
|
|
|
+ if (PCI[i].BaseClass == PCI_BRIDGE_CLASS) {
|
|
|
+ if (NumBridges < MAX_PCI_DEVICES)
|
|
|
+ BridgeIndex[NumBridges++] = i;
|
|
|
+ }
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Now build a list of all display class devices */
|
|
|
+ for (i = 0,NumDevices = 1,DeviceIndex[0] = -1; i < NumPCI; i++) {
|
|
|
+ if (PCI_IS_DISPLAY_CLASS(&PCI[i])) {
|
|
|
+ if ((PCI[i].Command & 0x3) == 0x3) {
|
|
|
+ DeviceIndex[0] = i;
|
|
|
+ }
|
|
|
+ else {
|
|
|
+ if (NumDevices < MAX_PCI_DEVICES)
|
|
|
+ DeviceIndex[NumDevices++] = i;
|
|
|
+ }
|
|
|
+ if (PCI[i].slot.p.Bus != 0) {
|
|
|
+ /* This device is on a different bus than the primary */
|
|
|
+ /* PCI bus, so it is probably an AGP device. Find the */
|
|
|
+ /* AGP bus device that controls that bus so we can */
|
|
|
+ /* control it. */
|
|
|
+ for (j = 0; j < NumBridges; j++) {
|
|
|
+ info = (PCIBridgeInfo*)&PCI[BridgeIndex[j]];
|
|
|
+ if (info->SecondayBusNumber == PCI[i].slot.p.Bus) {
|
|
|
+ AGPBridge = info;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ }
|
|
|
+ }
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Enumerate all PCI and bridge devices to log file */
|
|
|
+ EnumeratePCI();
|
|
|
+ }
|
|
|
return NumDevices;
|
|
|
}
|
|
|
|
|
@@ -522,48 +522,48 @@ void printk(const char *fmt, ...)
|
|
|
int main(int argc,char *argv[])
|
|
|
{
|
|
|
while (argc > 1) {
|
|
|
- if (stricmp(argv[1],"-usev86") == 0) {
|
|
|
- useV86 = true;
|
|
|
- }
|
|
|
- else if (stricmp(argv[1],"-force") == 0) {
|
|
|
- forcePost = true;
|
|
|
- }
|
|
|
+ if (stricmp(argv[1],"-usev86") == 0) {
|
|
|
+ useV86 = true;
|
|
|
+ }
|
|
|
+ else if (stricmp(argv[1],"-force") == 0) {
|
|
|
+ forcePost = true;
|
|
|
+ }
|
|
|
#ifdef DEBUG
|
|
|
- else if (stricmp(argv[1],"-decode") == 0) {
|
|
|
- debugFlags |= DEBUG_DECODE_F;
|
|
|
- }
|
|
|
- else if (stricmp(argv[1],"-iotrace") == 0) {
|
|
|
- debugFlags |= DEBUG_IO_TRACE_F;
|
|
|
- }
|
|
|
+ else if (stricmp(argv[1],"-decode") == 0) {
|
|
|
+ debugFlags |= DEBUG_DECODE_F;
|
|
|
+ }
|
|
|
+ else if (stricmp(argv[1],"-iotrace") == 0) {
|
|
|
+ debugFlags |= DEBUG_IO_TRACE_F;
|
|
|
+ }
|
|
|
#endif
|
|
|
- else {
|
|
|
- printf("Usage: warmboot [-usev86] [-force] [-decode] [-iotrace]\n");
|
|
|
- exit(-1);
|
|
|
- }
|
|
|
- argc--;
|
|
|
- argv++;
|
|
|
- }
|
|
|
+ else {
|
|
|
+ printf("Usage: warmboot [-usev86] [-force] [-decode] [-iotrace]\n");
|
|
|
+ exit(-1);
|
|
|
+ }
|
|
|
+ argc--;
|
|
|
+ argv++;
|
|
|
+ }
|
|
|
if ((logfile = fopen("warmboot.log","w")) == NULL)
|
|
|
- exit(1);
|
|
|
+ exit(1);
|
|
|
|
|
|
PM_init();
|
|
|
if (!useV86) {
|
|
|
- // Initialise the x86 BIOS emulator
|
|
|
- BE_init(false,debugFlags,65536,&VGAInfo[0]);
|
|
|
- }
|
|
|
+ /* Initialise the x86 BIOS emulator */
|
|
|
+ BE_init(false,debugFlags,65536,&VGAInfo[0]);
|
|
|
+ }
|
|
|
|
|
|
- // Enumerate all devices (which POST's them at the same time)
|
|
|
+ /* Enumerate all devices (which POST's them at the same time) */
|
|
|
if (PCI_enumerateDevices() < 1) {
|
|
|
- printk("No PCI display devices found!\n");
|
|
|
- return -1;
|
|
|
- }
|
|
|
+ printk("No PCI display devices found!\n");
|
|
|
+ return -1;
|
|
|
+ }
|
|
|
|
|
|
- // Post all the display controller BIOS'es
|
|
|
+ /* Post all the display controller BIOS'es */
|
|
|
PCI_postControllers();
|
|
|
|
|
|
- // Cleanup and exit the emulator
|
|
|
+ /* Cleanup and exit the emulator */
|
|
|
if (!useV86)
|
|
|
- BE_exit();
|
|
|
+ BE_exit();
|
|
|
fclose(logfile);
|
|
|
return 0;
|
|
|
}
|