articiaS_pci.c 15 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Hyperion Entertainment, Hans-JoergF@hyperion-entertainment.com
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <pci.h>
  25. #include "memio.h"
  26. #include "articiaS.h"
  27. #undef ARTICIA_PCI_DEBUG
  28. #ifdef ARTICIA_PCI_DEBUG
  29. #define PRINTF(fmt,args...) printf (fmt ,##args)
  30. #else
  31. #define PRINTF(fmt,args...)
  32. #endif
  33. struct pci_controller articiaS_hose;
  34. long irq_alloc(long wanted);
  35. static pci_dev_t pci_hose_find_class(struct pci_controller *hose, int bus, short find_class, int index);
  36. static int articiaS_init_vga(void);
  37. static void pci_cfgfunc_dummy(struct pci_controller *host, pci_dev_t dev, struct pci_config_table *table);
  38. unsigned char pci_irq_alloc(void);
  39. extern void via_cfgfunc_via686(struct pci_controller * host, pci_dev_t dev, struct pci_config_table *table);
  40. extern void via_cfgfunc_ide_init(struct pci_controller *host, pci_dev_t dev, struct pci_config_table *table);
  41. extern void via_init_irq_routing(uint8 []);
  42. extern void via_init_afterscan(void);
  43. #define cfgfunc_via686 1
  44. #define cfgfunc_dummy 2
  45. #define cfgfunc_ide_init 3
  46. static struct pci_config_table config_table[] =
  47. {
  48. {
  49. 0x1106, PCI_ANY_ID, PCI_CLASS_BRIDGE_ISA, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  50. (void *)cfgfunc_via686, {0, 0, 0}
  51. },
  52. {
  53. 0x1106, PCI_ANY_ID, PCI_ANY_ID, 0,7,4,
  54. (void *)cfgfunc_dummy, {0,0,0}
  55. },
  56. {
  57. 0x1106, 0x3068, PCI_ANY_ID, 0, 7, PCI_ANY_ID,
  58. (void *)cfgfunc_dummy, {0,0,0}
  59. },
  60. {
  61. 0x1106, PCI_ANY_ID, PCI_ANY_ID, 0,7,1,
  62. (void *)cfgfunc_ide_init, {0,0,0}
  63. },
  64. {
  65. 0,
  66. }
  67. };
  68. void pci_cfgfunc_dummy(struct pci_controller *host, pci_dev_t dev, struct pci_config_table *table)
  69. {
  70. }
  71. unsigned long irq_penalties[16] =
  72. {
  73. 1000, /* 0:timer */
  74. 1000, /* 1:keyboard */
  75. 1000, /* 2:cascade */
  76. 50, /* 3:serial (COM2) */
  77. 50, /* 4:serial (COM1) */
  78. 4, /* 5:USB2 */
  79. 100, /* 6:floppy */
  80. 3, /* 7:parallel */
  81. 50, /* 8:AC97/MC97 */
  82. 0, /* 9: */
  83. 3, /* 10:: */
  84. 0, /* 11: */
  85. 3, /* 12: USB1 */
  86. 0, /* 13: */
  87. 100, /* 14: ide0 */
  88. 100, /* 15: ide1 */
  89. };
  90. /*
  91. * The following defines a hard-coded interrupt mapping for the
  92. * know devices on the board.
  93. * If a device isn't found here, assumed to be a device that's
  94. * plugged into a PCI or AGP slot
  95. * NOTE: This table is machine dependant.
  96. */
  97. struct pci_irq_fixup_table
  98. {
  99. uint8 bus; /* Bus number */
  100. uint8 device; /* Device number */
  101. uint8 func; /* Function number */
  102. uint8 interrupt; /* Interrupt to use (0xff to disable) */
  103. };
  104. struct pci_irq_fixup_table fixuptab [] =
  105. {
  106. { 0, 0, 0, 0xff}, /* Articia S host bridge */
  107. { 0, 1, 0, 0xff}, /* Articia S AGP bridge */
  108. /* { 0, 6, 0, 0x05}, /###* 3COM ethernet */
  109. { 0, 7, 0, 0xff}, /* VIA southbridge */
  110. { 0, 7, 1, 0x0e}, /* IDE controller in legacy mode */
  111. /* { 0, 7, 2, 0x05}, /###* First USB controller */
  112. /* { 0, 7, 3, 0x0c}, /###* Second USB controller (shares interrupt with ethernet) */
  113. { 0, 7, 4, 0xff}, /* ACPI Power Management */
  114. /* { 0, 7, 5, 0x08}, /###* AC97 */
  115. /* { 0, 7, 6, 0x08}, /###* MC97 */
  116. { 0xff, 0xff, 0xff, 0xff}
  117. };
  118. /*
  119. * This table maps IRQ's to PCI interrupts
  120. */
  121. uint8 pci_intmap[4] = {0, 0, 0, 0};
  122. /*
  123. * Map PCI slots to interrupt routings
  124. * This table lists the device number assigned to a card inserted
  125. * into the slot, along with a permutation for the slot's IRQ routing.
  126. * NOTE: This table is machine dependant.
  127. */
  128. struct pci_slot_irq_routing
  129. {
  130. uint8 bus;
  131. uint8 device;
  132. uint8 ints[4];
  133. };
  134. struct pci_slot_irq_routing amigaone_pci_routing[] =
  135. {
  136. {0, 8, {0, 1, 2, 3}}, /* Slot 1 (left of riser slot) */
  137. {0, 9, {1, 2, 3, 0}}, /* Slot 2 (middle slot) */
  138. {0, 10, {2, 3, 0, 1}}, /* Slot 3 (leftmost slot) */
  139. {1, 0, {1, 0, 2, 3}}, /* AGP slot (only IRQA and IRQB) */
  140. {1, 1, {1, 2, 3, 0}}, /* PCI slot on AGP bus */
  141. {0, 6, {3, 3, 3, 3}}, /* On board ethernet */
  142. {0, 7, {0, 1, 2, 3}}, /* Southbridge */
  143. {0xff, 0, {0, 0, 0, 0}}
  144. };
  145. void articiaS_pci_irq_init(void)
  146. {
  147. char *s;
  148. s = getenv("pci_irqa");
  149. if (s)
  150. pci_intmap[0] = simple_strtoul (s, NULL, 10);
  151. else
  152. pci_intmap[0] = pci_irq_alloc();
  153. s = getenv("pci_irqb");
  154. if (s)
  155. pci_intmap[1] = simple_strtoul (s, NULL, 10);
  156. else
  157. pci_intmap[1] = pci_irq_alloc();
  158. s = getenv("pci_irqc");
  159. if (s)
  160. pci_intmap[2] = simple_strtoul (s, NULL, 10);
  161. else
  162. pci_intmap[2] = pci_irq_alloc();
  163. s = getenv("pci_irqd");
  164. if (s)
  165. pci_intmap[3] = simple_strtoul (s, NULL, 10);
  166. else
  167. pci_intmap[3] = pci_irq_alloc();
  168. }
  169. unsigned char pci_irq_alloc(void)
  170. {
  171. int i;
  172. int interrupt = 10;
  173. unsigned long min_penalty = 1000;
  174. /* Search for the minimal penalty, favoring interrupts at the end */
  175. for (i = 0; i < 16; i++)
  176. {
  177. if (irq_penalties[i] <= min_penalty)
  178. {
  179. interrupt = i;
  180. min_penalty = irq_penalties[i];
  181. }
  182. }
  183. PRINTF("pci_irq_alloc: Minimal penalty is %ld for %d\n", min_penalty, interrupt);
  184. irq_penalties[interrupt]++;
  185. return interrupt;
  186. }
  187. void articiaS_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
  188. {
  189. int8 bus, device, func, pin, line;
  190. int i;
  191. bus = PCI_BUS(dev);
  192. device = PCI_DEV(dev);
  193. func = PCI_FUNC(dev);
  194. PRINTF("Fixup irq of %d:%d.%d\n", bus, device, func);
  195. /* Search for the device in the table */
  196. for (i = 0; fixuptab[i].bus != 0xff; i++)
  197. {
  198. if (bus == fixuptab[i].bus && device == fixuptab[i].device && func == fixuptab[i].func)
  199. {
  200. /* If the device needs an interrupt, write it */
  201. if (fixuptab[i].interrupt != 0xff)
  202. {
  203. PRINTF("Assigning IRQ %d (fixed)\n", fixuptab[i].interrupt);
  204. pci_write_config_byte(dev, PCI_INTERRUPT_LINE, fixuptab[i].interrupt);
  205. }
  206. else
  207. {
  208. /* Otherwise, see if it wants an interrupt, and disable it if needed */
  209. pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
  210. if (pin)
  211. {
  212. PRINTF("Disabling IRQ\n");
  213. pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 0xff);
  214. }
  215. }
  216. return;
  217. }
  218. }
  219. /* If we get here, we have another PCI device in a slot... find the appropriate IRQ */
  220. /* Find matching pin */
  221. pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
  222. pin--;
  223. /* Search for it's map */
  224. for (i = 0; amigaone_pci_routing[i].bus != 0xff; i++)
  225. {
  226. if (bus == amigaone_pci_routing[i].bus && device == amigaone_pci_routing[i].device)
  227. {
  228. line = pci_intmap[amigaone_pci_routing[i].ints[pin]];
  229. PRINTF("Assigning IRQ %d (pin %d)\n", line, pin);
  230. pci_write_config_byte(dev, PCI_INTERRUPT_LINE, line);
  231. return;
  232. }
  233. }
  234. PRINTF("Unkonwn PCI device found\n");
  235. }
  236. void articiaS_pci_init (void)
  237. {
  238. int i;
  239. char *s;
  240. PRINTF("atriciaS_pci_init\n");
  241. /* Why aren't these relocated?? */
  242. for (i=0; config_table[i].config_device; i++)
  243. {
  244. switch((int)config_table[i].config_device)
  245. {
  246. case cfgfunc_via686: config_table[i].config_device = via_cfgfunc_via686; break;
  247. case cfgfunc_dummy: config_table[i].config_device = pci_cfgfunc_dummy; break;
  248. case cfgfunc_ide_init: config_table[i].config_device = via_cfgfunc_ide_init; break;
  249. default: PRINTF("Error: Unknown constant\n");
  250. }
  251. }
  252. articiaS_hose.first_busno = 0;
  253. articiaS_hose.last_busno = 0xff;
  254. articiaS_hose.config_table = config_table;
  255. articiaS_hose.fixup_irq = articiaS_pci_fixup_irq;
  256. articiaS_pci_irq_init();
  257. /* System memory */
  258. pci_set_region(articiaS_hose.regions + 0,
  259. ARTICIAS_SYS_BUS,
  260. ARTICIAS_SYS_PHYS,
  261. ARTICIAS_SYS_MAXSIZE,
  262. PCI_REGION_MEM | PCI_REGION_MEMORY);
  263. /* PCI memory space */
  264. pci_set_region(articiaS_hose.regions + 1,
  265. ARTICIAS_PCI_BUS,
  266. ARTICIAS_PCI_PHYS,
  267. ARTICIAS_PCI_MAXSIZE,
  268. PCI_REGION_MEM);
  269. /* PCI io space */
  270. pci_set_region(articiaS_hose.regions + 2,
  271. ARTICIAS_PCIIO_BUS,
  272. ARTICIAS_PCIIO_PHYS,
  273. ARTICIAS_PCIIO_MAXSIZE,
  274. PCI_REGION_IO);
  275. /* PCI/ISA io space */
  276. pci_set_region(articiaS_hose.regions + 3,
  277. ARTICIAS_ISAIO_BUS,
  278. ARTICIAS_ISAIO_PHYS,
  279. ARTICIAS_ISAIO_MAXSIZE,
  280. PCI_REGION_IO);
  281. articiaS_hose.region_count = 4;
  282. pci_setup_indirect(&articiaS_hose, ARTICIAS_PCI_CFGADDR, ARTICIAS_PCI_CFGDATA);
  283. PRINTF("Registering articia hose...\n");
  284. pci_register_hose(&articiaS_hose);
  285. PRINTF("Enabling AGP...\n");
  286. pci_write_config_byte(PCI_BDF(0,0,0), 0x58, 0x01);
  287. PRINTF("Scanning bus...\n");
  288. articiaS_hose.last_busno = pci_hose_scan(&articiaS_hose);
  289. via_init_irq_routing(pci_intmap);
  290. PRINTF("After-Scan results:\n");
  291. PRINTF("Bus range: %d - %d\n", articiaS_hose.first_busno , articiaS_hose.last_busno);
  292. via_init_afterscan();
  293. pci_write_config_byte(PCI_BDF(0,1,0), PCI_INTERRUPT_LINE, 0xFF);
  294. s = getenv("as_irq");
  295. if (s)
  296. {
  297. pci_write_config_byte(PCI_BDF(0,0,0), PCI_INTERRUPT_LINE, simple_strtoul (s, NULL, 10));
  298. }
  299. s = getenv("x86_run_bios");
  300. if (!s || (s && strcmp(s, "on")==0))
  301. {
  302. if (articiaS_init_vga() == -1)
  303. {
  304. /* If the VGA didn't init and we have stdout set to VGA, reset to serial */
  305. /* s = getenv("stdout"); */
  306. /* if (s && strcmp(s, "vga") == 0) */
  307. /* { */
  308. /* setenv("stdout", "serial"); */
  309. /* } */
  310. }
  311. }
  312. pci_write_config_byte(PCI_BDF(0,1,0), PCI_INTERRUPT_LINE, 0xFF);
  313. }
  314. pci_dev_t pci_hose_find_class(struct pci_controller *hose, int bus, short find_class, int index)
  315. {
  316. unsigned int sub_bus, found_multi=0;
  317. unsigned short vendor, class;
  318. unsigned char header_type;
  319. pci_dev_t dev;
  320. u8 c1, c2;
  321. sub_bus = bus;
  322. for (dev = PCI_BDF(bus,0,0);
  323. dev < PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1);
  324. dev += PCI_BDF(0,0,1))
  325. {
  326. if ( dev == PCI_BDF(hose->first_busno,0,0) )
  327. continue;
  328. if (PCI_FUNC(dev) && !found_multi)
  329. continue;
  330. pci_hose_read_config_byte(hose, dev, PCI_HEADER_TYPE, &header_type);
  331. pci_hose_read_config_word(hose, dev, PCI_VENDOR_ID, &vendor);
  332. if (vendor != 0xffff && vendor != 0x0000)
  333. {
  334. if (!PCI_FUNC(dev))
  335. found_multi = header_type & 0x80;
  336. pci_hose_read_config_byte(hose, dev, 0x0B, &c1);
  337. pci_hose_read_config_byte(hose, dev, 0x0A, &c2);
  338. class = c1<<8 | c2;
  339. /*printf("At %02x:%02x:%02x: class %x\n", */
  340. /* PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), class); */
  341. if (class == find_class)
  342. {
  343. if (index == 0)
  344. return dev;
  345. else index--;
  346. }
  347. }
  348. }
  349. return ~0;
  350. }
  351. /*
  352. * For a given bus number, find the bridge on this hose that provides this
  353. * bus number. The function scans for bridges and peeks config space offset
  354. * 0x19 (PCI_SECONDARY_BUS).
  355. */
  356. pci_dev_t pci_find_bridge_for_bus(struct pci_controller *hose, int busnr)
  357. {
  358. pci_dev_t dev;
  359. int bus;
  360. unsigned int found_multi=0;
  361. unsigned char header_type;
  362. unsigned short vendor;
  363. unsigned char secondary_bus;
  364. if (hose == NULL) hose = &articiaS_hose;
  365. if (busnr < hose->first_busno || busnr > hose->last_busno) return PCI_ANY_ID; /* Not in range */
  366. /*
  367. * The bridge must be on a lower bus number
  368. */
  369. for (bus = hose->first_busno; bus < busnr; bus++)
  370. {
  371. for (dev = PCI_BDF(bus,0,0);
  372. dev < PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1);
  373. dev += PCI_BDF(0,0,1))
  374. {
  375. if ( dev == PCI_BDF(hose->first_busno,0,0) )
  376. continue;
  377. if (PCI_FUNC(dev) && !found_multi)
  378. continue;
  379. pci_hose_read_config_byte(hose, dev, PCI_HEADER_TYPE, &header_type);
  380. pci_hose_read_config_word(hose, dev, PCI_VENDOR_ID, &vendor);
  381. if (vendor != 0xffff && vendor != 0x0000)
  382. {
  383. if (!PCI_FUNC(dev))
  384. found_multi = header_type & 0x80;
  385. if (header_type == 1) /* Bridge device header */
  386. {
  387. pci_hose_read_config_byte(hose, dev, PCI_SECONDARY_BUS, &secondary_bus);
  388. if ((int)secondary_bus == busnr) return dev;
  389. }
  390. }
  391. }
  392. }
  393. return PCI_ANY_ID;
  394. }
  395. static short classes[] =
  396. {
  397. PCI_CLASS_DISPLAY_VGA,
  398. PCI_CLASS_DISPLAY_XGA,
  399. PCI_CLASS_DISPLAY_3D,
  400. PCI_CLASS_DISPLAY_OTHER,
  401. ~0
  402. };
  403. extern int execute_bios(pci_dev_t gr_dev, void *);
  404. pci_dev_t video_dev;
  405. int articiaS_init_vga (void)
  406. {
  407. DECLARE_GLOBAL_DATA_PTR;
  408. extern void shutdown_bios(void);
  409. pci_dev_t dev = ~0;
  410. int busnr = 0;
  411. int classnr = 0;
  412. video_dev = PCI_ANY_ID;
  413. printf("VGA: ");
  414. PRINTF("Trying to initialize x86 VGA Card(s)\n");
  415. while (dev == ~0)
  416. {
  417. PRINTF("Searching for class 0x%x on bus %d\n", classes[classnr], busnr);
  418. /* Find the first of this class on this bus */
  419. dev = pci_hose_find_class(&articiaS_hose, busnr, classes[classnr], 0);
  420. if (dev != ~0)
  421. {
  422. PRINTF("Found VGA Card at %02x:%02x:%02x\n", PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev));
  423. break;
  424. }
  425. busnr++;
  426. if (busnr > articiaS_hose.last_busno)
  427. {
  428. busnr = 0;
  429. classnr ++;
  430. if (classes[classnr] == ~0)
  431. {
  432. printf("NOT PRESENT\n");
  433. return -1;
  434. }
  435. }
  436. }
  437. /*
  438. * If we get here we have found the first graphics card.
  439. * If the bus number is not 0, then it is probably behind a bridge, and the
  440. * bridge needs to be told to forward VGA access.
  441. */
  442. if (PCI_BUS(dev) != 0)
  443. {
  444. pci_dev_t bridge;
  445. PRINTF("Behind bridge, looking for bridge\n");
  446. bridge = pci_find_bridge_for_bus(&articiaS_hose, PCI_BUS(dev));
  447. if (dev != PCI_ANY_ID)
  448. {
  449. unsigned char agp_control_0;
  450. PRINTF("Got the bridge at %02x:%02x:%02x\n",
  451. PCI_BUS(bridge), PCI_DEV(bridge), PCI_FUNC(bridge));
  452. pci_hose_read_config_byte(&articiaS_hose, bridge, 0x3E, &agp_control_0);
  453. agp_control_0 |= 0x18;
  454. pci_hose_write_config_byte(&articiaS_hose, bridge, 0x3E, agp_control_0);
  455. PRINTF("Configured for VGA forwarding\n");
  456. }
  457. }
  458. /*
  459. * Now try to run the bios
  460. */
  461. PRINTF("Trying to run bios now\n");
  462. if (execute_bios(dev, gd->relocaddr))
  463. {
  464. printf("OK\n");
  465. video_dev = dev;
  466. }
  467. else
  468. {
  469. printf("ERROR\n");
  470. }
  471. PRINTF("Done scanning.\n");
  472. shutdown_bios();
  473. if (dev == PCI_ANY_ID) return -1;
  474. else return 0;
  475. }