macros.h 1.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384
  1. #ifndef _MACROS_H
  2. #define _MACROS_H
  3. /*
  4. ** Load a long integer into a register
  5. */
  6. .macro liw reg, value
  7. lis \reg, \value@h
  8. ori \reg, \reg, \value@l
  9. .endm
  10. /*
  11. ** Generate config_addr request
  12. ** This macro expects the values in registers:
  13. ** r3 - bus
  14. ** r4 - devfn
  15. ** r5 - offset
  16. */
  17. .macro config_addr
  18. rlwinm r9, r5, 24, 0, 6
  19. rlwinm r8, r4, 16, 0, 31
  20. rlwinm r7, r3, 8, 0, 31
  21. or r9, r8, r9
  22. or r9, r7, r9
  23. ori r9, r9, 0x80
  24. liw r10, 0xfec00cf8
  25. stw r9, 0(r10)
  26. eieio
  27. sync
  28. .endm
  29. /*
  30. ** Generate config_data address
  31. */
  32. .macro config_data mask
  33. andi. r9, r5, \mask
  34. addi r9, r9, 0xcfc
  35. oris r9, r9, 0xfee0
  36. .endm
  37. /*
  38. ** Write a byte value to an output port
  39. */
  40. .macro outb port, value
  41. lis r2, 0xfe00
  42. li r0, \value
  43. stb r0, \port(r2)
  44. .endm
  45. /*
  46. ** Write a register byte value to an output port
  47. */
  48. .macro outbr port, value
  49. lis r2, 0xfe00
  50. stb \value, \port(r2)
  51. .endm
  52. /*
  53. ** Read a byte value from a port into a specified register
  54. */
  55. .macro inb reg, port
  56. lis r2, 0xfe00
  57. lbz \reg, \port(r2)
  58. .endm
  59. /*
  60. ** Write a byte to the SuperIO config area
  61. */
  62. .macro siowb offset, value
  63. li r3, 0
  64. li r4, (7<<3)
  65. li r5, \offset
  66. li r6, \value
  67. bl pci_write_cfg_byte
  68. .endm
  69. #endif