Godzil 1d928e7091 Merge branch 'udev' into develop 10 years ago
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ipcore_dir f0a2e85c65 FPGA: updated project files 12 years ago
address.v e33b2b2bc7 FPGA: simple SNES address input filtering 11 years ago
cx4.v 60d7a08117 FPGA: Adjust Cx4 timing to new master clock rate 11 years ago
dac.v 1a52da6272 FPGA: Adjust DAC I²S signal timing 11 years ago
dcm.v e57c4aa450 FPGA/cx4: initial commit 12 years ago
main.ucf d47858083a FPGA/Cx4: update user constraints for changed system clock 11 years ago
main.v 1d928e7091 Merge branch 'udev' into develop 10 years ago
msu.v 9253cc45b0 FPGA: implement MSU1 "audio error" status bit 11 years ago
sd2snes_cx4.xise 2a1ef40796 FPGA/cx4: adjust Cx4 CPU timing 12 years ago
sd_dma.v effa2a6972 FPGA/SDDMA: fix clock glitch, adjust RAM write timings 11 years ago
spi.v 968c347986 FPGA/SPI: detect end of byte via MSB toggle instead of constant compare of async input 11 years ago