Godzil
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8d58ca0f7b
Big code cleanup and re-indented, finally ! (Thanks astyle!)
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10 年之前 |
Godzil
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7e0186d7a0
Automatically generate the fpga bit .h file
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10 年之前 |
Godzil
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1d928e7091
Merge branch 'udev' into develop
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10 年之前 |
Godzil
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043eeea399
Automate cfgware.h file generation. Will automatically search the .bit file from sd2sneslite rle it and convert to .h file.
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11 年之前 |
Godzil
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c4ef438cac
Update openocd interface to match my own interface
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12 年之前 |
Maximilian Rehkopf
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82998d7a48
PCB/Rev.E2: Add BOM
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12 年之前 |
Maximilian Rehkopf
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32a0a50c54
update changelog for 0.1.4a
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12 年之前 |
Maximilian Rehkopf
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b8d3b952ad
firmware: bump version no. to 0.1.4a
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12 年之前 |
Maximilian Rehkopf
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e97396adc9
menu: fix DMA initialization (sprite glitches in some games)
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12 年之前 |
mrehkopf
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a72476ea6c
Merge pull request #24 from Godzil/develop
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12 年之前 |
Maximilian Rehkopf
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d47858083a
FPGA/Cx4: update user constraints for changed system clock
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12 年之前 |
Maximilian Rehkopf
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a7ac2f8900
update changelog
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12 年之前 |
Maximilian Rehkopf
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c80bdfbf59
Firmware: do not turn off write LED in case of periodic SRAM saving
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12 年之前 |
Maximilian Rehkopf
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a9ea821c0d
Firmware: implement MSU1 interface changes
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12 年之前 |
Maximilian Rehkopf
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9baa4b7f9f
Firmware: move SaveRAM to $E00000
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12 年之前 |
Maximilian Rehkopf
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2ef480f751
FPGA/DSPx: buffer register input
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12 年之前 |
Maximilian Rehkopf
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6b3a7eb4ae
FPGA/SRTC: buffer register/address input
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12 年之前 |
Maximilian Rehkopf
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effa2a6972
FPGA/SDDMA: fix clock glitch, adjust RAM write timings
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12 年之前 |
Maximilian Rehkopf
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9253cc45b0
FPGA: implement MSU1 "audio error" status bit
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12 年之前 |
Maximilian Rehkopf
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9fbe61bad1
FPGA: Use internal clock instead of SNES master clock for $213F RMW timing
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12 年之前 |
Maximilian Rehkopf
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968c347986
FPGA/SPI: detect end of byte via MSB toggle instead of constant compare of async input
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12 年之前 |
Maximilian Rehkopf
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c231c8b821
FPGA: misc cleanup
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12 年之前 |
Maximilian Rehkopf
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60d7a08117
FPGA: Adjust Cx4 timing to new master clock rate
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12 年之前 |
Maximilian Rehkopf
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7df6909266
FPGA: rework shared memory access FSM
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12 年之前 |
Maximilian Rehkopf
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006ea8c44a
FPGA: debug wires
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12 年之前 |
Maximilian Rehkopf
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684e2c3b81
FPGA/BSX: fix checksum registers
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12 年之前 |
Maximilian Rehkopf
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3af05cef91
FPGA/sd2sneslite: add missing file mcu_cmd.v; remove avr_cmd.v
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12 年之前 |
Maximilian Rehkopf
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a083d80ff9
FPGA: update clock speed to 88MHz
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12 年之前 |
Maximilian Rehkopf
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8148f5567c
FPGA: properly synchronize external signals
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12 年之前 |
Maximilian Rehkopf
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1a52da6272
FPGA: Adjust DAC I²S signal timing
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12 年之前 |