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@@ -1,163 +0,0 @@
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-`timescale 1ns / 1ps
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-//////////////////////////////////////////////////////////////////////////////////
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-// Company:
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-// Engineer:
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-//
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-// Create Date: 21:57:50 08/25/2009
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-// Design Name:
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-// Module Name: mcu_cmd
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-// Project Name:
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-// Target Devices:
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-// Tool versions:
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-// Description:
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-//
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-// Dependencies:
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-//
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-// Revision:
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-// Revision 0.01 - File Created
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-// Additional Comments:
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-//
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-//////////////////////////////////////////////////////////////////////////////////
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-module mcu_cmd(
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- input clk,
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- input cmd_ready,
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- input param_ready,
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- input [7:0] cmd_data,
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- input [7:0] param_data,
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- output [3:0] mcu_mapper,
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- output [3:0] mcu_sram_size,
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- output mcu_read,
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- output mcu_write,
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- output [7:0] mcu_data_out,
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- input [7:0] mcu_data_in,
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- output [7:0] spi_data_out,
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- input [31:0] spi_byte_cnt,
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- input [2:0] spi_bit_cnt,
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- output [23:0] addr_out,
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- output [3:0] mapper,
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- input endmessage,
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- input startmessage,
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- output [23:0] saveram_mask_out,
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- output [23:0] rom_mask_out
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- );
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-
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-
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-reg [3:0] MAPPER_BUF;
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-reg [3:0] SRAM_SIZE_BUF;
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-reg MCU_READ_BUF;
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-reg MCU_WRITE_BUF;
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-reg [23:0] ADDR_OUT_BUF;
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-
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-reg [7:0] MCU_DATA_OUT_BUF;
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-reg [7:0] MCU_DATA_IN_BUF;
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-reg [1:0] mcu_nextaddr_buf;
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-
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-wire mcu_nextaddr;
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-
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-reg [1:0] SRAM_MASK_IDX;
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-reg [23:0] SAVERAM_MASK;
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-reg [23:0] ROM_MASK;
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-
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-assign spi_data_out = MCU_DATA_IN_BUF;
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-
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-initial begin
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- ADDR_OUT_BUF = 0;
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-end
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-
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-// command interpretation
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-always @(posedge clk) begin
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- if (cmd_ready) begin
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- case (cmd_data[7:4])
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- 4'h3: // select mapper
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- MAPPER_BUF <= cmd_data[3:0];
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- endcase
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- end else if (param_ready) begin
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- casex (cmd_data[7:0])
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- 8'h0x:
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- case (spi_byte_cnt)
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- 32'h2: begin
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- ADDR_OUT_BUF[23:16] <= param_data;
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- ADDR_OUT_BUF[15:0] <= 16'b0;
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- end
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- 32'h3:
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- ADDR_OUT_BUF[15:8] <= param_data;
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- 32'h4:
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- ADDR_OUT_BUF[7:0] <= param_data;
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- endcase
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- 8'h1x:
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- case (spi_byte_cnt)
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- 32'h2:
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- ROM_MASK[23:16] <= param_data;
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- 32'h3:
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- ROM_MASK[15:8] <= param_data;
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- 32'h4:
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- ROM_MASK[7:0] <= param_data;
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- endcase
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- 8'h2x:
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- case (spi_byte_cnt)
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- 32'h2:
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- SAVERAM_MASK[23:16] <= param_data;
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- 32'h3:
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- SAVERAM_MASK[15:8] <= param_data;
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- 32'h4:
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- SAVERAM_MASK[7:0] <= param_data;
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- endcase
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- 8'h9x:
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- MCU_DATA_OUT_BUF <= param_data;
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- endcase
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- end
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- if (mcu_nextaddr & (cmd_data[7:5] == 3'h4) && (cmd_data[3]) && (spi_byte_cnt > (32'h1+cmd_data[4]))) begin
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- ADDR_OUT_BUF <= ADDR_OUT_BUF + 1;
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- end
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-end
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-
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-// value fetch during last SPI bit
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-always @(posedge clk) begin
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- if (spi_bit_cnt == 3'h7)
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- if (cmd_data[7:0] == 8'hF0)
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- MCU_DATA_IN_BUF <= 8'hA5;
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- else if (cmd_data[7:0] == 8'hFF)
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- MCU_DATA_IN_BUF <= param_data;
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- else if (cmd_data[7:4] == 4'h8)
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- MCU_DATA_IN_BUF <= mcu_data_in;
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- else
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- MCU_DATA_IN_BUF <= cmd_data;
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-end
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-
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-// nextaddr pulse generation
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-always @(posedge clk) begin
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- if (spi_bit_cnt == 3'h0)
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- mcu_nextaddr_buf <= {mcu_nextaddr_buf[0], 1'b1};
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- else
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- mcu_nextaddr_buf <= {mcu_nextaddr_buf[0], 1'b0};
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-end
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-
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-
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-// r/w pulse
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-always @(posedge clk) begin
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- if ((spi_bit_cnt == 3'h1 || spi_bit_cnt == 3'h2 || spi_bit_cnt == 3'h3) & (cmd_data[7:4] == 4'h9) & (spi_byte_cnt > 32'h1))
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- MCU_WRITE_BUF <= 1'b0;
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- else
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- MCU_WRITE_BUF <= 1'b1;
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-
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-// Read pulse is two spi cycles to ensure that the value
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-// is ready in the 2nd cycle in MCU master mode
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- if ((spi_bit_cnt == 3'h5 || spi_bit_cnt == 3'h6 || spi_bit_cnt == 3'h7) & (cmd_data[7:4] == 4'h8) & (spi_byte_cnt > 32'h0))
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- MCU_READ_BUF <= 1'b0;
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- else
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- MCU_READ_BUF <= 1'b1;
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-end
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-
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-// trigger for nextaddr
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-assign mcu_nextaddr = mcu_nextaddr_buf == 2'b01;
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-
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-assign mcu_read = MCU_READ_BUF;
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-assign mcu_write = MCU_WRITE_BUF;
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-assign addr_out = ADDR_OUT_BUF;
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-assign mcu_data_out = MCU_DATA_OUT_BUF;
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-assign mcu_mapper = MAPPER_BUF;
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-assign mcu_sram_size = SRAM_SIZE_BUF;
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-assign rom_mask_out = ROM_MASK;
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-assign saveram_mask_out = SAVERAM_MASK;
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-
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-endmodule
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