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@@ -23,13 +23,25 @@ static SPINAND_OP_VARIANTS(read_cache_variants,
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SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
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SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
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+static SPINAND_OP_VARIANTS(write_cache_x4_variants,
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+ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
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+ SPINAND_PROG_LOAD(true, 0, NULL, 0));
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+
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+static SPINAND_OP_VARIANTS(update_cache_x4_variants,
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+ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
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+ SPINAND_PROG_LOAD(false, 0, NULL, 0));
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+
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+/**
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+ * Backward compatibility for 1st generation Serial NAND devices
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+ * which don't support Quad Program Load operation.
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+ */
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static SPINAND_OP_VARIANTS(write_cache_variants,
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SPINAND_PROG_LOAD(true, 0, NULL, 0));
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static SPINAND_OP_VARIANTS(update_cache_variants,
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SPINAND_PROG_LOAD(false, 0, NULL, 0));
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-static int tc58cxgxsx_ooblayout_ecc(struct mtd_info *mtd, int section,
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+static int tx58cxgxsxraix_ooblayout_ecc(struct mtd_info *mtd, int section,
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struct mtd_oob_region *region)
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{
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if (section > 0)
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@@ -41,7 +53,7 @@ static int tc58cxgxsx_ooblayout_ecc(struct mtd_info *mtd, int section,
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return 0;
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}
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-static int tc58cxgxsx_ooblayout_free(struct mtd_info *mtd, int section,
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+static int tx58cxgxsxraix_ooblayout_free(struct mtd_info *mtd, int section,
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struct mtd_oob_region *region)
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{
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if (section > 0)
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@@ -54,12 +66,12 @@ static int tc58cxgxsx_ooblayout_free(struct mtd_info *mtd, int section,
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return 0;
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}
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-static const struct mtd_ooblayout_ops tc58cxgxsx_ooblayout = {
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- .ecc = tc58cxgxsx_ooblayout_ecc,
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- .rfree = tc58cxgxsx_ooblayout_free,
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+static const struct mtd_ooblayout_ops tx58cxgxsxraix_ooblayout = {
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+ .ecc = tx58cxgxsxraix_ooblayout_ecc,
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+ .rfree = tx58cxgxsxraix_ooblayout_free,
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};
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-static int tc58cxgxsx_ecc_get_status(struct spinand_device *spinand,
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+static int tx58cxgxsxraix_ecc_get_status(struct spinand_device *spinand,
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u8 status)
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{
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struct nand_device *nand = spinand_to_nand(spinand);
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@@ -98,76 +110,151 @@ static int tc58cxgxsx_ecc_get_status(struct spinand_device *spinand,
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}
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static const struct spinand_info toshiba_spinand_table[] = {
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- /* 3.3V 1Gb */
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- SPINAND_INFO("TC58CVG0S3", 0xC2,
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+ /* 3.3V 1Gb (1st generation) */
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+ SPINAND_INFO("TC58CVG0S3HRAIG", 0xC2,
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NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_variants,
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&update_cache_variants),
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0,
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- SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
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- tc58cxgxsx_ecc_get_status)),
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- /* 3.3V 2Gb */
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- SPINAND_INFO("TC58CVG1S3", 0xCB,
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+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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+ tx58cxgxsxraix_ecc_get_status)),
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+ /* 3.3V 2Gb (1st generation) */
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+ SPINAND_INFO("TC58CVG1S3HRAIG", 0xCB,
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NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_variants,
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&update_cache_variants),
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0,
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- SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
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- tc58cxgxsx_ecc_get_status)),
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- /* 3.3V 4Gb */
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- SPINAND_INFO("TC58CVG2S0", 0xCD,
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- NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
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- NAND_ECCREQ(8, 512),
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- SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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- &write_cache_variants,
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- &update_cache_variants),
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- 0,
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- SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
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- tc58cxgxsx_ecc_get_status)),
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- /* 3.3V 4Gb */
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- SPINAND_INFO("TC58CVG2S0", 0xED,
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+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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+ tx58cxgxsxraix_ecc_get_status)),
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+ /* 3.3V 4Gb (1st generation) */
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+ SPINAND_INFO("TC58CVG2S0HRAIG", 0xCD,
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NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_variants,
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&update_cache_variants),
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0,
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- SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
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- tc58cxgxsx_ecc_get_status)),
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- /* 1.8V 1Gb */
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- SPINAND_INFO("TC58CYG0S3", 0xB2,
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+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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+ tx58cxgxsxraix_ecc_get_status)),
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+ /* 1.8V 1Gb (1st generation) */
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+ SPINAND_INFO("TC58CYG0S3HRAIG", 0xB2,
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NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_variants,
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&update_cache_variants),
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0,
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- SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
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- tc58cxgxsx_ecc_get_status)),
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- /* 1.8V 2Gb */
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- SPINAND_INFO("TC58CYG1S3", 0xBB,
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+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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+ tx58cxgxsxraix_ecc_get_status)),
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+ /* 1.8V 2Gb (1st generation) */
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+ SPINAND_INFO("TC58CYG1S3HRAIG", 0xBB,
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NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_variants,
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&update_cache_variants),
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0,
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- SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
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- tc58cxgxsx_ecc_get_status)),
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- /* 1.8V 4Gb */
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- SPINAND_INFO("TC58CYG2S0", 0xBD,
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+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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+ tx58cxgxsxraix_ecc_get_status)),
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+ /* 1.8V 4Gb (1st generation) */
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+ SPINAND_INFO("TC58CYG2S0HRAIG", 0xBD,
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NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_variants,
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&update_cache_variants),
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0,
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- SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
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- tc58cxgxsx_ecc_get_status)),
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+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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+ tx58cxgxsxraix_ecc_get_status)),
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+
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+ /*
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+ * 2nd generation serial nand has HOLD_D which is equivalent to
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+ * QE_BIT.
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+ */
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+ /* 3.3V 1Gb (2nd generation) */
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+ SPINAND_INFO("TC58CVG0S3HRAIJ", 0xE2,
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+ NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
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+ NAND_ECCREQ(8, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_x4_variants,
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+ &update_cache_x4_variants),
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+ SPINAND_HAS_QE_BIT,
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+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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+ tx58cxgxsxraix_ecc_get_status)),
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+ /* 3.3V 2Gb (2nd generation) */
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+ SPINAND_INFO("TC58CVG1S3HRAIJ", 0xEB,
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+ NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
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+ NAND_ECCREQ(8, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_x4_variants,
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+ &update_cache_x4_variants),
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+ SPINAND_HAS_QE_BIT,
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+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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+ tx58cxgxsxraix_ecc_get_status)),
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+ /* 3.3V 4Gb (2nd generation) */
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+ SPINAND_INFO("TC58CVG2S0HRAIJ", 0xED,
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+ NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
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+ NAND_ECCREQ(8, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_x4_variants,
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+ &update_cache_x4_variants),
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+ SPINAND_HAS_QE_BIT,
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+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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+ tx58cxgxsxraix_ecc_get_status)),
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+ /* 3.3V 8Gb (2nd generation) */
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+ SPINAND_INFO("TH58CVG3S0HRAIJ", 0xE4,
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+ NAND_MEMORG(1, 4096, 256, 64, 4096, 1, 1, 1),
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+ NAND_ECCREQ(8, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_x4_variants,
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+ &update_cache_x4_variants),
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+ SPINAND_HAS_QE_BIT,
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+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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+ tx58cxgxsxraix_ecc_get_status)),
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+ /* 1.8V 1Gb (2nd generation) */
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+ SPINAND_INFO("TC58CYG0S3HRAIJ", 0xD2,
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+ NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
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+ NAND_ECCREQ(8, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_x4_variants,
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+ &update_cache_x4_variants),
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+ SPINAND_HAS_QE_BIT,
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+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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+ tx58cxgxsxraix_ecc_get_status)),
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+ /* 1.8V 2Gb (2nd generation) */
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+ SPINAND_INFO("TC58CYG1S3HRAIJ", 0xDB,
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+ NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
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+ NAND_ECCREQ(8, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_x4_variants,
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+ &update_cache_x4_variants),
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+ SPINAND_HAS_QE_BIT,
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+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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+ tx58cxgxsxraix_ecc_get_status)),
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+ /* 1.8V 4Gb (2nd generation) */
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+ SPINAND_INFO("TC58CYG2S0HRAIJ", 0xDD,
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+ NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
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+ NAND_ECCREQ(8, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_x4_variants,
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+ &update_cache_x4_variants),
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+ SPINAND_HAS_QE_BIT,
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+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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+ tx58cxgxsxraix_ecc_get_status)),
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+ /* 1.8V 8Gb (2nd generation) */
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+ SPINAND_INFO("TH58CYG3S0HRAIJ", 0xD4,
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+ NAND_MEMORG(1, 4096, 256, 64, 4096, 1, 1, 1),
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+ NAND_ECCREQ(8, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_x4_variants,
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+ &update_cache_x4_variants),
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+ SPINAND_HAS_QE_BIT,
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+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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+ tx58cxgxsxraix_ecc_get_status)),
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};
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static int toshiba_spinand_detect(struct spinand_device *spinand)
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