toshiba.c 8.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2018 exceet electronics GmbH
  4. * Copyright (c) 2018 Kontron Electronics GmbH
  5. *
  6. * Author: Frieder Schrempf <frieder.schrempf@kontron.de>
  7. */
  8. #ifndef __UBOOT__
  9. #include <malloc.h>
  10. #include <linux/device.h>
  11. #include <linux/kernel.h>
  12. #endif
  13. #include <linux/bug.h>
  14. #include <linux/mtd/spinand.h>
  15. #define SPINAND_MFR_TOSHIBA 0x98
  16. #define TOSH_STATUS_ECC_HAS_BITFLIPS_T (3 << 4)
  17. static SPINAND_OP_VARIANTS(read_cache_variants,
  18. SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
  19. SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
  20. SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
  21. SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
  22. static SPINAND_OP_VARIANTS(write_cache_x4_variants,
  23. SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
  24. SPINAND_PROG_LOAD(true, 0, NULL, 0));
  25. static SPINAND_OP_VARIANTS(update_cache_x4_variants,
  26. SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
  27. SPINAND_PROG_LOAD(false, 0, NULL, 0));
  28. /**
  29. * Backward compatibility for 1st generation Serial NAND devices
  30. * which don't support Quad Program Load operation.
  31. */
  32. static SPINAND_OP_VARIANTS(write_cache_variants,
  33. SPINAND_PROG_LOAD(true, 0, NULL, 0));
  34. static SPINAND_OP_VARIANTS(update_cache_variants,
  35. SPINAND_PROG_LOAD(false, 0, NULL, 0));
  36. static int tx58cxgxsxraix_ooblayout_ecc(struct mtd_info *mtd, int section,
  37. struct mtd_oob_region *region)
  38. {
  39. if (section > 0)
  40. return -ERANGE;
  41. region->offset = mtd->oobsize / 2;
  42. region->length = mtd->oobsize / 2;
  43. return 0;
  44. }
  45. static int tx58cxgxsxraix_ooblayout_free(struct mtd_info *mtd, int section,
  46. struct mtd_oob_region *region)
  47. {
  48. if (section > 0)
  49. return -ERANGE;
  50. /* 2 bytes reserved for BBM */
  51. region->offset = 2;
  52. region->length = (mtd->oobsize / 2) - 2;
  53. return 0;
  54. }
  55. static const struct mtd_ooblayout_ops tx58cxgxsxraix_ooblayout = {
  56. .ecc = tx58cxgxsxraix_ooblayout_ecc,
  57. .rfree = tx58cxgxsxraix_ooblayout_free,
  58. };
  59. static int tx58cxgxsxraix_ecc_get_status(struct spinand_device *spinand,
  60. u8 status)
  61. {
  62. struct nand_device *nand = spinand_to_nand(spinand);
  63. u8 mbf = 0;
  64. struct spi_mem_op op = SPINAND_GET_FEATURE_OP(0x30, &mbf);
  65. switch (status & STATUS_ECC_MASK) {
  66. case STATUS_ECC_NO_BITFLIPS:
  67. return 0;
  68. case STATUS_ECC_UNCOR_ERROR:
  69. return -EBADMSG;
  70. case STATUS_ECC_HAS_BITFLIPS:
  71. case TOSH_STATUS_ECC_HAS_BITFLIPS_T:
  72. /*
  73. * Let's try to retrieve the real maximum number of bitflips
  74. * in order to avoid forcing the wear-leveling layer to move
  75. * data around if it's not necessary.
  76. */
  77. if (spi_mem_exec_op(spinand->slave, &op))
  78. return nand->eccreq.strength;
  79. mbf >>= 4;
  80. if (WARN_ON(mbf > nand->eccreq.strength || !mbf))
  81. return nand->eccreq.strength;
  82. return mbf;
  83. default:
  84. break;
  85. }
  86. return -EINVAL;
  87. }
  88. static const struct spinand_info toshiba_spinand_table[] = {
  89. /* 3.3V 1Gb (1st generation) */
  90. SPINAND_INFO("TC58CVG0S3HRAIG", 0xC2,
  91. NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
  92. NAND_ECCREQ(8, 512),
  93. SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
  94. &write_cache_variants,
  95. &update_cache_variants),
  96. 0,
  97. SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
  98. tx58cxgxsxraix_ecc_get_status)),
  99. /* 3.3V 2Gb (1st generation) */
  100. SPINAND_INFO("TC58CVG1S3HRAIG", 0xCB,
  101. NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
  102. NAND_ECCREQ(8, 512),
  103. SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
  104. &write_cache_variants,
  105. &update_cache_variants),
  106. 0,
  107. SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
  108. tx58cxgxsxraix_ecc_get_status)),
  109. /* 3.3V 4Gb (1st generation) */
  110. SPINAND_INFO("TC58CVG2S0HRAIG", 0xCD,
  111. NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
  112. NAND_ECCREQ(8, 512),
  113. SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
  114. &write_cache_variants,
  115. &update_cache_variants),
  116. 0,
  117. SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
  118. tx58cxgxsxraix_ecc_get_status)),
  119. /* 1.8V 1Gb (1st generation) */
  120. SPINAND_INFO("TC58CYG0S3HRAIG", 0xB2,
  121. NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
  122. NAND_ECCREQ(8, 512),
  123. SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
  124. &write_cache_variants,
  125. &update_cache_variants),
  126. 0,
  127. SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
  128. tx58cxgxsxraix_ecc_get_status)),
  129. /* 1.8V 2Gb (1st generation) */
  130. SPINAND_INFO("TC58CYG1S3HRAIG", 0xBB,
  131. NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
  132. NAND_ECCREQ(8, 512),
  133. SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
  134. &write_cache_variants,
  135. &update_cache_variants),
  136. 0,
  137. SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
  138. tx58cxgxsxraix_ecc_get_status)),
  139. /* 1.8V 4Gb (1st generation) */
  140. SPINAND_INFO("TC58CYG2S0HRAIG", 0xBD,
  141. NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
  142. NAND_ECCREQ(8, 512),
  143. SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
  144. &write_cache_variants,
  145. &update_cache_variants),
  146. 0,
  147. SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
  148. tx58cxgxsxraix_ecc_get_status)),
  149. /*
  150. * 2nd generation serial nand has HOLD_D which is equivalent to
  151. * QE_BIT.
  152. */
  153. /* 3.3V 1Gb (2nd generation) */
  154. SPINAND_INFO("TC58CVG0S3HRAIJ", 0xE2,
  155. NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
  156. NAND_ECCREQ(8, 512),
  157. SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
  158. &write_cache_x4_variants,
  159. &update_cache_x4_variants),
  160. SPINAND_HAS_QE_BIT,
  161. SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
  162. tx58cxgxsxraix_ecc_get_status)),
  163. /* 3.3V 2Gb (2nd generation) */
  164. SPINAND_INFO("TC58CVG1S3HRAIJ", 0xEB,
  165. NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
  166. NAND_ECCREQ(8, 512),
  167. SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
  168. &write_cache_x4_variants,
  169. &update_cache_x4_variants),
  170. SPINAND_HAS_QE_BIT,
  171. SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
  172. tx58cxgxsxraix_ecc_get_status)),
  173. /* 3.3V 4Gb (2nd generation) */
  174. SPINAND_INFO("TC58CVG2S0HRAIJ", 0xED,
  175. NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
  176. NAND_ECCREQ(8, 512),
  177. SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
  178. &write_cache_x4_variants,
  179. &update_cache_x4_variants),
  180. SPINAND_HAS_QE_BIT,
  181. SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
  182. tx58cxgxsxraix_ecc_get_status)),
  183. /* 3.3V 8Gb (2nd generation) */
  184. SPINAND_INFO("TH58CVG3S0HRAIJ", 0xE4,
  185. NAND_MEMORG(1, 4096, 256, 64, 4096, 1, 1, 1),
  186. NAND_ECCREQ(8, 512),
  187. SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
  188. &write_cache_x4_variants,
  189. &update_cache_x4_variants),
  190. SPINAND_HAS_QE_BIT,
  191. SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
  192. tx58cxgxsxraix_ecc_get_status)),
  193. /* 1.8V 1Gb (2nd generation) */
  194. SPINAND_INFO("TC58CYG0S3HRAIJ", 0xD2,
  195. NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
  196. NAND_ECCREQ(8, 512),
  197. SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
  198. &write_cache_x4_variants,
  199. &update_cache_x4_variants),
  200. SPINAND_HAS_QE_BIT,
  201. SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
  202. tx58cxgxsxraix_ecc_get_status)),
  203. /* 1.8V 2Gb (2nd generation) */
  204. SPINAND_INFO("TC58CYG1S3HRAIJ", 0xDB,
  205. NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
  206. NAND_ECCREQ(8, 512),
  207. SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
  208. &write_cache_x4_variants,
  209. &update_cache_x4_variants),
  210. SPINAND_HAS_QE_BIT,
  211. SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
  212. tx58cxgxsxraix_ecc_get_status)),
  213. /* 1.8V 4Gb (2nd generation) */
  214. SPINAND_INFO("TC58CYG2S0HRAIJ", 0xDD,
  215. NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
  216. NAND_ECCREQ(8, 512),
  217. SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
  218. &write_cache_x4_variants,
  219. &update_cache_x4_variants),
  220. SPINAND_HAS_QE_BIT,
  221. SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
  222. tx58cxgxsxraix_ecc_get_status)),
  223. /* 1.8V 8Gb (2nd generation) */
  224. SPINAND_INFO("TH58CYG3S0HRAIJ", 0xD4,
  225. NAND_MEMORG(1, 4096, 256, 64, 4096, 1, 1, 1),
  226. NAND_ECCREQ(8, 512),
  227. SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
  228. &write_cache_x4_variants,
  229. &update_cache_x4_variants),
  230. SPINAND_HAS_QE_BIT,
  231. SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
  232. tx58cxgxsxraix_ecc_get_status)),
  233. };
  234. static int toshiba_spinand_detect(struct spinand_device *spinand)
  235. {
  236. u8 *id = spinand->id.data;
  237. int ret;
  238. /*
  239. * Toshiba SPI NAND read ID needs a dummy byte,
  240. * so the first byte in id is garbage.
  241. */
  242. if (id[1] != SPINAND_MFR_TOSHIBA)
  243. return 0;
  244. ret = spinand_match_and_init(spinand, toshiba_spinand_table,
  245. ARRAY_SIZE(toshiba_spinand_table),
  246. id[2]);
  247. if (ret)
  248. return ret;
  249. return 1;
  250. }
  251. static const struct spinand_manufacturer_ops toshiba_spinand_manuf_ops = {
  252. .detect = toshiba_spinand_detect,
  253. };
  254. const struct spinand_manufacturer toshiba_spinand_manufacturer = {
  255. .id = SPINAND_MFR_TOSHIBA,
  256. .name = "Toshiba",
  257. .ops = &toshiba_spinand_manuf_ops,
  258. };