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@@ -14,6 +14,11 @@
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#define MV_DDR_MAX_BUS_NUM 9
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#define MV_DDR_MAX_IFACE_NUM 1
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+enum mv_ddr_twin_die {
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+ COMBINED,
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+ NOT_COMBINED,
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+};
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+
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struct bus_params {
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/* Chip Select (CS) bitmask (bits 0-CS0, bit 1- CS1 ...) */
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u8 cs_bitmask;
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@@ -47,6 +52,9 @@ struct if_params {
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/* The DDR frequency for each interfaces */
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enum mv_ddr_freq memory_freq;
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+ /* ddr twin-die */
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+ enum mv_ddr_twin_die twin_die_combined;
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+
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/*
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* delay CAS Write Latency
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* - 0 for using default value (jedec suggested)
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@@ -113,6 +121,9 @@ struct mv_ddr_topology_map {
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/* source of ddr configuration data */
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enum mv_ddr_cfg_src cfg_src;
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+ /* ddr twin-die */
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+ enum mv_ddr_twin_die twin_die_combined;
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+
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/* raw spd data */
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union mv_ddr_spd_data spd_data;
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@@ -193,6 +204,7 @@ struct mv_ddr_iface {
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/* ddr interface topology map */
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struct mv_ddr_topology_map tm;
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+
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};
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struct mv_ddr_iface *mv_ddr_iface_get(void);
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