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@@ -43,6 +43,12 @@
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interrupts = <1 9 0x4>;
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};
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+ gic_lpi_base: syscon@0x80000000 {
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+ compatible = "gic-lpi-base";
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+ reg = <0x0 0x80000000 0x0 0x200000>;
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+ max-gic-redistributors = <16>;
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+ };
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+
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */
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@@ -193,6 +199,28 @@
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num-cs = <6>;
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};
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+ gpio0: gpio@2300000 {
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+ compatible = "fsl,qoriq-gpio";
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+ reg = <0x0 0x2300000 0x0 0x10000>;
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+ interrupts = <0 36 4>;
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+ gpio-controller;
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+ little-endian;
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+ #gpio-cells = <2>;
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+ interrupt-controller;
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+ #interrupt-cells = <2>;
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+ };
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+
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+ gpio1: gpio@2310000 {
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+ compatible = "fsl,qoriq-gpio";
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+ reg = <0x0 0x2310000 0x0 0x10000>;
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+ interrupts = <0 36 4>;
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+ gpio-controller;
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+ little-endian;
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+ #gpio-cells = <2>;
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+ interrupt-controller;
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+ #interrupt-cells = <2>;
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+ };
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+
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gpio2: gpio@2320000 {
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compatible = "fsl,qoriq-gpio";
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reg = <0x0 0x2320000 0x0 0x10000>;
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@@ -204,6 +232,17 @@
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#interrupt-cells = <2>;
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};
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+ gpio3: gpio@2330000 {
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+ compatible = "fsl,qoriq-gpio";
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+ reg = <0x0 0x2330000 0x0 0x10000>;
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+ interrupts = <0 37 4>;
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+ gpio-controller;
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+ little-endian;
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+ #gpio-cells = <2>;
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+ interrupt-controller;
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+ #interrupt-cells = <2>;
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+ };
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+
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watchdog@23a0000 {
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compatible = "arm,sbsa-gwdt";
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reg = <0x0 0x23a0000 0 0x1000>,
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@@ -297,7 +336,8 @@
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#size-cells = <2>;
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device_type = "pci";
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bus-range = <0x0 0xff>;
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- ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>;
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+ ranges = <0x81000000 0x0 0x00000000 0x80 0x00020000 0x0 0x00010000 /* downstream I/O */
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+ 0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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};
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pcie@3500000 {
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@@ -312,7 +352,8 @@
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device_type = "pci";
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num-lanes = <2>;
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bus-range = <0x0 0xff>;
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- ranges = <0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>;
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+ ranges = <0x81000000 0x0 0x00000000 0x88 0x00020000 0x0 0x00010000 /* downstream I/O */
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+ 0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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};
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pcie@3600000 {
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@@ -326,7 +367,8 @@
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#size-cells = <2>;
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device_type = "pci";
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bus-range = <0x0 0xff>;
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- ranges = <0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>;
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+ ranges = <0x81000000 0x0 0x00000000 0x90 0x00020000 0x0 0x00010000 /* downstream I/O */
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+ 0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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};
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pcie@3700000 {
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@@ -340,7 +382,8 @@
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#size-cells = <2>;
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device_type = "pci";
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bus-range = <0x0 0xff>;
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- ranges = <0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>;
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+ ranges = <0x81000000 0x0 0x00000000 0x98 0x00020000 0x0 0x00010000 /* downstream I/O */
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+ 0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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};
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pcie@3800000 {
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@@ -354,7 +397,8 @@
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#size-cells = <2>;
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device_type = "pci";
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bus-range = <0x0 0xff>;
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- ranges = <0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>;
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+ ranges = <0x81000000 0x0 0x00000000 0xa0 0x00020000 0x0 0x00010000 /* downstream I/O */
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+ 0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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};
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pcie@3900000 {
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@@ -368,7 +412,8 @@
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#size-cells = <2>;
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device_type = "pci";
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bus-range = <0x0 0xff>;
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- ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>;
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+ ranges = <0x81000000 0x0 0x00000000 0xa8 0x00020000 0x0 0x00010000 /* downstream I/O */
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+ 0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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};
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fsl_mc: fsl-mc@80c000000 {
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