Browse Source

Merge GPL update into starfive

yiming.li 3 years ago
parent
commit
cfa2230f83
50 changed files with 922 additions and 523 deletions
  1. 1 1
      boot/bootmain.c
  2. 20 1
      boot/start.S
  3. 20 0
      boot/trap.c
  4. 19 5
      common/clkgen_ctrl_macro.h
  5. 19 0
      common/comdef.h
  6. 1 1
      common/ctype.c
  7. 1 1
      common/ctype.h
  8. 20 2
      common/ddr_define.h
  9. 20 1
      common/encoding.h
  10. 20 0
      common/errno.h
  11. 20 5
      common/ezGPIO_fullMux_ctrl_macro.h
  12. 19 0
      common/platform.h
  13. 19 5
      common/rstgen_ctrl_macro.h
  14. 19 0
      common/sys.h
  15. 20 5
      common/syscon_iopad_ctrl_macro.h
  16. 19 5
      common/syscon_sysmain_ctrl_macro.h
  17. 20 0
      common/util.c
  18. 20 22
      common/util.h
  19. 20 0
      common/vic_module_reset_clkgen.h
  20. 20 5
      ddrc_cfg/lpddr4_1066_cl20_bl16/orbit_boot_1066.c
  21. 19 0
      ddrc_cfg/lpddr4_1333_cl24_bl16/orbit_boot_1333.c
  22. 19 0
      ddrc_cfg/lpddr4_1600_cl28_bl16/orbit_boot_1600.c
  23. 20 5
      ddrc_cfg/lpddr4_1600_cl28_bl16/orbit_boot_training.c
  24. 20 0
      ddrc_cfg/lpddr4_800_cl14_bl16/orbit_boot_800.c
  25. 20 0
      ddrphy_cfg/lpddr4_1600_cl28_bl16/regconfig_pi_start.c
  26. 20 0
      ddrphy_cfg/lpddr4_1600_cl28_bl16/regconfig_pi_start_2800.c
  27. 20 0
      ddrphy_cfg/lpddr4_1600_cl28_bl16/regconfig_pi_start_3200.c
  28. 19 50
      ddrphy_cfg/memory/jedec_lpddr4_16gb_3200/regconfig_sim_1066_cl20_bl16/regconfig.h.sim_PHY.h
  29. 19 50
      ddrphy_cfg/memory/jedec_lpddr4_16gb_3200/regconfig_sim_1066_cl20_bl16/regconfig.h.sim_PI.h
  30. 19 50
      ddrphy_cfg/memory/jedec_lpddr4_16gb_3200/regconfig_sim_1333_cl24_bl16/regconfig.h.sim_PHY.h
  31. 19 51
      ddrphy_cfg/memory/jedec_lpddr4_16gb_3200/regconfig_sim_1333_cl24_bl16/regconfig.h.sim_PI.h
  32. 19 50
      ddrphy_cfg/memory/jedec_lpddr4_16gb_3200/regconfig_sim_1600_cl28_bl16/regconfig.h.sim_PHY.h
  33. 19 50
      ddrphy_cfg/memory/jedec_lpddr4_16gb_3200/regconfig_sim_1600_cl28_bl16/regconfig.h.sim_PI.h
  34. 19 50
      ddrphy_cfg/memory/jedec_lpddr4_16gb_3200/regconfig_sim_800_cl14_bl16/regconfig.h.sim_PHY.h
  35. 19 51
      ddrphy_cfg/memory/jedec_lpddr4_16gb_3200/regconfig_sim_800_cl14_bl16/regconfig.h.sim_PI.h
  36. 19 0
      ddrphy_cfg/regconfig.h.sim_PHY.c
  37. 20 0
      ddrphy_cfg/regconfig.h.sim_PI.c
  38. 20 12
      gpio/gpio.c
  39. 19 12
      gpio/gpio.h
  40. 20 0
      sdio/sdio.c
  41. 20 0
      spi/spi.c
  42. 19 0
      spi/spi_flash.c
  43. 19 0
      spi/spi_flash.h
  44. 19 0
      spi/spi_probe.c
  45. 20 8
      timer/timer.c
  46. 20 0
      timer/timer.h
  47. 20 8
      uart/cmd.c
  48. 20 10
      uart/cmd.h
  49. 20 0
      uart/uart.c
  50. 20 7
      uart/uart.h

+ 1 - 1
boot/bootmain.c

@@ -15,7 +15,7 @@
   * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
   *
-  * <h2><center>&copy; COPYRIGHT 20120 Shanghai StarFive Technology Co., Ltd. </center></h2>
+  *  COPYRIGHT 20120 Shanghai StarFive Technology Co., Ltd.
   */
 
 #include "sys.h"

+ 20 - 1
boot/start.S

@@ -1,4 +1,23 @@
-// See LICENSE for license details.
+/**
+  ******************************************************************************
+  * @file  start.S
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/29/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  * COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
+
 #include "encoding.h"
 #include "platform.h"
 #include "sys.h"

+ 20 - 0
boot/trap.c

@@ -1,3 +1,23 @@
+/**
+  ******************************************************************************
+  * @file  trap.c
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/23/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
+
 #include "encoding.h"
 #include "uart.h"
 #include "comdef.h"

+ 19 - 5
common/clkgen_ctrl_macro.h

@@ -1,8 +1,22 @@
-/******************************************************************
-*
-* clkgen controller C MACRO generated by ezchip
-*
-******************************************************************/
+/**
+  ******************************************************************************
+  * @file  clkgen_ctrl_macro.h
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/20/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
 
 #ifndef _CLKGEN_MACRO_H_
 #define _CLKGEN_MACRO_H_

+ 19 - 0
common/comdef.h

@@ -1,4 +1,23 @@
 
+/**
+  ******************************************************************************
+  * @file  comdef.h
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/20/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
 
 
 #ifndef _COMDEF_H_

+ 1 - 1
common/ctype.c

@@ -15,7 +15,7 @@
   * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
   *
-  * <h2><center>&copy; COPYRIGHT 20120 Shanghai StarFive Technology Co., Ltd. </center></h2>
+  * COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
   */
 
 

+ 1 - 1
common/ctype.h

@@ -15,7 +15,7 @@
   * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
   *
-  * <h2><center>&copy; COPYRIGHT 20120 Shanghai StarFive Technology Co., Ltd. </center></h2>
+  * COPYRIGHT 20120 Shanghai StarFive Technology Co., Ltd.
   */
 
 #ifndef _CTYPE_H

+ 20 - 2
common/ddr_define.h

@@ -1,5 +1,23 @@
-//macro definition in this file is used for choose various ddr simulation
-//this file(used for c language) originate from .../SFC_VIC/sim_model/analog/ddrphy/ddr_define.f(used for verilog)
+/**
+  ******************************************************************************
+  * @file  ddr_define.h
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/20/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
+
 #define G_DRAM_LPDDR4   1
 #define G_SPEED_2133    1
 

+ 20 - 1
common/encoding.h

@@ -1,4 +1,23 @@
-// See LICENSE for license details.
+/**
+  ******************************************************************************
+  * @file  encoding.h
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/20/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
+
 
 #ifndef RISCV_CSR_ENCODING_H
 #define RISCV_CSR_ENCODING_H

+ 20 - 0
common/errno.h

@@ -1,3 +1,23 @@
+/**
+  ******************************************************************************
+  * @file  errno.h
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/20/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
+
 #ifndef _LINUX_ERRNO_H
 #define _LINUX_ERRNO_H
 

+ 20 - 5
common/ezGPIO_fullMux_ctrl_macro.h

@@ -1,8 +1,23 @@
-/******************************************************************
-*
-* ezGPIO_fullMux controller C MACRO generated by ezchip
-*
-******************************************************************/
+/**
+  ******************************************************************************
+  * @file  ezGPIO_fullMux_ctrl_macro.h
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/22/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
+
 
 #ifndef _EZGPIO_FULLMUX_MACRO_H_
 #define _EZGPIO_FULLMUX_MACRO_H_

+ 19 - 0
common/platform.h

@@ -1,3 +1,22 @@
+/**
+  ******************************************************************************
+  * @file  platform.h
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/20/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
 
 #ifndef PLATFORM_H_
 #define PLATFORM_H_

+ 19 - 5
common/rstgen_ctrl_macro.h

@@ -1,8 +1,22 @@
-/******************************************************************
-*
-* rstgen controller C MACRO generated by ezchip
-*
-******************************************************************/
+/**
+  ******************************************************************************
+  * @file  rstgen_ctrl_macro.h
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/20/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
 
 #ifndef _RSTGEN_MACRO_H_
 #define _RSTGEN_MACRO_H_

+ 19 - 0
common/sys.h

@@ -1,3 +1,22 @@
+/**
+  ******************************************************************************
+  * @file  sys.h
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/22/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
 
 #ifndef SYS_H_
 #define SYS_H_

+ 20 - 5
common/syscon_iopad_ctrl_macro.h

@@ -1,8 +1,23 @@
-/******************************************************************
-*
-* syscon_iopad_ctrl_top C MACRO generated by ezchip
-*
-******************************************************************/
+/**
+  ******************************************************************************
+  * @file  syscon_iopad_ctrl_macro.h
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/24/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
+
 
 #ifndef _SYSCON_IOPAD_CTRL_MACRO_H_
 #define _SYSCON_IOPAD_CTRL_MACRO_H_

+ 19 - 5
common/syscon_sysmain_ctrl_macro.h

@@ -1,8 +1,22 @@
-/******************************************************************
-*
-* syscon_sysmain_ctrl_top C MACRO generated by ezchip
-*
-******************************************************************/
+/**
+  ******************************************************************************
+  * @file  syscon_sysmain_ctrl_macro.h
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/24/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
 
 #ifndef _SYSCON_SYSMAIN_CTRL_MACRO_H_
 #define _SYSCON_SYSMAIN_CTRL_MACRO_H_

+ 20 - 0
common/util.c

@@ -1,3 +1,23 @@
+/**
+  ******************************************************************************
+  * @file  util.c
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/24/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
+
 #include "ctype.h"
 #include "util.h"
 #include "comdef.h"

+ 20 - 22
common/util.h

@@ -1,25 +1,23 @@
-/*====*====*====*====*====*====*====*====*====*====*====*====*====*====*====**
-*		Copyright (c) 2009 by UVCHIP Inc. All rights reserved.
-*	This source code contains confidential, trade secret material of
-*	UVCHIP Inc. Any attempt or participation in deciphering, decoding,
-*	reverse engineering or in any way altering the source code is strictly
-*	prohibited.
-*
-*	Branch/Tag Name:	$Name$
-*	FileName: 		$RCSfile$
-*	Description:  
-*			
-*		This file is used to build test drive firmware for fpga drive ip modele
-*
-*	$Author$ 
-*	$Date$
-*	$Revision$
-*   
-**====*====*====*====*====*====*====*====*====*====*====*====*====*====*====**
-* Revisions History
-*
-*	$Log$
-**====*====*====*====*====*====*====*====*====*====*====*====*====*====*====*/
+/**
+  ******************************************************************************
+  * @file  util.h
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/24/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
+
 
 #ifndef UTIL_H_
 #define UTIL_H_

+ 20 - 0
common/vic_module_reset_clkgen.h

@@ -1,3 +1,23 @@
+/**
+  ******************************************************************************
+  * @file  vic_module_reset_clkgen.h
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/24/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
+
 #ifndef _SFC_VIC_MODULE_RESET_CLKGEN_H
 #define _SFC_VIC_MODULE_RESET_CLKGEN_H
 

+ 20 - 5
ddrc_cfg/lpddr4_1066_cl20_bl16/orbit_boot_1066.c

@@ -1,8 +1,23 @@
-// void inline orbit_writel(volatile void __iomem *addr, uint32_t data);
-// void inline orbit_readl_poll(volatile void __iomem *addr, uint32_t expected, uint32_t strobe);
-// void orbit_nsleep(int ns); // Sleep ns nano-seconds
-// void udelay(int us); // Sleep us micro-seconds
-//cdns_phy_initialize(1);
+/**
+  ******************************************************************************
+  * @file  orbit_boot_1066.c
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/20/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
+
 #include <regconfig.h.sim_PI.h>
 #include <regconfig.h.sim_PHY.h>
 #include <sys.h>

+ 19 - 0
ddrc_cfg/lpddr4_1333_cl24_bl16/orbit_boot_1333.c

@@ -1,3 +1,22 @@
+/**
+  ******************************************************************************
+  * @file  orbit_boot_1333.c
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/20/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
 
 #include <regconfig.h.sim_PI.h>
 #include <regconfig.h.sim_PHY.h>

+ 19 - 0
ddrc_cfg/lpddr4_1600_cl28_bl16/orbit_boot_1600.c

@@ -1,3 +1,22 @@
+/**
+  ******************************************************************************
+  * @file  orbit_boot_1600.c
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/20/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
 
 #include <regconfig.h.sim_PI.h>
 #include <regconfig.h.sim_PHY.h>

+ 20 - 5
ddrc_cfg/lpddr4_1600_cl28_bl16/orbit_boot_training.c

@@ -1,8 +1,23 @@
-// void inline orbit_writel(volatile void __iomem *addr, uint32_t data);
-// void inline orbit_readl_poll(volatile void __iomem *addr, uint32_t expected, uint32_t strobe);
-// void orbit_nsleep(int ns); // Sleep ns nano-seconds
-// void udelay(int us); // Sleep us micro-seconds
-//cdns_phy_initialize(1);
+/**
+  ******************************************************************************
+  * @file  orbit_boot_training.c
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/20/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
+
 #include <regconfig.h.sim_PI.h>
 #include <regconfig.h.sim_PHY.h>
 #include <sys.h>

+ 20 - 0
ddrc_cfg/lpddr4_800_cl14_bl16/orbit_boot_800.c

@@ -1,3 +1,23 @@
+/**
+  ******************************************************************************
+  * @file  orbit_boot_800.c
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/20/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
+
 #include <regconfig.h.sim_PI.h>
 #include <regconfig.h.sim_PHY.h>
 #include <sys.h>

+ 20 - 0
ddrphy_cfg/lpddr4_1600_cl28_bl16/regconfig_pi_start.c

@@ -1,3 +1,23 @@
+/**
+  ******************************************************************************
+  * @file  regconfig_pi_start.c
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/20/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
+
 #include <regconfig.h.sim_PI.h>
 #include <regconfig.h.sim_PHY.h>
 #include <sys.h>

+ 20 - 0
ddrphy_cfg/lpddr4_1600_cl28_bl16/regconfig_pi_start_2800.c

@@ -1,3 +1,23 @@
+/**
+  ******************************************************************************
+  * @file  regconfig_pi_start_2800.c
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/20/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
+
 #include <regconfig.h.sim_PI.h>
 #include <regconfig.h.sim_PHY.h>
 #include <sys.h>

+ 20 - 0
ddrphy_cfg/lpddr4_1600_cl28_bl16/regconfig_pi_start_3200.c

@@ -1,3 +1,23 @@
+/**
+  ******************************************************************************
+  * @file  regconfig_pi_start_3200.c
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/20/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
+
 #include <regconfig.h.sim_PI.h>
 #include <regconfig.h.sim_PHY.h>
 #include <sys.h>

+ 19 - 50
ddrphy_cfg/memory/jedec_lpddr4_16gb_3200/regconfig_sim_1066_cl20_bl16/regconfig.h.sim_PHY.h

@@ -1,54 +1,23 @@
 
-/* ****************************************************************
- *        CADENCE                    Copyright (c) 2001-2018      *
- *                                   Cadence Design Systems, Inc. *
- *                                   All rights reserved.         *
- ******************************************************************
- *  The values calculated from this script are meant to be        *
- *  representative programmings.   The values may not reflect the *
- *  actual required programming for production use.   Please      *
- *  closely review all programmed values for technical accuracy   *
- *  before use in production parts.                               *
- ******************************************************************
- *                                                                 
- *   Module:         regconfig.h
- *   Documentation:  Register programming header file
- *
- ******************************************************************
- ******************************************************************
- * WARNING:  This file was automatically generated.  Manual
- * editing may result in undetermined behavior.
- ******************************************************************
- ******************************************************************/
-// REL: sifive.shanghai.n1-VIC_DDR__20180206
-
-
-//`timescale 10ps/10ps
-
-// ********************************************************************
-// Option: IP    : IP Mode                       = PHY
-// Option: BL    : Burst Length                  = 16
-// Option: CL    : CAS Latency                   = 20
-// Option: MHZ   : Simulation MHz                = 1066
-// Option: AP    : Auto Precharge Mode     (0/1) = 0
-// Option: DLLBP : DLL Bypass Mode         (0/1) = 0
-// Option: HALF  : Half-Memory Support     (0/1) = 0
-// Option: RDIMM : Registered Dimm Support (0/1) = 0
-// Option: AL    : Additive Latency              = 0
-// Option: PREAM : Preamble Support    (0/1/2/3) = 0
-// Option: BOF   : Burst On the Fly        (0/1) = 0
-// Option: WLS   : Write Latency Set       (0/1) = 0
-// Option: TCK   : Simulation period in ns       = 
-// Option: WRDBIEN : Write DBI Enable       (0/1) = 0
-// Option: RDDBIEN : Read DBI Enable       (0/1) = 0
-// Option: RDPSTMBLE : RD Postamble En      (0/1) = 0
-// Option: WRPSTMBLE : WR Postamble En      (0/1) = 0
-// Option: CRC : CRC En      (0/1) = 0
-// Option: SOMA  : Memory-SOMA file(s)           = /proj/iprel/sifive.shanghai.n1-VIC_DDR/sifive.shanghai.n1-VIC_DDR__20180201/mcip/mem/sifive.shanghai.n1-VIC_DDR/memory/jedec_lpddr4_16gb_3200/memory.xml.sim
-// Option: PL    : CA Parity Latency              = -1
-// ********************************************************************
-// Memory: jedec_lpddr4_16gb_3200
-// ********************************************************************
+/**
+  ******************************************************************************
+  * @file  regconfig.h.sim_PHY.h
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/20/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
 
 
 #define               DENALI_PHY_0_DATA 0b00000000000000000000010011110000 // PHY_IO_PAD_DELAY_TIMING_BYPASS_0:RW:16:4:=0x00 PHY_CLK_WR_BYPASS_SLAVE_DELAY_0:RW:0:11:=0x04f0

+ 19 - 50
ddrphy_cfg/memory/jedec_lpddr4_16gb_3200/regconfig_sim_1066_cl20_bl16/regconfig.h.sim_PI.h

@@ -1,54 +1,23 @@
 
-/* ****************************************************************
- *        CADENCE                    Copyright (c) 2001-2018      *
- *                                   Cadence Design Systems, Inc. *
- *                                   All rights reserved.         *
- ******************************************************************
- *  The values calculated from this script are meant to be        *
- *  representative programmings.   The values may not reflect the *
- *  actual required programming for production use.   Please      *
- *  closely review all programmed values for technical accuracy   *
- *  before use in production parts.                               *
- ******************************************************************
- *                                                                 
- *   Module:         regconfig.h
- *   Documentation:  Register programming header file
- *
- ******************************************************************
- ******************************************************************
- * WARNING:  This file was automatically generated.  Manual
- * editing may result in undetermined behavior.
- ******************************************************************
- ******************************************************************/
-// REL: sifive.shanghai.n1-VIC_DDR__20180206
-
-
-//`timescale 10ps/10ps
-
-// ********************************************************************
-// Option: IP    : IP Mode                       = PI
-// Option: BL    : Burst Length                  = 16
-// Option: CL    : CAS Latency                   = 20
-// Option: MHZ   : Simulation MHz                = 1066
-// Option: AP    : Auto Precharge Mode     (0/1) = 0
-// Option: DLLBP : DLL Bypass Mode         (0/1) = 0
-// Option: HALF  : Half-Memory Support     (0/1) = 0
-// Option: RDIMM : Registered Dimm Support (0/1) = 0
-// Option: AL    : Additive Latency              = 0
-// Option: PREAM : Preamble Support    (0/1/2/3) = 0
-// Option: BOF   : Burst On the Fly        (0/1) = 0
-// Option: WLS   : Write Latency Set       (0/1) = 0
-// Option: TCK   : Simulation period in ns       = 
-// Option: WRDBIEN : Write DBI Enable       (0/1) = 0
-// Option: RDDBIEN : Read DBI Enable       (0/1) = 0
-// Option: RDPSTMBLE : RD Postamble En      (0/1) = 0
-// Option: WRPSTMBLE : WR Postamble En      (0/1) = 0
-// Option: CRC : CRC En      (0/1) = 0
-// Option: SOMA  : Memory-SOMA file(s)           = /proj/iprel/sifive.shanghai.n1-VIC_DDR/sifive.shanghai.n1-VIC_DDR__20180201/mcip/mem/sifive.shanghai.n1-VIC_DDR/memory/jedec_lpddr4_16gb_3200/memory.xml.sim
-// Option: PL    : CA Parity Latency              = -1
-// ********************************************************************
-// Memory: jedec_lpddr4_16gb_3200
-// ********************************************************************
+/**
+  ******************************************************************************
+  * @file  regconfig.h.sim_PI.h
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/20/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
 
 
 #define                DENALI_PI_00_DATA 0b00000000000000000000101100000000 // PI_VERSION:RD:16:16:=0x0000 PI_DRAM_CLASS:RW:8:4:=0x0b PI_START:RW:0:1:=0x00

+ 19 - 50
ddrphy_cfg/memory/jedec_lpddr4_16gb_3200/regconfig_sim_1333_cl24_bl16/regconfig.h.sim_PHY.h

@@ -1,54 +1,23 @@
 
-/* ****************************************************************
- *        CADENCE                    Copyright (c) 2001-2018      *
- *                                   Cadence Design Systems, Inc. *
- *                                   All rights reserved.         *
- ******************************************************************
- *  The values calculated from this script are meant to be        *
- *  representative programmings.   The values may not reflect the *
- *  actual required programming for production use.   Please      *
- *  closely review all programmed values for technical accuracy   *
- *  before use in production parts.                               *
- ******************************************************************
- *                                                                 
- *   Module:         regconfig.h
- *   Documentation:  Register programming header file
- *
- ******************************************************************
- ******************************************************************
- * WARNING:  This file was automatically generated.  Manual
- * editing may result in undetermined behavior.
- ******************************************************************
- ******************************************************************/
-// REL: sifive.shanghai.n1-VIC_DDR__20180206
-
-
-//`timescale 10ps/10ps
-
-// ********************************************************************
-// Option: IP    : IP Mode                       = PHY
-// Option: BL    : Burst Length                  = 16
-// Option: CL    : CAS Latency                   = 24
-// Option: MHZ   : Simulation MHz                = 1333
-// Option: AP    : Auto Precharge Mode     (0/1) = 0
-// Option: DLLBP : DLL Bypass Mode         (0/1) = 0
-// Option: HALF  : Half-Memory Support     (0/1) = 0
-// Option: RDIMM : Registered Dimm Support (0/1) = 0
-// Option: AL    : Additive Latency              = 0
-// Option: PREAM : Preamble Support    (0/1/2/3) = 0
-// Option: BOF   : Burst On the Fly        (0/1) = 0
-// Option: WLS   : Write Latency Set       (0/1) = 0
-// Option: TCK   : Simulation period in ns       = 
-// Option: WRDBIEN : Write DBI Enable       (0/1) = 0
-// Option: RDDBIEN : Read DBI Enable       (0/1) = 0
-// Option: RDPSTMBLE : RD Postamble En      (0/1) = 0
-// Option: WRPSTMBLE : WR Postamble En      (0/1) = 0
-// Option: CRC : CRC En      (0/1) = 0
-// Option: SOMA  : Memory-SOMA file(s)           = /proj/iprel/sifive.shanghai.n1-VIC_DDR/sifive.shanghai.n1-VIC_DDR__20180201/mcip/mem/sifive.shanghai.n1-VIC_DDR/memory/jedec_lpddr4_16gb_3200/memory.xml.sim
-// Option: PL    : CA Parity Latency              = -1
-// ********************************************************************
-// Memory: jedec_lpddr4_16gb_3200
-// ********************************************************************
+/**
+  ******************************************************************************
+  * @file  regconfig.h.sim_PHY.h
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/20/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
 
 
 #define               DENALI_PHY_00_DATA 0b00000000000000000000010011110000 // PHY_IO_PAD_DELAY_TIMING_BYPASS_0:RW:16:4:=0x00 PHY_CLK_WR_BYPASS_SLAVE_DELAY_0:RW:0:11:=0x04f0

+ 19 - 51
ddrphy_cfg/memory/jedec_lpddr4_16gb_3200/regconfig_sim_1333_cl24_bl16/regconfig.h.sim_PI.h

@@ -1,54 +1,22 @@
-
-/* ****************************************************************
- *        CADENCE                    Copyright (c) 2001-2018      *
- *                                   Cadence Design Systems, Inc. *
- *                                   All rights reserved.         *
- ******************************************************************
- *  The values calculated from this script are meant to be        *
- *  representative programmings.   The values may not reflect the *
- *  actual required programming for production use.   Please      *
- *  closely review all programmed values for technical accuracy   *
- *  before use in production parts.                               *
- ******************************************************************
- *                                                                 
- *   Module:         regconfig.h
- *   Documentation:  Register programming header file
- *
- ******************************************************************
- ******************************************************************
- * WARNING:  This file was automatically generated.  Manual
- * editing may result in undetermined behavior.
- ******************************************************************
- ******************************************************************/
-// REL: sifive.shanghai.n1-VIC_DDR__20180206
-
-
-//`timescale 10ps/10ps
-
-// ********************************************************************
-// Option: IP    : IP Mode                       = PI
-// Option: BL    : Burst Length                  = 16
-// Option: CL    : CAS Latency                   = 24
-// Option: MHZ   : Simulation MHz                = 1333
-// Option: AP    : Auto Precharge Mode     (0/1) = 0
-// Option: DLLBP : DLL Bypass Mode         (0/1) = 0
-// Option: HALF  : Half-Memory Support     (0/1) = 0
-// Option: RDIMM : Registered Dimm Support (0/1) = 0
-// Option: AL    : Additive Latency              = 0
-// Option: PREAM : Preamble Support    (0/1/2/3) = 0
-// Option: BOF   : Burst On the Fly        (0/1) = 0
-// Option: WLS   : Write Latency Set       (0/1) = 0
-// Option: TCK   : Simulation period in ns       = 
-// Option: WRDBIEN : Write DBI Enable       (0/1) = 0
-// Option: RDDBIEN : Read DBI Enable       (0/1) = 0
-// Option: RDPSTMBLE : RD Postamble En      (0/1) = 0
-// Option: WRPSTMBLE : WR Postamble En      (0/1) = 0
-// Option: CRC : CRC En      (0/1) = 0
-// Option: SOMA  : Memory-SOMA file(s)           = /proj/iprel/sifive.shanghai.n1-VIC_DDR/sifive.shanghai.n1-VIC_DDR__20180201/mcip/mem/sifive.shanghai.n1-VIC_DDR/memory/jedec_lpddr4_16gb_3200/memory.xml.sim
-// Option: PL    : CA Parity Latency              = -1
-// ********************************************************************
-// Memory: jedec_lpddr4_16gb_3200
-// ********************************************************************
+/**
+  ******************************************************************************
+  * @file  regconfig.h.sim_PI.h
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/20/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
 
 
 #define                DENALI_PI_00_DATA 0b00000000000000000000101100000000 // PI_VERSION:RD:16:16:=0x0000 PI_DRAM_CLASS:RW:8:4:=0x0b PI_START:RW:0:1:=0x00

+ 19 - 50
ddrphy_cfg/memory/jedec_lpddr4_16gb_3200/regconfig_sim_1600_cl28_bl16/regconfig.h.sim_PHY.h

@@ -1,54 +1,23 @@
 
-/* ****************************************************************
- *        CADENCE                    Copyright (c) 2001-2018      *
- *                                   Cadence Design Systems, Inc. *
- *                                   All rights reserved.         *
- ******************************************************************
- *  The values calculated from this script are meant to be        *
- *  representative programmings.   The values may not reflect the *
- *  actual required programming for production use.   Please      *
- *  closely review all programmed values for technical accuracy   *
- *  before use in production parts.                               *
- ******************************************************************
- *                                                                 
- *   Module:         regconfig.h
- *   Documentation:  Register programming header file
- *
- ******************************************************************
- ******************************************************************
- * WARNING:  This file was automatically generated.  Manual
- * editing may result in undetermined behavior.
- ******************************************************************
- ******************************************************************/
-// REL: sifive.shanghai.n1-VIC_DDR__20180206
-
-
-//#timescale 10ps/10ps
-
-// ********************************************************************
-// Option: IP    : IP Mode                       = PHY
-// Option: BL    : Burst Length                  = 16
-// Option: CL    : CAS Latency                   = 28
-// Option: MHZ   : Simulation MHz                = 1600
-// Option: AP    : Auto Precharge Mode     (0/1) = 0
-// Option: DLLBP : DLL Bypass Mode         (0/1) = 0
-// Option: HALF  : Half-Memory Support     (0/1) = 0
-// Option: RDIMM : Registered Dimm Support (0/1) = 0
-// Option: AL    : Additive Latency              = 0
-// Option: PREAM : Preamble Support    (0/1/2/3) = 0
-// Option: BOF   : Burst On the Fly        (0/1) = 0
-// Option: WLS   : Write Latency Set       (0/1) = 0
-// Option: TCK   : Simulation period in ns       = 
-// Option: WRDBIEN : Write DBI Enable       (0/1) = 0
-// Option: RDDBIEN : Read DBI Enable       (0/1) = 0
-// Option: RDPSTMBLE : RD Postamble En      (0/1) = 0
-// Option: WRPSTMBLE : WR Postamble En      (0/1) = 0
-// Option: CRC : CRC En      (0/1) = 0
-// Option: SOMA  : Memory-SOMA file(s)           = /proj/iprel/sifive.shanghai.n1-VIC_DDR/sifive.shanghai.n1-VIC_DDR__20180201/mcip/mem/sifive.shanghai.n1-VIC_DDR/memory/jedec_lpddr4_16gb_3200/memory.xml.sim
-// Option: PL    : CA Parity Latency              = -1
-// ********************************************************************
-// Memory: jedec_lpddr4_16gb_3200
-// ********************************************************************
+/**
+  ******************************************************************************
+  * @file  regconfig.h.sim_PHY.h
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/20/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
 
 
 #define               DENALI_PHY_0_DATA 0b00000000000000000000010011110000 // PHY_IO_PAD_DELAY_TIMING_BYPASS_0:RW:16:4:=0x00 PHY_CLK_WR_BYPASS_SLAVE_DELAY_0:RW:0:11:=0x04f0

+ 19 - 50
ddrphy_cfg/memory/jedec_lpddr4_16gb_3200/regconfig_sim_1600_cl28_bl16/regconfig.h.sim_PI.h

@@ -1,54 +1,23 @@
 
-/* ****************************************************************
- *        CADENCE                    Copyright (c) 2001-2018      *
- *                                   Cadence Design Systems, Inc. *
- *                                   All rights reserved.         *
- ******************************************************************
- *  The values calculated from this script are meant to be        *
- *  representative programmings.   The values may not reflect the *
- *  actual required programming for production use.   Please      *
- *  closely review all programmed values for technical accuracy   *
- *  before use in production parts.                               *
- ******************************************************************
- *                                                                 
- *   Module:         regconfig.h
- *   Documentation:  Register programming header file
- *
- ******************************************************************
- ******************************************************************
- * WARNING:  This file was automatically generated.  Manual
- * editing may result in undetermined behavior.
- ******************************************************************
- ******************************************************************/
-// REL: sifive.shanghai.n1-VIC_DDR__20180206
-
-
-//#timescale 10ps/10ps
-
-// ********************************************************************
-// Option: IP    : IP Mode                       = PI
-// Option: BL    : Burst Length                  = 16
-// Option: CL    : CAS Latency                   = 28
-// Option: MHZ   : Simulation MHz                = 1600
-// Option: AP    : Auto Precharge Mode     (0/1) = 0
-// Option: DLLBP : DLL Bypass Mode         (0/1) = 0
-// Option: HALF  : Half-Memory Support     (0/1) = 0
-// Option: RDIMM : Registered Dimm Support (0/1) = 0
-// Option: AL    : Additive Latency              = 0
-// Option: PREAM : Preamble Support    (0/1/2/3) = 0
-// Option: BOF   : Burst On the Fly        (0/1) = 0
-// Option: WLS   : Write Latency Set       (0/1) = 0
-// Option: TCK   : Simulation period in ns       = 
-// Option: WRDBIEN : Write DBI Enable       (0/1) = 0
-// Option: RDDBIEN : Read DBI Enable       (0/1) = 0
-// Option: RDPSTMBLE : RD Postamble En      (0/1) = 0
-// Option: WRPSTMBLE : WR Postamble En      (0/1) = 0
-// Option: CRC : CRC En      (0/1) = 0
-// Option: SOMA  : Memory-SOMA file(s)           = /proj/iprel/sifive.shanghai.n1-VIC_DDR/sifive.shanghai.n1-VIC_DDR__20180201/mcip/mem/sifive.shanghai.n1-VIC_DDR/memory/jedec_lpddr4_16gb_3200/memory.xml.sim
-// Option: PL    : CA Parity Latency              = -1
-// ********************************************************************
-// Memory: jedec_lpddr4_16gb_3200
-// ********************************************************************
+/**
+  ******************************************************************************
+  * @file  regconfig.h.sim_PI.h
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/20/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
 
 
 #define                DENALI_PI_00_DATA 0b00000000000000000000101100000000 // PI_VERSION:RD:16:16:=0x0000 PI_DRAM_CLASS:RW:8:4:=0x0b PI_START:RW:0:1:=0x00

+ 19 - 50
ddrphy_cfg/memory/jedec_lpddr4_16gb_3200/regconfig_sim_800_cl14_bl16/regconfig.h.sim_PHY.h

@@ -1,54 +1,23 @@
 
-/* ****************************************************************
- *        CADENCE                    Copyright (c) 2001-2018      *
- *                                   Cadence Design Systems, Inc. *
- *                                   All rights reserved.         *
- ******************************************************************
- *  The values calculated from this script are meant to be        *
- *  representative programmings.   The values may not reflect the *
- *  actual required programming for production use.   Please      *
- *  closely review all programmed values for technical accuracy   *
- *  before use in production parts.                               *
- ******************************************************************
- *                                                                 
- *   Module:         regconfig.h
- *   Documentation:  Register programming header file
- *
- ******************************************************************
- ******************************************************************
- * WARNING:  This file was automatically generated.  Manual
- * editing may result in undetermined behavior.
- ******************************************************************
- ******************************************************************/
-// REL: sifive.shanghai.n1-VIC_DDR__20180206
-
-
-//`timescale 10ps/10ps
-
-// ********************************************************************
-// Option: IP    : IP Mode                       = PHY
-// Option: BL    : Burst Length                  = 16
-// Option: CL    : CAS Latency                   = 14
-// Option: MHZ   : Simulation MHz                = 800
-// Option: AP    : Auto Precharge Mode     (0/1) = 0
-// Option: DLLBP : DLL Bypass Mode         (0/1) = 0
-// Option: HALF  : Half-Memory Support     (0/1) = 0
-// Option: RDIMM : Registered Dimm Support (0/1) = 0
-// Option: AL    : Additive Latency              = 0
-// Option: PREAM : Preamble Support    (0/1/2/3) = 0
-// Option: BOF   : Burst On the Fly        (0/1) = 0
-// Option: WLS   : Write Latency Set       (0/1) = 0
-// Option: TCK   : Simulation period in ns       = 
-// Option: WRDBIEN : Write DBI Enable       (0/1) = 0
-// Option: RDDBIEN : Read DBI Enable       (0/1) = 0
-// Option: RDPSTMBLE : RD Postamble En      (0/1) = 0
-// Option: WRPSTMBLE : WR Postamble En      (0/1) = 0
-// Option: CRC : CRC En      (0/1) = 0
-// Option: SOMA  : Memory-SOMA file(s)           = /proj/iprel/sifive.shanghai.n1-VIC_DDR/sifive.shanghai.n1-VIC_DDR__20180201/mcip/mem/sifive.shanghai.n1-VIC_DDR/memory/jedec_lpddr4_16gb_3200/memory.xml.sim
-// Option: PL    : CA Parity Latency              = -1
-// ********************************************************************
-// Memory: jedec_lpddr4_16gb_3200
-// ********************************************************************
+/**
+  ******************************************************************************
+  * @file  regconfig.h.sim_PHY.h
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/20/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
 
 
 #define               DENALI_PHY_0_DATA 0b00000000000000000000010011110000 // PHY_IO_PAD_DELAY_TIMING_BYPASS_0:RW:16:4:=0x00 PHY_CLK_WR_BYPASS_SLAVE_DELAY_0:RW:0:11:=0x04f0

+ 19 - 51
ddrphy_cfg/memory/jedec_lpddr4_16gb_3200/regconfig_sim_800_cl14_bl16/regconfig.h.sim_PI.h

@@ -1,54 +1,22 @@
-
-/* ****************************************************************
- *        CADENCE                    Copyright (c) 2001-2018      *
- *                                   Cadence Design Systems, Inc. *
- *                                   All rights reserved.         *
- ******************************************************************
- *  The values calculated from this script are meant to be        *
- *  representative programmings.   The values may not reflect the *
- *  actual required programming for production use.   Please      *
- *  closely review all programmed values for technical accuracy   *
- *  before use in production parts.                               *
- ******************************************************************
- *                                                                 
- *   Module:         regconfig.h
- *   Documentation:  Register programming header file
- *
- ******************************************************************
- ******************************************************************
- * WARNING:  This file was automatically generated.  Manual
- * editing may result in undetermined behavior.
- ******************************************************************
- ******************************************************************/
-// REL: sifive.shanghai.n1-VIC_DDR__20180206
-
-
-//`timescale 10ps/10ps
-
-// ********************************************************************
-// Option: IP    : IP Mode                       = PI
-// Option: BL    : Burst Length                  = 16
-// Option: CL    : CAS Latency                   = 14
-// Option: MHZ   : Simulation MHz                = 800
-// Option: AP    : Auto Precharge Mode     (0/1) = 0
-// Option: DLLBP : DLL Bypass Mode         (0/1) = 0
-// Option: HALF  : Half-Memory Support     (0/1) = 0
-// Option: RDIMM : Registered Dimm Support (0/1) = 0
-// Option: AL    : Additive Latency              = 0
-// Option: PREAM : Preamble Support    (0/1/2/3) = 0
-// Option: BOF   : Burst On the Fly        (0/1) = 0
-// Option: WLS   : Write Latency Set       (0/1) = 0
-// Option: TCK   : Simulation period in ns       = 
-// Option: WRDBIEN : Write DBI Enable       (0/1) = 0
-// Option: RDDBIEN : Read DBI Enable       (0/1) = 0
-// Option: RDPSTMBLE : RD Postamble En      (0/1) = 0
-// Option: WRPSTMBLE : WR Postamble En      (0/1) = 0
-// Option: CRC : CRC En      (0/1) = 0
-// Option: SOMA  : Memory-SOMA file(s)           = /proj/iprel/sifive.shanghai.n1-VIC_DDR/sifive.shanghai.n1-VIC_DDR__20180201/mcip/mem/sifive.shanghai.n1-VIC_DDR/memory/jedec_lpddr4_16gb_3200/memory.xml.sim
-// Option: PL    : CA Parity Latency              = -1
-// ********************************************************************
-// Memory: jedec_lpddr4_16gb_3200
-// ********************************************************************
+/**
+  ******************************************************************************
+  * @file  regconfig.h.sim_PI.h
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/20/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
 
 
 #define                DENALI_PI_00_DATA 0b00000000000000000000101100000000 // PI_VERSION:RD:16:16:=0x0000 PI_DRAM_CLASS:RW:8:4:=0x0b PI_START:RW:0:1:=0x00

+ 19 - 0
ddrphy_cfg/regconfig.h.sim_PHY.c

@@ -1,3 +1,22 @@
+/**
+  ******************************************************************************
+  * @file  regconfig.h.sim_PHY.c
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/20/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
 
 #include <regconfig.h.sim_PI.h>
 #include <regconfig.h.sim_PHY.h>

+ 20 - 0
ddrphy_cfg/regconfig.h.sim_PI.c

@@ -1,3 +1,23 @@
+/**
+  ******************************************************************************
+  * @file  regconfig.h.sim_PI.c
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/20/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
+
 #include <regconfig.h.sim_PI.h>
 #include <regconfig.h.sim_PHY.h>
 #include <sys.h>

+ 20 - 12
gpio/gpio.c

@@ -1,15 +1,23 @@
-//
-// gpio.c
-//
-// GPIO
-//
-// Description:
-//
-// Revision History:
-//        DATE        VERSION  AUTHOR        NOTE
-//        ----------  -------  -----------   ------------------------------
-//        2019/12/27  0.1      Zavier           Initial
-//
+/**
+  ******************************************************************************
+  * @file  gpio.c
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  08/13/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
+
 
 #include "gpio.h"
 #include <sys.h>

+ 19 - 12
gpio/gpio.h

@@ -1,15 +1,22 @@
-//
-// gpio.h
-//
-// GPIO
-//
-// Description:
-//
-// Revision History:
-//        DATE        VERSION  AUTHOR        NOTE
-//        ----------  -------  -----------   ------------------------------
-//        2019/12/27  0.1      Zavier           Initial
-//
+/**
+  ******************************************************************************
+  * @file  gpio.h
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  08/13/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
 
 
 #ifndef _SFC_GPIO_H

+ 20 - 0
sdio/sdio.c

@@ -1,3 +1,23 @@
+/**
+  ******************************************************************************
+  * @file  sdio.c
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/24/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
+
 #include "comdef.h"
 #include "sys.h"
 #include "ezGPIO_fullMux_ctrl_macro.h"

+ 20 - 0
spi/spi.c

@@ -1,3 +1,23 @@
+/**
+  ******************************************************************************
+  * @file  spi.c
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/24/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
+
 #include <comdef.h>
 #include <spi.h>
 

+ 19 - 0
spi/spi_flash.c

@@ -1,3 +1,22 @@
+/**
+  ******************************************************************************
+  * @file  spi_flash.c
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/24/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
 
 
 #include <comdef.h>

+ 19 - 0
spi/spi_flash.h

@@ -1,3 +1,22 @@
+/**
+  ******************************************************************************
+  * @file  spi_flash.h
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/24/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
 
 #ifndef _SPI_FLASH_H_
 #define _SPI_FLASH_H_

+ 19 - 0
spi/spi_probe.c

@@ -1,3 +1,22 @@
+/**
+  ******************************************************************************
+  * @file  spi_probe.c
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/24/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
 
 #include <comdef.h>
 #include <spi_flash.h>

+ 20 - 8
timer/timer.c

@@ -1,11 +1,23 @@
-/*************************************************************************
-* All rights reserved.
-*
-* Filename     : timer.c
-* Version       : version 001
-* Author        : 
-* Created on  : 2018.07.14
-*************************************************************************/
+/**
+  ******************************************************************************
+  * @file  timer.c
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/24/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
+
 #include <comdef.h>
 #include <sys.h>
 #include <timer.h>

+ 20 - 0
timer/timer.h

@@ -1,3 +1,23 @@
+/**
+  ******************************************************************************
+  * @file  timer.h
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/24/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
+
 #ifndef __TIMER_H__
 #define __TIMER_H__
 

+ 20 - 8
uart/cmd.c

@@ -1,11 +1,23 @@
-/*=====================================================
-Copyright (c) 2003 by CHIPNUTS Incorporated. All Rights Reserved.
-FileName: cmd.c
-Author:              Date:
-Description:     
-Version:         
-History:          
-=====================================================*/
+/**
+  ******************************************************************************
+  * @file  cmd.c
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/20/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
+
 
 #include "cmd.h"
 #include "comdef.h"

+ 20 - 10
uart/cmd.h

@@ -1,13 +1,23 @@
-/*=====================================================
-Copyright (c) 2003 by CHIPNUTS Incorporated. All Rights Reserved.
-FileName: cmd.h
-Author:              Date:
-Description:     // 功能说明
-Version:         // 版本信息
-History:         // 历史修改记录
-<author>  <time>    <version>        <desc>
-      ABC     49/10/01     1.0        build this moudle  
-=====================================================*/
+/**
+  ******************************************************************************
+  * @file  cmd.h
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/20/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
+
 
 #ifndef		_MB_CMD_H_
 #define		_MB_CMD_H_

+ 20 - 0
uart/uart.c

@@ -1,3 +1,23 @@
+/**
+  ******************************************************************************
+  * @file  uart.c
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/24/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
+
 #include <stdarg.h>
 #include <comdef.h>
 #include <uart.h>

+ 20 - 7
uart/uart.h

@@ -1,10 +1,23 @@
-//
-// uart.h
-//
-// UART Defines
-//
-// Description:
-//
+/**
+  ******************************************************************************
+  * @file  uart.h
+  * @author  StarFive Technology
+  * @version  V1.0
+  * @date  07/24/2020
+  * @brief
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  *  COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd.
+  */
+
 
 #ifndef _UART_H
 #define _UART_H