Maximilian Rehkopf 9fbe61bad1 FPGA: Use internal clock instead of SNES master clock for $213F RMW timing 12 years ago
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ipcore_dir 8f1dd1c1e2 FPGA: update project files (ISE 13.2) 12 years ago
address.v e33b2b2bc7 FPGA: simple SNES address input filtering 12 years ago
bsx.v 684e2c3b81 FPGA/BSX: fix checksum registers 12 years ago
clk_test.v a083d80ff9 FPGA: update clock speed to 88MHz 12 years ago
dac.v 1a52da6272 FPGA: Adjust DAC I²S signal timing 12 years ago
dcm.v f3a67ab5aa FPGA: rework shared memory access 12 years ago
main.ucf a083d80ff9 FPGA: update clock speed to 88MHz 12 years ago
main.v 9fbe61bad1 FPGA: Use internal clock instead of SNES master clock for $213F RMW timing 12 years ago
main_tf.v a3ac555e18 FPGA: add test fixtures 13 years ago
mcu_cmd.v 968c347986 FPGA/SPI: detect end of byte via MSB toggle instead of constant compare of async input 12 years ago
msu.v 006ea8c44a FPGA: debug wires 12 years ago
rtc.v a083d80ff9 FPGA: update clock speed to 88MHz 12 years ago
sd2snes.xise 034b39588c FPGA: adjust menu memory mapping to make more room for file database 12 years ago
sd_dma.v 006ea8c44a FPGA: debug wires 12 years ago
spi.v 968c347986 FPGA/SPI: detect end of byte via MSB toggle instead of constant compare of async input 12 years ago
srtc.v 006ea8c44a FPGA: debug wires 12 years ago
upd77c25.v 8148f5567c FPGA: properly synchronize external signals 12 years ago
updtest_tf.v ed1e398851 FPGA: fix ST0010 glitches 13 years ago