Browse Source

Vlv2TbltDevicePkg: Switch to CPU I/O 2 Protocol

* Remove unused references to CPU I/O Protocol defined in
  IntelFrameworkPkg
* Convert valid usage of CPU I/O Protocol to the CPU I/O 2
  Protocol

Cc: Zailiang Sun <zailiang.sun@intel.com>
Cc: Yi Qian <yi.qian@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-By: Zailiang Sun <zailiang.sun@intel.com>
Michael D Kinney 4 years ago
parent
commit
0fb81280a3
21 changed files with 30 additions and 181 deletions
  1. 0 47
      Platform/Intel/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.c
  2. 0 1
      Platform/Intel/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.h
  3. 1 3
      Platform/Intel/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.inf
  4. 4 36
      Platform/Intel/Vlv2TbltDevicePkg/Include/Library/EfiRegTableLib.h
  5. 5 52
      Platform/Intel/Vlv2TbltDevicePkg/Library/EfiRegTableLib/EfiRegTableLib.c
  6. 2 5
      Platform/Intel/Vlv2TbltDevicePkg/PciPlatform/PciPlatform.c
  7. 0 1
      Platform/Intel/Vlv2TbltDevicePkg/PciPlatform/PciPlatform.inf
  8. 3 5
      Platform/Intel/Vlv2TbltDevicePkg/PlatformCpuInfoDxe/PlatformCpuInfoDxe.c
  9. 3 5
      Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/IchRegTable.c
  10. 2 2
      Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/Platform.c
  11. 2 2
      Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.h
  12. 0 1
      Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.inf
  13. 1 2
      Platform/Intel/Vlv2TbltDevicePkg/PlatformGopPolicy/PlatformGopPolicy.inf
  14. 2 8
      Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PchInitPeim.c
  15. 0 1
      Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.inf
  16. 0 1
      Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/SetupInfoRecords.c
  17. 0 1
      Platform/Intel/Vlv2TbltDevicePkg/PlatformSmm/Platform.c
  18. 0 1
      Platform/Intel/Vlv2TbltDevicePkg/PlatformSmm/PlatformSmm.inf
  19. 0 2
      Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x94Function.c
  20. 3 3
      Platform/Intel/Vlv2TbltDevicePkg/VlvPlatformInitDxe/IgdOpRegion.c
  21. 2 2
      Platform/Intel/Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf

+ 0 - 47
Platform/Intel/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.c

@@ -34,7 +34,6 @@ Abstract:
 #include <Guid/GlobalVariable.h>
 #include <Guid/SetupVariable.h>
 #include <Guid/PlatformInfo.h>
-#include <Protocol/CpuIo.h>
 #include <Guid/BoardFeatures.h>
 #include <Protocol/AcpiSupport.h>
 #include <Protocol/AcpiS3Save.h>
@@ -54,7 +53,6 @@ CHAR16    gACPIOSFRModelStringVariableName[] = ACPI_OSFR_MODEL_STRING_VARIABLE_N
 CHAR16    gACPIOSFRRefDataBlockVariableName[] = ACPI_OSFR_REF_DATA_BLOCK_VARIABLE_NAME;
 CHAR16    gACPIOSFRMfgStringVariableName[] = ACPI_OSFR_MFG_STRING_VARIABLE_NAME;
 
-EFI_CPU_IO_PROTOCOL                    *mCpuIo;
 EFI_GLOBAL_NVS_AREA_PROTOCOL            mGlobalNvsArea;
 #ifndef __GNUC__
 #pragma optimize("", off)
@@ -776,7 +774,6 @@ AcpiPlatformEntryPoint (
   EFI_HANDLE                    Handle;
   EFI_PS2_POLICY_PROTOCOL       *Ps2Policy;
   EFI_PEI_HOB_POINTERS          GuidHob;
-  UINT8                         PortData;
   EFI_MP_SERVICES_PROTOCOL      *MpService;
   UINTN                         MaximumNumberOfCPUs;
   UINTN                         NumberOfEnabledCPUs;
@@ -1132,53 +1129,9 @@ AcpiPlatformEntryPoint (
   //
   // SIO related option.
   //
-  Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, (void **)&mCpuIo);
-  ASSERT_EFI_ERROR (Status);
-
   mGlobalNvsArea.Area->WPCN381U = GLOBAL_NVS_DEVICE_DISABLE;
-
   mGlobalNvsArea.Area->DockedSioPresent = GLOBAL_NVS_DEVICE_DISABLE;
 
-  if (mGlobalNvsArea.Area->DockedSioPresent != GLOBAL_NVS_DEVICE_ENABLE) {
-    //
-    // Check ID for SIO WPCN381U.
-    //
-    Status = mCpuIo->Io.Read (
-                          mCpuIo,
-                          EfiCpuIoWidthUint8,
-                          WPCN381U_CONFIG_INDEX,
-                          1,
-                          &PortData
-                          );
-    ASSERT_EFI_ERROR (Status);
-    if (PortData != 0xFF) {
-      PortData = 0x20;
-      Status = mCpuIo->Io.Write (
-                            mCpuIo,
-                            EfiCpuIoWidthUint8,
-                            WPCN381U_CONFIG_INDEX,
-                            1,
-                            &PortData
-                            );
-      ASSERT_EFI_ERROR (Status);
-      Status = mCpuIo->Io.Read (
-                            mCpuIo,
-                            EfiCpuIoWidthUint8,
-                            WPCN381U_CONFIG_DATA,
-                            1,
-                            &PortData
-                            );
-      ASSERT_EFI_ERROR (Status);
-      if ((PortData == WPCN381U_CHIP_ID) || (PortData == WDCP376_CHIP_ID)) {
-        mGlobalNvsArea.Area->WPCN381U = GLOBAL_NVS_DEVICE_ENABLE;
-        mGlobalNvsArea.Area->OnboardCom = GLOBAL_NVS_DEVICE_ENABLE;
-        mGlobalNvsArea.Area->OnboardComCir = GLOBAL_NVS_DEVICE_DISABLE;
-      }
-    }
-  }
-
-
-
   //
   // Get Ps2 policy to set. Will be use if present.
   //

+ 0 - 1
Platform/Intel/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.h

@@ -36,7 +36,6 @@ Abstract:
 #include <IndustryStandard/Acpi.h>
 #include <Protocol/AcpiSystemDescriptionTable.h>
 #include <Protocol/MpService.h>
-#include <Protocol/CpuIo.h>
 #include <IndustryStandard/Acpi30.h>
 #include <IndustryStandard/Acpi20.h>
 #include <Library/HobLib.h>

+ 1 - 3
Platform/Intel/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.inf

@@ -79,6 +79,4 @@
   gEfiVariableArchProtocolGuid        AND
   gEfiVariableWriteArchProtocolGuid   AND
   gEfiAcpiSupportProtocolGuid AND
-  gEfiMpServiceProtocolGuid AND
-  gEfiCpuIoProtocolGuid
-
+  gEfiMpServiceProtocolGuid

+ 4 - 36
Platform/Intel/Vlv2TbltDevicePkg/Include/Library/EfiRegTableLib.h

@@ -13,7 +13,7 @@ Abstract:
   Definitions and macros for building register tables for chipset
   initialization..
 
-  Components linking this lib must include CpuIo, PciRootBridgeIo, and
+  Components linking this lib must include PciRootBridgeIo and
   BootScriptSave protocols in their DPX.
 
 
@@ -129,10 +129,9 @@ typedef union {
   entries.
 
   No parameter checking is done so the caller must be careful about omitting
-  values for PciRootBridgeIo or CpuIo parameters.  If the regtable does
+  values for PciRootBridgeIo parameters.  If the regtable does
   not contain any PCI accesses, it is safe to omit the PciRootBridgeIo (supply
-  NULL).  If the regtable does not contain any IO or Mem entries, it is safe to
-  omit the CpuIo (supply NULL).
+  NULL).
 
   The RegTableEntry parameter is not checked, but is required.
 
@@ -146,44 +145,13 @@ typedef union {
   @param[in] PciRootBridgeIo  A pointer to the instance of PciRootBridgeIo that is used
                               when processing PCI table entries
 
-  @param[in] CpuIo            A pointer to the instance of CpuIo that is used when processing IO and
-                              MEM table entries
-
   @retval Nothing.
 
 **/
 VOID
 ProcessRegTablePci (
   EFI_REG_TABLE                   * RegTableEntry,
-  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL * PciRootBridgeIo,
-  EFI_CPU_IO_PROTOCOL             * CpuIo
-  );
-
-/**
-  Processes register table assuming which may contain IO, MEM, and STALL
-  entries, but must NOT contain any PCI entries.  Any PCI entries cause an
-  ASSERT in a DEBUG build and are skipped in a free build.
-
-  No parameter checking is done.  Both RegTableEntry and CpuIo parameters are
-  required.
-
-  gBS is assumed to have been defined and is used when processing stalls.
-
-  The function processes each entry sequentially until an OP_TERMINATE_TABLE
-  entry is encountered.
-
-  @param[in] RegTableEntry - A pointer to the register table to process
-
-  @param[in] CpuIo - A pointer to the instance of CpuIo that is used when processing IO and
-                  MEM table entries
-
-  @retval Nothing.
-
-**/
-VOID
-ProcessRegTableCpu (
-  EFI_REG_TABLE                   * RegTableEntry,
-  EFI_CPU_IO_PROTOCOL             * CpuIo
+  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL * PciRootBridgeIo
   );
 
 #endif

+ 5 - 52
Platform/Intel/Vlv2TbltDevicePkg/Library/EfiRegTableLib/EfiRegTableLib.c

@@ -1,11 +1,8 @@
 /*++
 
-Copyright (c)  1999  - 2014, Intel Corporation. All rights reserved
-                                                                                   

-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-                                                                                   

+Copyright (c)  1999  - 2019, Intel Corporation. All rights reserved
 
+  SPDX-License-Identifier: BSD-2-Clause-Patent
 
 Module Name:
 
@@ -188,10 +185,9 @@ MemReadModifyWrite (
   entries.
 
   No parameter checking is done so the caller must be careful about omitting
-  values for PciRootBridgeIo or CpuIo parameters.  If the regtable does
+  values for PciRootBridgeIo parameters.  If the regtable does
   not contain any PCI accesses, it is safe to omit the PciRootBridgeIo (supply
-  NULL).  If the regtable does not contain any IO or Mem entries, it is safe to
-  omit the CpuIo (supply NULL).
+  NULL).
 
   The RegTableEntry parameter is not checked, but is required.
 
@@ -205,17 +201,13 @@ MemReadModifyWrite (
   @param PciRootBridgeIo  A pointer to the instance of PciRootBridgeIo that is used
                           when processing PCI table entries
 
-  @param CpuIo            A pointer to the instance of CpuIo that is used when processing IO and
-                          MEM table entries
-
   @retval Nothing.
 
 **/
 VOID
 ProcessRegTablePci (
   EFI_REG_TABLE                       *RegTableEntry,
-  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL     *PciRootBridgeIo,
-  EFI_CPU_IO_PROTOCOL                 *CpuIo
+  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL     *PciRootBridgeIo
   )
 {
   while (OPCODE_BASE (RegTableEntry->Generic.OpCode) != OP_TERMINATE_TABLE) {
@@ -241,42 +233,3 @@ ProcessRegTablePci (
     RegTableEntry++;
   }
 }
-
-/**
-  Processes register table assuming which may contain IO, MEM, and STALL
-  entries, but must NOT contain any PCI entries.  Any PCI entries cause an
-  ASSERT in a DEBUG build and are skipped in a free build.
-
-  No parameter checking is done.  Both RegTableEntry and CpuIo parameters are
-  required.
-
-  gBS is assumed to have been defined and is used when processing stalls.
-
-  The function processes each entry sequentially until an OP_TERMINATE_TABLE
-  entry is encountered.
-
-  @param  RegTableEntry   A pointer to the register table to process
-
-  @param  CpuIo           A pointer to the instance of CpuIo that is used when processing IO and
-                          MEM table entries
-
-  @retval Nothing.
-
-**/
-VOID
-ProcessRegTableCpu (
-  EFI_REG_TABLE                       *RegTableEntry,
-  EFI_CPU_IO_PROTOCOL                 *CpuIo
-  )
-{
-  while (OPCODE_BASE (RegTableEntry->Generic.OpCode) != OP_TERMINATE_TABLE) {
-    switch (OPCODE_BASE (RegTableEntry->Generic.OpCode)) {
-    default:
-      DEBUG ((EFI_D_ERROR, "RegTable ERROR: Unknown RegTable OpCode (%x)\n", OPCODE_BASE (RegTableEntry->Generic.OpCode)));
-      ASSERT (0);
-      break;
-    }
-
-    RegTableEntry++;
-  }
-}

+ 2 - 5
Platform/Intel/Vlv2TbltDevicePkg/PciPlatform/PciPlatform.c

@@ -1,10 +1,8 @@
 /** @file
 
-  Copyright (c) 2004  - 2014, Intel Corporation. All rights reserved.<BR>
-                                                                                   

-  SPDX-License-Identifier: BSD-2-Clause-Patent
+  Copyright (c) 2004  - 2019, Intel Corporation. All rights reserved.<BR>
 
-                                                                                   

+  SPDX-License-Identifier: BSD-2-Clause-Patent
 
 Module Name:
 
@@ -23,7 +21,6 @@ Abstract:
 
 #include <Library/BaseLib.h>
 #include <Library/BaseMemoryLib.h>
-#include <Protocol/CpuIo.h>
 #include <Protocol/PciIo.h>
 #include <Guid/SetupVariable.h>
 #include <Protocol/PciRootBridgeIo.h>

+ 0 - 1
Platform/Intel/Vlv2TbltDevicePkg/PciPlatform/PciPlatform.inf

@@ -33,7 +33,6 @@
 
 [Protocols]
   gEfiPciPlatformProtocolGuid
-  gEfiCpuIoProtocolGuid
   gEfiFirmwareVolume2ProtocolGuid
   gEfiPciRootBridgeIoProtocolGuid
   gEfiPciIoProtocolGuid

+ 3 - 5
Platform/Intel/Vlv2TbltDevicePkg/PlatformCpuInfoDxe/PlatformCpuInfoDxe.c

@@ -1,10 +1,8 @@
 /** @file
 
-  Copyright (c) 2004  - 2014, Intel Corporation. All rights reserved.<BR>
-                                                                                   

-  SPDX-License-Identifier: BSD-2-Clause-Patent
+  Copyright (c) 2004  - 2019, Intel Corporation. All rights reserved.<BR>
 
-                                                                                   

+  SPDX-License-Identifier: BSD-2-Clause-Patent
 
 Module Name:
 
@@ -41,7 +39,7 @@ PlatformCpuInfoInit (
       //
       // Write the Platform CPU Info to volatile memory for runtime purposes.
       // This must be done in its own driver because SetVariable protocol is dependent on chipset,
-      // which is dependent on CpuIo, PlatformInfo, and Metronome.
+      // which is dependent on CpuIo2, PlatformInfo, and Metronome.
       //
       Status = gRT->SetVariable(
                       EfiPlatformCpuInfoVariable,

+ 3 - 5
Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/IchRegTable.c

@@ -1,10 +1,8 @@
 /** @file
 
-  Copyright (c) 2004  - 2014, Intel Corporation. All rights reserved.<BR>
-                                                                                   

-  SPDX-License-Identifier: BSD-2-Clause-Patent
+  Copyright (c) 2004  - 2019, Intel Corporation. All rights reserved.<BR>
 
-                                                                                   

+  SPDX-License-Identifier: BSD-2-Clause-Patent
 
 Module Name:
 
@@ -129,6 +127,6 @@ InitializeSubsystemIds (
   //
   // Program the SSVID/SSDID
   //
-  ProcessRegTablePci (mSubsystemIdRegs, mPciRootBridgeIo, NULL);
+  ProcessRegTablePci (mSubsystemIdRegs, mPciRootBridgeIo);
 
 }

+ 2 - 2
Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/Platform.c

@@ -1260,7 +1260,7 @@ UpdateDVMTSetup(
 
 UINT8
 ReadCmosBank1Byte (
-  IN  EFI_CPU_IO_PROTOCOL             *CpuIo,
+  IN  EFI_CPU_IO2_PROTOCOL            *CpuIo,
   IN  UINT8                           Index
   )
 {
@@ -1273,7 +1273,7 @@ ReadCmosBank1Byte (
 
 VOID
 WriteCmosBank1Byte (
-  IN  EFI_CPU_IO_PROTOCOL             *CpuIo,
+  IN  EFI_CPU_IO2_PROTOCOL            *CpuIo,
   IN  UINT8                           Index,
   IN  UINT8                           Data
   )

+ 2 - 2
Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.h

@@ -145,13 +145,13 @@ PciBusEvent (
 
 UINT8
 ReadCmosBank1Byte (
-  IN  EFI_CPU_IO_PROTOCOL             *CpuIo,
+  IN  EFI_CPU_IO2_PROTOCOL            *CpuIo,
   IN  UINT8                           Index
   );
 
 VOID
 WriteCmosBank1Byte (
-  IN  EFI_CPU_IO_PROTOCOL             *CpuIo,
+  IN  EFI_CPU_IO2_PROTOCOL            *CpuIo,
   IN  UINT8                           Index,
   IN  UINT8                           Data
   );

+ 0 - 1
Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.inf

@@ -108,7 +108,6 @@
   gEfiWatchdogTimerDriverProtocolGuid
   gEfiPlatformIdeInitProtocolGuid
   gEfiGlobalNvsAreaProtocolGuid
-  gEfiCpuIo2ProtocolGuid
   gIgdOpRegionProtocolGuid
   gEdkiiVariableLockProtocolGuid
 

+ 1 - 2
Platform/Intel/Vlv2TbltDevicePkg/PlatformGopPolicy/PlatformGopPolicy.inf

@@ -37,9 +37,8 @@
   gEfiNormalSetupGuid
 
 [Protocols]
-  gEfiCpuIoProtocolGuid
   gEfiFirmwareVolume2ProtocolGuid
   gPlatformGOPPolicyGuid
 
 [Depex]
-  gEfiCpuIoProtocolGuid AND gEfiVariableArchProtocolGuid
+  gEfiVariableArchProtocolGuid

+ 2 - 8
Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PchInitPeim.c

@@ -1,11 +1,8 @@
 /** @file
 
-  Copyright (c) 2004  - 2014, Intel Corporation. All rights reserved.<BR>
-                                                                                   

-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-                                                                                   

+  Copyright (c) 2004  - 2019, Intel Corporation. All rights reserved.<BR>
 
+  SPDX-License-Identifier: BSD-2-Clause-Patent
 
 Module Name:
 
@@ -84,9 +81,6 @@ WriteCmosBank1Byte (
 /**
   Turn off system if needed.
 
-  @param PeiServices Pointer to PEI Services
-  @param CpuIo       Pointer to CPU I/O Protocol
-
   @retval None.
 
 **/

+ 0 - 1
Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.inf

@@ -120,7 +120,6 @@
   gEfiDiskInfoProtocolGuid                      ## CONSUMED
   gEfiMpServiceProtocolGuid
   gDxePchPlatformPolicyProtocolGuid
-  gEfiCpuIo2ProtocolGuid
   gEfiTdtOperationProtocolGuid
   gEfiSmbiosProtocolGuid                        ## PROTOCOL CONSUMES
 

+ 0 - 1
Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/SetupInfoRecords.c

@@ -23,7 +23,6 @@ Revision History:
 #include <Protocol/IdeControllerInit.h>
 #include <Protocol/MpService.h>
 #include <Protocol/PchPlatformPolicy.h>
-#include <Protocol/CpuIo2.h>
 #include <Protocol/Smbios.h>
 #include <IndustryStandard/SmBios.h>
 #include <Library/IoLib.h>

+ 0 - 1
Platform/Intel/Vlv2TbltDevicePkg/PlatformSmm/Platform.c

@@ -16,7 +16,6 @@ Abstract:
 --*/
 
 #include "SmmPlatform.h"
-#include <Protocol/CpuIo2.h>
 
 
 //

+ 0 - 1
Platform/Intel/Vlv2TbltDevicePkg/PlatformSmm/PlatformSmm.inf

@@ -56,7 +56,6 @@
   gEfiSmmPowerButtonDispatchProtocolGuid
   gEfiSmmSxDispatchProtocolGuid
   gEfiSmmVariableProtocolGuid
-  gEfiCpuIo2ProtocolGuid
 
 [Packages]
   MdePkg/MdePkg.dec

+ 0 - 2
Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x94Function.c

@@ -19,7 +19,6 @@ Abstract:
 #include "MiscSubclassDriver.h"
 #include <Protocol/DataHub.h>
 #include <Library/HiiLib.h>
-#include <Protocol/CpuIo2.h>
 #include <Library/PrintLib.h>
 #include <Protocol/PciRootBridgeIo.h>
 #include <Protocol/SimpleNetwork.h>
@@ -28,7 +27,6 @@ Abstract:
 #include <Protocol/IdeControllerInit.h>
 #include <Protocol/MpService.h>
 #include <Protocol/PchPlatformPolicy.h>
-#include <Protocol/CpuIo2.h>
 #include <Protocol/I2cBus.h>
 
 #include <Library/IoLib.h>

+ 3 - 3
Platform/Intel/Vlv2TbltDevicePkg/VlvPlatformInitDxe/IgdOpRegion.c

@@ -41,7 +41,7 @@ Abstract:
 #include <Protocol/FirmwareVolume2.h>
 #include <Protocol/PlatformGopPolicy.h>
 #include <Protocol/PciIo.h>
-#include <Protocol/CpuIo.h>
+#include <Protocol/CpuIo2.h>
 #include <Protocol/GlobalNvsArea.h>
 #include <Protocol/DxeSmmReadyToLock.h>
 #include <Protocol/PciRootBridgeIo.h>
@@ -631,7 +631,7 @@ IgdOpRegionInit (
   EFI_STATUS                    Status;
   EFI_GLOBAL_NVS_AREA_PROTOCOL  *GlobalNvsArea;
   UINT32                        DwordData;
-  EFI_CPU_IO_PROTOCOL           *CpuIo;
+  EFI_CPU_IO2_PROTOCOL          *CpuIo;
   UINT16                        Data16;
   UINT16                        AcpiBase;
   VOID                          *gConOutNotifyReg;
@@ -879,7 +879,7 @@ IgdOpRegionInit (
   // Find the CPU I/O Protocol.  ASSERT if not found.
   //
   Status = gBS->LocateProtocol (
-                  &gEfiCpuIoProtocolGuid,
+                  &gEfiCpuIo2ProtocolGuid,
                   NULL,
                   (void **)&CpuIo
                   );

+ 2 - 2
Platform/Intel/Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf

@@ -59,12 +59,12 @@
   gEfiGlobalNvsAreaProtocolGuid
   gEfiPciIoProtocolGuid
   gEfiFirmwareVolume2ProtocolGuid
-  gEfiCpuIoProtocolGuid
+  gEfiCpuIo2ProtocolGuid
 
 [Depex]
   gDxeVlvPlatformPolicyGuid              AND
   gEfiPciRootBridgeIoProtocolGuid     AND
-  gEfiCpuIoProtocolGuid                      AND
+  gEfiCpuIo2ProtocolGuid                  AND
   gEfiDataHubProtocolGuid                 AND
   gEfiGlobalNvsAreaProtocolGuid       AND
   gEfiFirmwareVolume2ProtocolGuid   AND