IgdOpRegion.c 27 KB

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  1. /*++
  2. Copyright (c) 2011 - 2019, Intel Corporation. All rights reserved
  3. SPDX-License-Identifier: BSD-2-Clause-Patent
  4. Module Name:
  5. IgdOpRegion.c
  6. Abstract:
  7. This is part of the implementation of an Intel Graphics drivers OpRegion /
  8. Software SCI interface between system BIOS, ASL code, and Graphics drivers.
  9. The code in this file will load the driver and initialize the interface
  10. Supporting Specifiction: OpRegion / Software SCI SPEC 0.70
  11. Acronyms:
  12. IGD: Internal Graphics Device
  13. NVS: ACPI Non Volatile Storage
  14. OpRegion: ACPI Operational Region
  15. VBT: Video BIOS Table (OEM customizable data)
  16. --*/
  17. //
  18. // Include files
  19. //
  20. #include "IgdOpRegion.h"
  21. #include "VlvPlatformInit.h"
  22. #include <PiDxe.h>
  23. #include <PchRegs.h>
  24. #include <Guid/DataHubRecords.h>
  25. #include <Protocol/IgdOpRegion.h>
  26. #include <Protocol/FirmwareVolume2.h>
  27. #include <Protocol/PlatformGopPolicy.h>
  28. #include <Protocol/PciIo.h>
  29. #include <Protocol/CpuIo2.h>
  30. #include <Protocol/GlobalNvsArea.h>
  31. #include <Protocol/DxeSmmReadyToLock.h>
  32. #include <Protocol/PciRootBridgeIo.h>
  33. #include <Library/MemoryAllocationLib.h>
  34. #include <Library/BaseLib.h>
  35. #include <Library/S3BootScriptLib.h>
  36. #include <Library/IoLib.h>
  37. #include <Library/DevicePathLib.h>
  38. #include <Protocol/DriverBinding.h>
  39. #include <Library/PrintLib.h>
  40. #include <Library/BaseMemoryLib.h>
  41. UINT8 gSVER[12] = "Intel";
  42. extern DXE_VLV_PLATFORM_POLICY_PROTOCOL *DxePlatformSaPolicy;
  43. //
  44. // Global variables
  45. //
  46. IGD_OPREGION_PROTOCOL mIgdOpRegion;
  47. EFI_GUID mMiscSubClass = EFI_MISC_SUBCLASS_GUID;
  48. EFI_EVENT mConOutEvent;
  49. EFI_EVENT mSetGOPverEvent;
  50. VOID *mConOutReg;
  51. #define DEFAULT_FORM_BUFFER_SIZE 0xFFFF
  52. #ifndef ECP_FLAG
  53. #if 0
  54. /**
  55. Get the HII protocol interface
  56. @param Hii HII protocol interface
  57. @retval Status code
  58. **/
  59. static
  60. EFI_STATUS
  61. GetHiiInterface (
  62. OUT EFI_HII_PROTOCOL **Hii
  63. )
  64. {
  65. EFI_STATUS Status;
  66. //
  67. // There should only be one HII protocol
  68. //
  69. Status = gBS->LocateProtocol (
  70. &gEfiHiiProtocolGuid,
  71. NULL,
  72. (VOID **) Hii
  73. );
  74. return Status;;
  75. }
  76. #endif
  77. #endif
  78. /**
  79. Get VBT data.
  80. @param[in] VbtFileBuffer Pointer to VBT data buffer.
  81. @retval EFI_SUCCESS VBT data was returned.
  82. @retval EFI_NOT_FOUND VBT data not found.
  83. @exception EFI_UNSUPPORTED Invalid signature in VBT data.
  84. **/
  85. EFI_STATUS
  86. GetIntegratedIntelVbtPtr (
  87. OUT VBIOS_VBT_STRUCTURE **VbtFileBuffer
  88. )
  89. {
  90. EFI_STATUS Status;
  91. EFI_PHYSICAL_ADDRESS VbtAddress = 0;
  92. UINTN FvProtocolCount;
  93. EFI_HANDLE *FvHandles;
  94. EFI_FIRMWARE_VOLUME2_PROTOCOL *Fv;
  95. UINTN Index;
  96. UINT32 AuthenticationStatus;
  97. UINT8 *Buffer;
  98. UINTN VbtBufferSize = 0;
  99. Buffer = 0;
  100. FvHandles = NULL;
  101. *VbtFileBuffer = NULL;
  102. Status = gBS->LocateHandleBuffer (
  103. ByProtocol,
  104. &gEfiFirmwareVolume2ProtocolGuid,
  105. NULL,
  106. &FvProtocolCount,
  107. &FvHandles
  108. );
  109. if (!EFI_ERROR (Status)) {
  110. for (Index = 0; Index < FvProtocolCount; Index++) {
  111. Status = gBS->HandleProtocol (
  112. FvHandles[Index],
  113. &gEfiFirmwareVolume2ProtocolGuid,
  114. (VOID **) &Fv
  115. );
  116. VbtBufferSize = 0;
  117. Status = Fv->ReadSection (
  118. Fv,
  119. &gBmpImageGuid,
  120. EFI_SECTION_RAW,
  121. 0,
  122. (void **)&Buffer,
  123. &VbtBufferSize,
  124. &AuthenticationStatus
  125. );
  126. if (!EFI_ERROR (Status)) {
  127. VbtAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)Buffer;
  128. Status = EFI_SUCCESS;
  129. break;
  130. }
  131. }
  132. } else {
  133. Status = EFI_NOT_FOUND;
  134. }
  135. if (FvHandles != NULL) {
  136. FreePool(FvHandles);
  137. FvHandles = NULL;
  138. }
  139. //
  140. // Check VBT signature
  141. //
  142. *VbtFileBuffer = (VBIOS_VBT_STRUCTURE *) (UINTN) VbtAddress;
  143. if (*VbtFileBuffer != NULL) {
  144. if ((*((UINT32 *) ((*VbtFileBuffer)->HeaderSignature))) != VBT_SIGNATURE) {
  145. if (*VbtFileBuffer != NULL) {
  146. *VbtFileBuffer = NULL;
  147. }
  148. return EFI_UNSUPPORTED;
  149. }
  150. //
  151. // Check VBT size
  152. //
  153. if ((*VbtFileBuffer)->HeaderVbtSize > VbtBufferSize) {
  154. (*VbtFileBuffer)->HeaderVbtSize = (UINT16) VbtBufferSize;
  155. }
  156. }
  157. return EFI_SUCCESS;
  158. }
  159. //
  160. // Function implementations.
  161. //
  162. /**
  163. Get a pointer to an uncompressed image of the Intel video BIOS.
  164. Note: This function would only be called if the video BIOS at 0xC000 is
  165. missing or not an Intel video BIOS. It may not be an Intel video BIOS
  166. if the Intel graphic contoller is considered a secondary adapter.
  167. @param VBiosROMImage Pointer to an uncompressed Intel video BIOS. This pointer must
  168. be set to NULL if an uncompressed image of the Intel Video BIOS
  169. is not obtainable.
  170. @retval EFI_SUCCESS VBiosPtr is updated.
  171. **/
  172. EFI_STATUS
  173. GetIntegratedIntelVBiosPtr (
  174. INTEL_VBIOS_OPTION_ROM_HEADER **VBiosImage
  175. )
  176. {
  177. EFI_HANDLE *HandleBuffer;
  178. UINTN HandleCount;
  179. UINTN Index;
  180. INTEL_VBIOS_PCIR_STRUCTURE *PcirBlockPtr;
  181. EFI_STATUS Status;
  182. EFI_PCI_IO_PROTOCOL *PciIo;
  183. INTEL_VBIOS_OPTION_ROM_HEADER *VBiosRomImage;
  184. //
  185. // Set as if an umcompressed Intel video BIOS image was not obtainable.
  186. //
  187. VBiosRomImage = NULL;
  188. *VBiosImage = NULL;
  189. //
  190. // Get all PCI IO protocols
  191. //
  192. Status = gBS->LocateHandleBuffer (
  193. ByProtocol,
  194. &gEfiPciIoProtocolGuid,
  195. NULL,
  196. &HandleCount,
  197. &HandleBuffer
  198. );
  199. ASSERT_EFI_ERROR (Status);
  200. //
  201. // Find the video BIOS by checking each PCI IO handle for an Intel video
  202. // BIOS OPROM.
  203. //
  204. for (Index = 0; Index < HandleCount; Index++) {
  205. Status = gBS->HandleProtocol (
  206. HandleBuffer[Index],
  207. &gEfiPciIoProtocolGuid,
  208. (void **)&PciIo
  209. );
  210. ASSERT_EFI_ERROR (Status);
  211. VBiosRomImage = PciIo->RomImage;
  212. //
  213. // If this PCI device doesn't have a ROM image, skip to the next device.
  214. //
  215. if (!VBiosRomImage) {
  216. continue;
  217. }
  218. //
  219. // Get pointer to PCIR structure
  220. //
  221. PcirBlockPtr = (INTEL_VBIOS_PCIR_STRUCTURE *)((UINT8 *) VBiosRomImage + VBiosRomImage->PcirOffset);
  222. //
  223. // Check if we have an Intel video BIOS OPROM.
  224. //
  225. if ((VBiosRomImage->Signature == OPTION_ROM_SIGNATURE) &&
  226. (PcirBlockPtr->VendorId == IGD_VID) &&
  227. (PcirBlockPtr->ClassCode[0] == 0x00) &&
  228. (PcirBlockPtr->ClassCode[1] == 0x00) &&
  229. (PcirBlockPtr->ClassCode[2] == 0x03)
  230. ) {
  231. //
  232. // Found Intel video BIOS.
  233. //
  234. *VBiosImage = VBiosRomImage;
  235. return EFI_SUCCESS;
  236. }
  237. }
  238. //
  239. // No Intel video BIOS found.
  240. //
  241. //
  242. // Free any allocated buffers
  243. //
  244. return EFI_UNSUPPORTED;
  245. }
  246. EFI_STATUS
  247. SearchChildHandle(
  248. EFI_HANDLE Father,
  249. EFI_HANDLE *Child
  250. )
  251. {
  252. EFI_STATUS Status;
  253. UINTN HandleIndex;
  254. EFI_GUID **ProtocolGuidArray = NULL;
  255. UINTN ArrayCount;
  256. UINTN ProtocolIndex;
  257. UINTN OpenInfoCount;
  258. UINTN OpenInfoIndex;
  259. EFI_OPEN_PROTOCOL_INFORMATION_ENTRY *OpenInfo = NULL;
  260. UINTN mHandleCount;
  261. EFI_HANDLE *mHandleBuffer= NULL;
  262. //
  263. // Retrieve the list of all handles from the handle database
  264. //
  265. Status = gBS->LocateHandleBuffer (
  266. AllHandles,
  267. NULL,
  268. NULL,
  269. &mHandleCount,
  270. &mHandleBuffer
  271. );
  272. for (HandleIndex = 0; HandleIndex < mHandleCount; HandleIndex++) {
  273. //
  274. // Retrieve the list of all the protocols on each handle
  275. //
  276. Status = gBS->ProtocolsPerHandle (
  277. mHandleBuffer[HandleIndex],
  278. &ProtocolGuidArray,
  279. &ArrayCount
  280. );
  281. if (!EFI_ERROR (Status)) {
  282. for (ProtocolIndex = 0; ProtocolIndex < ArrayCount; ProtocolIndex++) {
  283. Status = gBS->OpenProtocolInformation (
  284. mHandleBuffer[HandleIndex],
  285. ProtocolGuidArray[ProtocolIndex],
  286. &OpenInfo,
  287. &OpenInfoCount
  288. );
  289. if (!EFI_ERROR (Status)) {
  290. for (OpenInfoIndex = 0; OpenInfoIndex < OpenInfoCount; OpenInfoIndex++) {
  291. if(OpenInfo[OpenInfoIndex].AgentHandle == Father) {
  292. if ((OpenInfo[OpenInfoIndex].Attributes & EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER) == EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER) {
  293. *Child = mHandleBuffer[HandleIndex];
  294. Status = EFI_SUCCESS;
  295. goto TryReturn;
  296. }
  297. }
  298. }
  299. Status = EFI_NOT_FOUND;
  300. }
  301. }
  302. if(OpenInfo != NULL) {
  303. FreePool(OpenInfo);
  304. OpenInfo = NULL;
  305. }
  306. }
  307. FreePool (ProtocolGuidArray);
  308. ProtocolGuidArray = NULL;
  309. }
  310. TryReturn:
  311. if(OpenInfo != NULL) {
  312. FreePool (OpenInfo);
  313. OpenInfo = NULL;
  314. }
  315. if(ProtocolGuidArray != NULL) {
  316. FreePool(ProtocolGuidArray);
  317. ProtocolGuidArray = NULL;
  318. }
  319. if(mHandleBuffer != NULL) {
  320. FreePool (mHandleBuffer);
  321. mHandleBuffer = NULL;
  322. }
  323. return Status;
  324. }
  325. EFI_STATUS
  326. JudgeHandleIsPCIDevice(
  327. EFI_HANDLE Handle,
  328. UINT8 Device,
  329. UINT8 Funs
  330. )
  331. {
  332. EFI_STATUS Status;
  333. EFI_DEVICE_PATH *DPath;
  334. Status = gBS->HandleProtocol (
  335. Handle,
  336. &gEfiDevicePathProtocolGuid,
  337. (VOID **) &DPath
  338. );
  339. if(!EFI_ERROR(Status)) {
  340. while(!IsDevicePathEnd(DPath)) {
  341. if((DPath->Type == HARDWARE_DEVICE_PATH) && (DPath->SubType == HW_PCI_DP)) {
  342. PCI_DEVICE_PATH *PCIPath;
  343. PCIPath = (PCI_DEVICE_PATH*) DPath;
  344. DPath = NextDevicePathNode(DPath);
  345. if(IsDevicePathEnd(DPath) && (PCIPath->Device == Device) && (PCIPath->Function == Funs)) {
  346. return EFI_SUCCESS;
  347. }
  348. } else {
  349. DPath = NextDevicePathNode(DPath);
  350. }
  351. }
  352. }
  353. return EFI_UNSUPPORTED;
  354. }
  355. EFI_STATUS
  356. GetDriverName(
  357. EFI_HANDLE Handle,
  358. CHAR16 *GopVersion
  359. )
  360. {
  361. EFI_DRIVER_BINDING_PROTOCOL *BindHandle = NULL;
  362. EFI_STATUS Status;
  363. UINT32 Version;
  364. UINT16 *Ptr;
  365. Status = gBS->OpenProtocol(
  366. Handle,
  367. &gEfiDriverBindingProtocolGuid,
  368. (VOID**)&BindHandle,
  369. NULL,
  370. NULL,
  371. EFI_OPEN_PROTOCOL_GET_PROTOCOL
  372. );
  373. if (EFI_ERROR(Status)) {
  374. return EFI_NOT_FOUND;
  375. }
  376. Version = BindHandle->Version;
  377. Ptr = (UINT16*)&Version;
  378. UnicodeSPrint(GopVersion, 40, L"7.0.%04d", *(Ptr));
  379. return EFI_SUCCESS;
  380. }
  381. EFI_STATUS
  382. GetGOPDriverVersion(
  383. CHAR16 *GopVersion
  384. )
  385. {
  386. UINTN HandleCount;
  387. EFI_HANDLE *Handles= NULL;
  388. UINTN Index;
  389. EFI_STATUS Status;
  390. EFI_HANDLE Child = 0;
  391. Status = gBS->LocateHandleBuffer(
  392. ByProtocol,
  393. &gEfiDriverBindingProtocolGuid,
  394. NULL,
  395. &HandleCount,
  396. &Handles
  397. );
  398. for (Index = 0; Index < HandleCount ; Index++) {
  399. Status = SearchChildHandle(Handles[Index], &Child);
  400. if(!EFI_ERROR(Status)) {
  401. Status = JudgeHandleIsPCIDevice(Child, 0x02, 0x00);
  402. if(!EFI_ERROR(Status)) {
  403. return GetDriverName(Handles[Index], GopVersion);
  404. }
  405. }
  406. }
  407. return EFI_UNSUPPORTED;
  408. }
  409. /**
  410. Get Intel GOP driver version and copy it into IGD OpRegion GVER. This version
  411. is picked up by IGD driver and displayed in CUI.
  412. @param Event A pointer to the Event that triggered the callback.
  413. @param Context A pointer to private data registered with the callback function.
  414. @retval EFI_SUCCESS Video BIOS VBT information returned.
  415. @retval EFI_UNSUPPORTED Could not find VBT information (*VBiosVbtPtr = NULL).
  416. **/
  417. EFI_STATUS
  418. EFIAPI
  419. SetGOPVersionCallback (
  420. IN EFI_EVENT Event,
  421. IN VOID *Context
  422. )
  423. {
  424. CHAR16 GopVersion[16] = {0};
  425. EFI_STATUS Status;
  426. Status = GetGOPDriverVersion(GopVersion);
  427. if(!EFI_ERROR(Status)) {
  428. StrCpy((CHAR16*)&(mIgdOpRegion.OpRegion->Header.GOPV[0]), GopVersion);
  429. return Status;
  430. }
  431. return EFI_UNSUPPORTED;
  432. }
  433. /**
  434. Get Intel video BIOS VBT information (i.e. Pointer to VBT and VBT size).
  435. The VBT (Video BIOS Table) is a block of customizable data that is built
  436. within the video BIOS and edited by customers.
  437. @param Event A pointer to the Event that triggered the callback.
  438. @param Context A pointer to private data registered with the callback function.
  439. @retval EFI_SUCCESS Video BIOS VBT information returned.
  440. @retval EFI_UNSUPPORTED Could not find VBT information (*VBiosVbtPtr = NULL).
  441. **/
  442. EFI_STATUS
  443. GetVBiosVbtCallback (
  444. IN EFI_EVENT Event,
  445. IN VOID *Context
  446. )
  447. {
  448. INTEL_VBIOS_PCIR_STRUCTURE *PcirBlockPtr;
  449. UINT16 PciVenderId;
  450. UINT16 PciDeviceId;
  451. INTEL_VBIOS_OPTION_ROM_HEADER *VBiosPtr;
  452. VBIOS_VBT_STRUCTURE *VBiosVbtPtr;
  453. VBIOS_VBT_STRUCTURE *VbtFileBuffer = NULL;
  454. VBiosPtr = (INTEL_VBIOS_OPTION_ROM_HEADER *)(UINTN)(VBIOS_LOCATION_PRIMARY);
  455. PcirBlockPtr = (INTEL_VBIOS_PCIR_STRUCTURE *)((UINT8 *)VBiosPtr + VBiosPtr->PcirOffset);
  456. PciVenderId = PcirBlockPtr->VendorId;
  457. PciDeviceId = PcirBlockPtr->DeviceId;
  458. //
  459. // If the video BIOS is not at 0xC0000 or it is not an Intel video BIOS get
  460. // the integrated Intel video BIOS (must be uncompressed).
  461. //
  462. if ((VBiosPtr->Signature != OPTION_ROM_SIGNATURE) || (PciVenderId != IGD_VID) || (PciDeviceId != IGD_DID_VLV)) {
  463. GetIntegratedIntelVBiosPtr (&VBiosPtr);
  464. if(VBiosPtr) {
  465. //
  466. // Video BIOS found.
  467. //
  468. PcirBlockPtr = (INTEL_VBIOS_PCIR_STRUCTURE *)((UINT8 *)VBiosPtr + VBiosPtr->PcirOffset);
  469. PciVenderId = PcirBlockPtr->VendorId;
  470. if( (VBiosPtr->Signature != OPTION_ROM_SIGNATURE) || (PciVenderId != IGD_VID)) {
  471. //
  472. // Intel video BIOS not found.
  473. //
  474. VBiosVbtPtr = NULL;
  475. return EFI_UNSUPPORTED;
  476. }
  477. } else {
  478. //
  479. // No Video BIOS found, try to get VBT from FV.
  480. //
  481. GetIntegratedIntelVbtPtr (&VbtFileBuffer);
  482. if (VbtFileBuffer != NULL) {
  483. //
  484. // Video BIOS not found, use VBT from FV
  485. //
  486. DEBUG ((EFI_D_ERROR, "VBT data found\n"));
  487. (gBS->CopyMem) (
  488. mIgdOpRegion.OpRegion->VBT.GVD1,
  489. VbtFileBuffer,
  490. VbtFileBuffer->HeaderVbtSize
  491. );
  492. FreePool (VbtFileBuffer);
  493. return EFI_SUCCESS;
  494. }
  495. }
  496. if ((VBiosPtr == NULL) ) {
  497. //
  498. // Intel video BIOS not found.
  499. //
  500. VBiosVbtPtr = NULL;
  501. return EFI_UNSUPPORTED;
  502. }
  503. }
  504. DEBUG ((EFI_D_ERROR, "VBIOS found at 0x%X\n", VBiosPtr));
  505. VBiosVbtPtr = (VBIOS_VBT_STRUCTURE *) ((UINT8 *) VBiosPtr + VBiosPtr->VbtOffset);
  506. if ((*((UINT32 *) (VBiosVbtPtr->HeaderSignature))) != VBT_SIGNATURE) {
  507. return EFI_UNSUPPORTED;
  508. }
  509. //
  510. // Initialize Video BIOS version with its build number.
  511. //
  512. mIgdOpRegion.OpRegion->Header.VVER[0] = VBiosVbtPtr->CoreBlockBiosBuild[0];
  513. mIgdOpRegion.OpRegion->Header.VVER[1] = VBiosVbtPtr->CoreBlockBiosBuild[1];
  514. mIgdOpRegion.OpRegion->Header.VVER[2] = VBiosVbtPtr->CoreBlockBiosBuild[2];
  515. mIgdOpRegion.OpRegion->Header.VVER[3] = VBiosVbtPtr->CoreBlockBiosBuild[3];
  516. (gBS->CopyMem) (
  517. mIgdOpRegion.OpRegion->VBT.GVD1,
  518. VBiosVbtPtr,
  519. VBiosVbtPtr->HeaderVbtSize
  520. );
  521. //
  522. // Return final status
  523. //
  524. return EFI_SUCCESS;
  525. }
  526. /**
  527. Graphics OpRegion / Software SCI driver installation function.
  528. @param ImageHandle Handle for this drivers loaded image protocol.
  529. @param SystemTable EFI system table.
  530. @retval EFI_SUCCESS The driver installed without error.
  531. @retval EFI_ABORTED The driver encountered an error and could not complete
  532. installation of the ACPI tables.
  533. **/
  534. EFI_STATUS
  535. IgdOpRegionInit (
  536. void
  537. )
  538. {
  539. EFI_HANDLE Handle;
  540. EFI_STATUS Status;
  541. EFI_GLOBAL_NVS_AREA_PROTOCOL *GlobalNvsArea;
  542. UINT32 DwordData;
  543. EFI_CPU_IO2_PROTOCOL *CpuIo;
  544. UINT16 Data16;
  545. UINT16 AcpiBase;
  546. VOID *gConOutNotifyReg;
  547. //
  548. // Locate the Global NVS Protocol.
  549. //
  550. Status = gBS->LocateProtocol (
  551. &gEfiGlobalNvsAreaProtocolGuid,
  552. NULL,
  553. (void **)&GlobalNvsArea
  554. );
  555. ASSERT_EFI_ERROR (Status);
  556. //
  557. // Allocate an ACPI NVS memory buffer as the IGD OpRegion, zero initialize
  558. // the first 1K, and set the IGD OpRegion pointer in the Global NVS
  559. // area structure.
  560. //
  561. Status = (gBS->AllocatePool) (
  562. EfiACPIMemoryNVS,
  563. sizeof (IGD_OPREGION_STRUC),
  564. (void **)&mIgdOpRegion.OpRegion
  565. );
  566. ASSERT_EFI_ERROR (Status);
  567. (gBS->SetMem) (
  568. mIgdOpRegion.OpRegion,
  569. sizeof (IGD_OPREGION_STRUC),
  570. 0
  571. );
  572. GlobalNvsArea->Area->IgdOpRegionAddress = (UINT32)(UINTN)(mIgdOpRegion.OpRegion);
  573. //
  574. // If IGD is disabled return
  575. //
  576. if (IgdMmPci32 (0) == 0xFFFFFFFF) {
  577. return EFI_SUCCESS;
  578. }
  579. //
  580. // Initialize OpRegion Header
  581. //
  582. (gBS->CopyMem) (
  583. mIgdOpRegion.OpRegion->Header.SIGN,
  584. HEADER_SIGNATURE,
  585. sizeof(HEADER_SIGNATURE)
  586. );
  587. //
  588. // Set OpRegion Size in KBs
  589. //
  590. mIgdOpRegion.OpRegion->Header.SIZE = HEADER_SIZE/1024;
  591. //
  592. // FIXME: Need to check Header OVER Field and the supported version.
  593. //
  594. mIgdOpRegion.OpRegion->Header.OVER = (UINT32) (LShiftU64 (HEADER_OPREGION_VER, 16) + LShiftU64 (HEADER_OPREGION_REV, 8));
  595. #ifdef ECP_FLAG
  596. CopyMem(mIgdOpRegion.OpRegion->Header.SVER, gSVER, sizeof(gSVER));
  597. #else
  598. gBS->CopyMem(
  599. mIgdOpRegion.OpRegion->Header.SVER,
  600. gSVER,
  601. sizeof(gSVER)
  602. );
  603. #endif
  604. DEBUG ((EFI_D_ERROR, "System BIOS ID is %a\n", mIgdOpRegion.OpRegion->Header.SVER));
  605. mIgdOpRegion.OpRegion->Header.MBOX = HEADER_MBOX_SUPPORT;
  606. if( 1 == DxePlatformSaPolicy->IdleReserve) {
  607. mIgdOpRegion.OpRegion->Header.PCON = (mIgdOpRegion.OpRegion->Header.PCON & 0xFFFC) | BIT1;
  608. } else {
  609. mIgdOpRegion.OpRegion->Header.PCON = (mIgdOpRegion.OpRegion->Header.PCON & 0xFFFC) | (BIT1 | BIT0);
  610. }
  611. //
  612. //For graphics driver to identify if LPE Audio/HD Audio is enabled on the platform
  613. //
  614. mIgdOpRegion.OpRegion->Header.PCON &= AUDIO_TYPE_SUPPORT_MASK;
  615. mIgdOpRegion.OpRegion->Header.PCON &= AUDIO_TYPE_FIELD_MASK;
  616. if ( 1 == DxePlatformSaPolicy->AudioTypeSupport ) {
  617. mIgdOpRegion.OpRegion->Header.PCON = HD_AUDIO_SUPPORT;
  618. mIgdOpRegion.OpRegion->Header.PCON |= AUDIO_TYPE_FIELD_VALID;
  619. }
  620. //
  621. // Initialize OpRegion Mailbox 1 (Public ACPI Methods).
  622. //
  623. //<TODO> The initial setting of mailbox 1 fields is implementation specific.
  624. // Adjust them as needed many even coming from user setting in setup.
  625. //
  626. //Workaround to solve LVDS is off after entering OS in desktop platform
  627. //
  628. mIgdOpRegion.OpRegion->MBox1.CLID = DxePlatformSaPolicy->IgdPanelFeatures.LidStatus;
  629. //
  630. // Initialize OpRegion Mailbox 3 (ASLE Interrupt and Power Conservation).
  631. //
  632. //<TODO> The initial setting of mailbox 3 fields is implementation specific.
  633. // Adjust them as needed many even coming from user setting in setup.
  634. //
  635. //
  636. // Do not initialize TCHE. This field is written by the graphics driver only.
  637. //
  638. //
  639. // The ALSI field is generally initialized by ASL code by reading the embedded controller.
  640. //
  641. mIgdOpRegion.OpRegion->MBox3.BCLP = BACKLIGHT_BRIGHTNESS;
  642. mIgdOpRegion.OpRegion->MBox3.PFIT = (FIELD_VALID_BIT | PFIT_STRETCH);
  643. if ( DxePlatformSaPolicy->IgdPanelFeatures.PFITStatus == 2) {
  644. //
  645. // Center
  646. //
  647. mIgdOpRegion.OpRegion->MBox3.PFIT = (FIELD_VALID_BIT | PFIT_CENTER);
  648. } else if (DxePlatformSaPolicy->IgdPanelFeatures.PFITStatus == 1) {
  649. //
  650. // Stretch
  651. //
  652. mIgdOpRegion.OpRegion->MBox3.PFIT = (FIELD_VALID_BIT | PFIT_STRETCH);
  653. } else {
  654. //
  655. // Auto
  656. //
  657. mIgdOpRegion.OpRegion->MBox3.PFIT = (FIELD_VALID_BIT | PFIT_SETUP_AUTO);
  658. }
  659. //
  660. // Set Initial current Brightness
  661. //
  662. mIgdOpRegion.OpRegion->MBox3.CBLV = (INIT_BRIGHT_LEVEL | FIELD_VALID_BIT);
  663. //
  664. // <EXAMPLE> Create a static Backlight Brightness Level Duty cycle Mapping Table
  665. // Possible 20 entries (example used 10), each 16 bits as follows:
  666. // [15] = Field Valid bit, [14:08] = Level in Percentage (0-64h), [07:00] = Desired duty cycle (0 - FFh).
  667. //
  668. // % Brightness
  669. mIgdOpRegion.OpRegion->MBox3.BCLM[0] = ( ( 0 << 8 ) + ( 0xFF - 0xFC ) + WORD_FIELD_VALID_BIT);
  670. mIgdOpRegion.OpRegion->MBox3.BCLM[1] = ( ( 1 << 8 ) + ( 0xFF - 0xFC ) + WORD_FIELD_VALID_BIT);
  671. mIgdOpRegion.OpRegion->MBox3.BCLM[2] = ( ( 10 << 8 ) + ( 0xFF - 0xE5 ) + WORD_FIELD_VALID_BIT);
  672. mIgdOpRegion.OpRegion->MBox3.BCLM[3] = ( ( 19 << 8 ) + ( 0xFF - 0xCE ) + WORD_FIELD_VALID_BIT);
  673. mIgdOpRegion.OpRegion->MBox3.BCLM[4] = ( ( 28 << 8 ) + ( 0xFF - 0xB7 ) + WORD_FIELD_VALID_BIT);
  674. mIgdOpRegion.OpRegion->MBox3.BCLM[5] = ( ( 37 << 8 ) + ( 0xFF - 0xA0 ) + WORD_FIELD_VALID_BIT);
  675. mIgdOpRegion.OpRegion->MBox3.BCLM[6] = ( ( 46 << 8 ) + ( 0xFF - 0x89 ) + WORD_FIELD_VALID_BIT);
  676. mIgdOpRegion.OpRegion->MBox3.BCLM[7] = ( ( 55 << 8 ) + ( 0xFF - 0x72 ) + WORD_FIELD_VALID_BIT);
  677. mIgdOpRegion.OpRegion->MBox3.BCLM[8] = ( ( 64 << 8 ) + ( 0xFF - 0x5B ) + WORD_FIELD_VALID_BIT);
  678. mIgdOpRegion.OpRegion->MBox3.BCLM[9] = ( ( 73 << 8 ) + ( 0xFF - 0x44 ) + WORD_FIELD_VALID_BIT);
  679. mIgdOpRegion.OpRegion->MBox3.BCLM[10] = ( ( 82 << 8 ) + ( 0xFF - 0x2D ) + WORD_FIELD_VALID_BIT);
  680. mIgdOpRegion.OpRegion->MBox3.BCLM[11] = ( ( 91 << 8 ) + ( 0xFF - 0x16 ) + WORD_FIELD_VALID_BIT);
  681. mIgdOpRegion.OpRegion->MBox3.BCLM[12] = ( (100 << 8 ) + ( 0xFF - 0x00 ) + WORD_FIELD_VALID_BIT);
  682. mIgdOpRegion.OpRegion->MBox3.PCFT = ((UINT32) GlobalNvsArea->Area->IgdPowerConservation) | BIT31;
  683. //
  684. // Create the notification and register callback function on the PciIo installation,
  685. //
  686. //
  687. Status = gBS->CreateEvent (
  688. EVT_NOTIFY_SIGNAL,
  689. TPL_CALLBACK,
  690. (EFI_EVENT_NOTIFY)GetVBiosVbtCallback,
  691. NULL,
  692. &mConOutEvent
  693. );
  694. ASSERT_EFI_ERROR (Status);
  695. if (EFI_ERROR (Status)) {
  696. return Status;
  697. }
  698. Status = gBS->RegisterProtocolNotify (
  699. #ifdef ECP_FLAG
  700. &gExitPmAuthProtocolGuid,
  701. #else
  702. &gEfiDxeSmmReadyToLockProtocolGuid,
  703. #endif
  704. mConOutEvent,
  705. &gConOutNotifyReg
  706. );
  707. Status = gBS->CreateEvent (
  708. EVT_NOTIFY_SIGNAL,
  709. TPL_CALLBACK,
  710. (EFI_EVENT_NOTIFY)SetGOPVersionCallback,
  711. NULL,
  712. &mSetGOPverEvent
  713. );
  714. ASSERT_EFI_ERROR (Status);
  715. if (EFI_ERROR (Status)) {
  716. return Status;
  717. }
  718. Status = gBS->RegisterProtocolNotify (
  719. &gEfiGraphicsOutputProtocolGuid,
  720. mSetGOPverEvent,
  721. &gConOutNotifyReg
  722. );
  723. //
  724. // Initialize hardware state:
  725. // Set ASLS Register to the OpRegion physical memory address.
  726. // Set SWSCI register bit 15 to a "1" to activate SCI interrupts.
  727. //
  728. IgdMmPci32 (IGD_ASLS_OFFSET) = (UINT32)(UINTN)(mIgdOpRegion.OpRegion);
  729. IgdMmPci16AndThenOr (IGD_SWSCI_OFFSET, ~(BIT0), BIT15);
  730. DwordData = IgdMmPci32 (IGD_ASLS_OFFSET);
  731. S3BootScriptSavePciCfgWrite (
  732. S3BootScriptWidthUint32,
  733. (UINTN) (EFI_PCI_ADDRESS (IGD_BUS, IGD_DEV, IGD_FUN_0, IGD_ASLS_OFFSET)),
  734. 1,
  735. &DwordData
  736. );
  737. DwordData = IgdMmPci32 (IGD_SWSCI_OFFSET);
  738. S3BootScriptSavePciCfgWrite (
  739. S3BootScriptWidthUint32,
  740. (UINTN) (EFI_PCI_ADDRESS (IGD_BUS, IGD_DEV, IGD_FUN_0, IGD_SWSCI_OFFSET)),
  741. 1,
  742. &DwordData
  743. );
  744. AcpiBase = MmPci16 (
  745. 0,
  746. DEFAULT_PCI_BUS_NUMBER_PCH,
  747. PCI_DEVICE_NUMBER_PCH_LPC,
  748. PCI_FUNCTION_NUMBER_PCH_LPC,
  749. R_PCH_LPC_ACPI_BASE
  750. ) & B_PCH_LPC_ACPI_BASE_BAR;
  751. //
  752. // Find the CPU I/O Protocol. ASSERT if not found.
  753. //
  754. Status = gBS->LocateProtocol (
  755. &gEfiCpuIo2ProtocolGuid,
  756. NULL,
  757. (void **)&CpuIo
  758. );
  759. ASSERT_EFI_ERROR (Status);
  760. CpuIo->Io.Read (
  761. CpuIo,
  762. EfiCpuIoWidthUint16,
  763. AcpiBase + R_PCH_ACPI_GPE0a_STS,
  764. 1,
  765. &Data16
  766. );
  767. //
  768. // Clear the B_PCH_ACPI_GPE0a_STS_GUNIT_SCI bit in R_PCH_ACPI_GPE0a_STS by writing a '1'.
  769. //
  770. Data16 |= B_PCH_ACPI_GPE0a_STS_GUNIT_SCI;
  771. CpuIo->Io.Write (
  772. CpuIo,
  773. EfiCpuIoWidthUint16,
  774. AcpiBase + R_PCH_ACPI_GPE0a_STS,
  775. 1,
  776. &Data16
  777. );
  778. //
  779. // Install OpRegion / Software SCI protocol
  780. //
  781. Handle = NULL;
  782. Status = gBS->InstallMultipleProtocolInterfaces (
  783. &Handle,
  784. &gIgdOpRegionProtocolGuid,
  785. &mIgdOpRegion,
  786. NULL
  787. );
  788. ASSERT_EFI_ERROR (Status);
  789. //
  790. // Return final status
  791. //
  792. return EFI_SUCCESS;
  793. }