Maximilian Rehkopf 8148f5567c FPGA: properly synchronize external signals 12 years ago
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ipcore_dir f0a2e85c65 FPGA: updated project files 12 years ago
address.v e33b2b2bc7 FPGA: simple SNES address input filtering 12 years ago
cx4.v 2a1ef40796 FPGA/cx4: adjust Cx4 CPU timing 12 years ago
dac.v 1a52da6272 FPGA: Adjust DAC I²S signal timing 12 years ago
dcm.v e57c4aa450 FPGA/cx4: initial commit 12 years ago
main.ucf e33b2b2bc7 FPGA: simple SNES address input filtering 12 years ago
main.v 8148f5567c FPGA: properly synchronize external signals 12 years ago
msu.v 8148f5567c FPGA: properly synchronize external signals 12 years ago
sd2snes_cx4.xise 2a1ef40796 FPGA/cx4: adjust Cx4 CPU timing 12 years ago
sd_dma.v 059966f06a FPGA/Cx4: optimize non-sector-aligned SD DMA reads 12 years ago
spi.v 1987968db2 FPGA/cx4: clean up tab/whitespace mix 12 years ago