Commit History

Author SHA1 Message Date
  Heinrich Schuchardt b680cc70dc sysreset: provide SBI based sysreset driver 2 years ago
  Marek Behún 236f2ec432 treewide: Convert macro and uses of __section(foo) to __section("foo") 3 years ago
  Green Wan edd9ad8194 riscv: cpu: Add callback to init each core 3 years ago
  Sean Anderson 768502e2a7 riscv: Clear pending IPIs on initialization 3 years ago
  Bin Meng a0018fc820 riscv: Make SiFive HiFive Unleashed board boot again 3 years ago
  Sean Anderson b8bc120927 riscv: Add option to support RISC-V privileged spec 1.9 3 years ago
  Sean Anderson 40686c394e riscv: Clean up IPI initialization code 3 years ago
  Simon Glass cd93d625fd common: Drop linux/bitops.h from common header 4 years ago
  Simon Glass 691d719db7 common: Drop init.h from common header 4 years ago
  Lukas Auer fbfd92bf9b riscv: add run mode configuration for SPL 4 years ago
  Bin Meng 4d2583dba1 riscv: Access CSRs using CSR numbers 4 years ago
  Rick Chen f9281b8905 riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is enabled 5 years ago
  Rick Chen bdce38965e riscv: Introduce CONFIG_XIP to support booting from flash 5 years ago
  Lukas Auer 3dea63c844 riscv: add support for multi-hart systems 5 years ago
  Bin Meng 485e822346 riscv: Do some basic architecture level cpu initialization 5 years ago
  Bin Meng aef59e5cc4 riscv: Update supports_extension() to use desc from cpu driver 5 years ago
  Bin Meng 3c276b2703 riscv: Remove non-DM version of print_cpuinfo() 5 years ago
  Bin Meng 39cad5bc0b riscv: Probe cpus during boot 5 years ago
  Lukas Auer 5d8b2e7711 riscv: save hart ID and device tree passed by prior boot stage 5 years ago
  Bin Meng 2fab2e9c88 riscv: Add a helper routine to print CPU information 5 years ago