Signed-off-by: Wei Liang Lim <weiliang.lim@starfivetech.com>
@@ -4,29 +4,31 @@
/ {
chosen {
stdout-path = "serial0";
+ bootph-pre-ram;
};
config {
u-boot,spl-payload-offset = <0x42000>;
cpus {
- bootph-all;
cpu@0 {
cpu@1 {
memory@80000000 {
soc {
dmc: dmc@10280000 {
compatible = "starfive,dubhe-ddr";
reg = <0x0 0x10280000 0x0 0x10000
@@ -34,40 +36,52 @@
0x0 0x102A0000 0x0 0x10000>;
clocks = <&pbus_clk>;
clock-frequency = <25000000>;
+&clint {
+};
+
+&pbus_clk {
+&plic0 {
&spi0 {
mmc@0 {
&qspi1 {
flash@0 {
&uart0 {
&pbus_clk {
&clint {
&cpu0_intc {