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@@ -4,29 +4,31 @@
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/ {
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/ {
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chosen {
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chosen {
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stdout-path = "serial0";
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stdout-path = "serial0";
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+ bootph-pre-ram;
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};
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};
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config {
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config {
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u-boot,spl-payload-offset = <0x42000>;
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u-boot,spl-payload-offset = <0x42000>;
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+ bootph-pre-ram;
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};
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};
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cpus {
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cpus {
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- bootph-all;
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+ bootph-pre-ram;
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cpu@0 {
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cpu@0 {
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- bootph-all;
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+ bootph-pre-ram;
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};
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};
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cpu@1 {
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cpu@1 {
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- bootph-all;
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+ bootph-pre-ram;
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};
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};
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};
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};
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memory@80000000 {
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memory@80000000 {
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- bootph-all;
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+ bootph-pre-ram;
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};
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};
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soc {
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soc {
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- bootph-all;
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+ bootph-pre-ram;
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dmc: dmc@10280000 {
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dmc: dmc@10280000 {
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compatible = "starfive,dubhe-ddr";
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compatible = "starfive,dubhe-ddr";
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reg = <0x0 0x10280000 0x0 0x10000
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reg = <0x0 0x10280000 0x0 0x10000
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@@ -34,40 +36,52 @@
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0x0 0x102A0000 0x0 0x10000>;
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0x0 0x102A0000 0x0 0x10000>;
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clocks = <&pbus_clk>;
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clocks = <&pbus_clk>;
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clock-frequency = <25000000>;
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clock-frequency = <25000000>;
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- bootph-all;
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+ bootph-pre-ram;
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};
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};
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};
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};
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};
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};
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+&clint {
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+ bootph-pre-ram;
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+};
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+
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+&pbus_clk {
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+ bootph-pre-ram;
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+};
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+
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+&plic0 {
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+ bootph-pre-ram;
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+};
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+
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&spi0 {
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&spi0 {
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- bootph-all;
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+ bootph-pre-ram;
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mmc@0 {
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mmc@0 {
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- bootph-all;
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+ bootph-pre-ram;
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};
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};
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};
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};
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&qspi1 {
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&qspi1 {
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- bootph-all;
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+ bootph-pre-ram;
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flash@0 {
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flash@0 {
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- bootph-all;
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+ bootph-pre-ram;
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};
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};
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};
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};
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&uart0 {
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&uart0 {
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- bootph-all;
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+ bootph-pre-ram;
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};
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};
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&pbus_clk {
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&pbus_clk {
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- bootph-all;
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+ bootph-pre-ram;
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};
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};
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&clint {
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&clint {
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clocks = <&pbus_clk>;
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clocks = <&pbus_clk>;
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- bootph-all;
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+ bootph-pre-ram;
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};
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};
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&cpu0_intc {
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&cpu0_intc {
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- bootph-all;
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+ bootph-pre-ram;
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};
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};
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