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@@ -38,23 +38,9 @@
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#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
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#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
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-/*
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- * 32-bit data path mode.
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- *
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- * Please note that using this mode for devices with the real density of 64-bit
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- * effectively reduces the amount of available memory due to the effect of
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- * wrapping around while translating address to row/columns, for example in the
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- * 256MB module the upper 128MB get aliased with contents of the lower
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- * 128MB); normally this define should be used for devices with real 32-bit
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- * data path.
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- */
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-#undef CONFIG_DDR_32BIT
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-
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#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory*/
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#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN \
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| DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
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-#undef CONFIG_DDR_2T_TIMING
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-
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/*
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* DDRCDR - DDR Control Driver Register
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*/
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@@ -70,21 +56,6 @@
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* Manually set up DDR parameters
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*/
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#define CONFIG_SYS_DDR_SIZE 256 /* MB */
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-#if defined(CONFIG_DDR_II)
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-#define CONFIG_SYS_DDRCDR 0x80080001
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-#define CONFIG_SYS_DDR_CS2_BNDS 0x0000000f
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-#define CONFIG_SYS_DDR_CS2_CONFIG 0x80330102
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-#define CONFIG_SYS_DDR_TIMING_0 0x00220802
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-#define CONFIG_SYS_DDR_TIMING_1 0x38357322
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-#define CONFIG_SYS_DDR_TIMING_2 0x2f9048c8
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-#define CONFIG_SYS_DDR_TIMING_3 0x00000000
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-#define CONFIG_SYS_DDR_CLK_CNTL 0x02000000
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-#define CONFIG_SYS_DDR_MODE 0x47d00432
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-#define CONFIG_SYS_DDR_MODE2 0x8000c000
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-#define CONFIG_SYS_DDR_INTERVAL 0x03cf0080
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-#define CONFIG_SYS_DDR_SDRAM_CFG 0x43000000
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-#define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000
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-#else
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#define CONFIG_SYS_DDR_CS2_CONFIG (CSCONFIG_EN \
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| CSCONFIG_ROW_BIT_13 \
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| CSCONFIG_COL_BIT_10)
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@@ -93,17 +64,10 @@
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#define CONFIG_SYS_DDR_CONTROL 0xc2000000 /* unbuffered,no DYN_PWR */
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#define CONFIG_SYS_DDR_INTERVAL 0x04060100 /* autocharge,no open page */
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-#if defined(CONFIG_DDR_32BIT)
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-/* set burst length to 8 for 32-bit data path */
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- /* DLL,normal,seq,4/2.5, 8 burst len */
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-#define CONFIG_SYS_DDR_MODE 0x00000023
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-#else
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/* the default burst length is 4 - for 64-bit data path */
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/* DLL,normal,seq,4/2.5, 4 burst len */
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#define CONFIG_SYS_DDR_MODE 0x00000022
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#endif
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-#endif
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-#endif
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/*
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* SDRAM on the Local Bus
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