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spl: set rtos ram base (0x40400000 -> 0x6e800000)

set rtos ram base and move to running address.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Minda Chen 6 months ago
parent
commit
4472e9c5c6

+ 6 - 0
board/starfive/visionfive2/Kconfig

@@ -29,6 +29,12 @@ config SPL_TEXT_BASE
 config SPL_OPENSBI_LOAD_ADDR
 	default 0x80000000
 
+config RTOS_RAM_BASE
+       default 0x6e800000
+
+config RTOS_IMAGE_OFFSET
+       default 0x400000
+
 config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
 	select STARFIVE_JH7110

+ 7 - 1
board/starfive/visionfive2/spl.c

@@ -199,4 +199,10 @@ int board_fit_config_name_match(const char *name)
 }
 #endif
 
-
+void spl_perform_fixups(struct spl_image_info *spl_image)
+{
+	if (spl_image->size > CONFIG_RTOS_IMAGE_OFFSET)
+		memcpy((void *)CONFIG_RTOS_RAM_BASE,
+			(void *) (CONFIG_SPL_OPENSBI_LOAD_ADDR + CONFIG_RTOS_IMAGE_OFFSET),
+			spl_image->size - CONFIG_RTOS_IMAGE_OFFSET);
+}

+ 2 - 0
include/configs/starfive-visionfive2.h

@@ -23,6 +23,8 @@
 #define CONFIG_SPL_STACK		(0x08000000 + 0x00180000 - \
 					 GENERATED_GBL_DATA_SIZE)
 #define STARFIVE_SPL_BOOT_LOAD_ADDR	0x60000000
+#define CONFIG_RTOS_RAM_BASE		0x6e800000
+#define CONFIG_RTOS_IMAGE_OFFSET	0x400000
 #endif
 
 #define CONFIG_SYS_BOOTM_LEN            SZ_64M