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update qspi/sys clk and version information

yanhong.wang 3 years ago
parent
commit
c0514b34ed
6 changed files with 31 additions and 17 deletions
  1. 2 5
      boot/bootmain.c
  2. 6 2
      build/Makefile
  3. 3 2
      common/sys.h
  4. 1 1
      spi/cadence_qspi.c
  5. 13 4
      timer/timer.c
  6. 6 3
      timer/timer.h

+ 2 - 5
boot/bootmain.c

@@ -27,8 +27,6 @@
 #include "clkgen_ctrl_macro.h"
 #include "syscon_sysmain_ctrl_macro.h"
 
-#define BOOTLOADER_VERSION	"2020.9.28.lb-u"
-
 extern void boot_sdio_init(void);
 extern int boot_load_gpt_partition(void* dst, const gpt_guid* partition_type_guid);
 extern const gpt_guid gpt_guid_sifive_uboot;
@@ -272,7 +270,7 @@ void boot_from_sdio(void)
 	boot_load_gpt_partition((void *)DEFAULT_UBOOT_ADDR,&gpt_guid_sifive_uboot);
 
 	/*load kernel bin file from sd card*/
-	boot_load_gpt_partition((void *)DEFAULT_KERNEL_ADDR,&gpt_guid_sifive_kernel);
+//	boot_load_gpt_partition((void *)DEFAULT_KERNEL_ADDR,&gpt_guid_sifive_kernel);
 }
 
 
@@ -448,7 +446,6 @@ void BootMain(void)
 	int boot_mode = 0;
 	int ret=0;
 
-	timer_init(0);
 	gpio_init();
 	uart_init(3);
 
@@ -456,7 +453,7 @@ void BootMain(void)
 	if(ret == 0)
 	{
 		_SET_SYSCON_REG_register68_SCFG_disable_u74_memaxi_remap(1);
-		printk("DDR clk 2133M,Version %s\r\n",BOOTLOADER_VERSION);
+		printk("DDR clk 2133M,Version: %s\r\n",VERSION);
 	}
 	else
 		printk("End init lpddr4, test ddr fail\r\n");

+ 6 - 2
build/Makefile

@@ -7,8 +7,12 @@ LD=${CROSSCOMPILE}ld
 OBJCOPY=${CROSSCOMPILE}objcopy
 OBJDUMP=${CROSSCOMPILE}objdump
 
+SUFFIX=$(shell date +%y%m%d)
+GIT_VERSION=$(shell git show -s --pretty=format:%h)
+VERSION=$(SUFFIX)-$(GIT_VERSION)
+
+TARGET 	= ddrinit-$(SUFFIX)
 
-TARGET 	= ddrinit
 LINKER_SCRIPT := ddrinit.lds
 MAP_FILE := ddrinit.map
 
@@ -32,7 +36,7 @@ INCLUDE_DIR = -I. -I../boot\
 RISCV_ARCH := rv64imafdc
 RISCV_ABI  := lp64d 
 
-CFLAGS += -O2 -g -c -Wall
+CFLAGS += -O2 -g -c -Wall -DVERSION=\"$(VERSION)\"
 CFLAGS += -march=$(RISCV_ARCH)
 CFLAGS += -mabi=$(RISCV_ABI)
 CFLAGS += -mcmodel=medany

+ 3 - 2
common/sys.h

@@ -12,8 +12,9 @@
 #define DDRPHY1_CSR_BASE_ADDR (E32_ADDR_REMAP_OFFSET+0x0011830000LL)
 
 
-#define QSPI_CLK            50000000
-#define TIMER_CLK_HZ		25000000
+#define QSPI_CLK            10000000
+#define QSPI_REF_CLK        250000000
+#define TIMER_CLK_HZ		6250000
 
 
 #define DEFAULT_SD_BOOT_LOAD_BLOCK  1000

+ 1 - 1
spi/cadence_qspi.c

@@ -29,7 +29,7 @@ struct cadence_spi_slave vic_spi_slave;
 #define CQSPI_INDIRECT_READ		2
 #define CQSPI_INDIRECT_WRITE	3
 #define CADENCE_QSPI_MAX_HZ		QSPI_CLK
-#define CONFIG_CQSPI_REF_CLK	QSPI_CLK
+#define CONFIG_CQSPI_REF_CLK	QSPI_REF_CLK
 #define CONFIG_CQSPI_DECODER	0
 static int cadence_spi_write_speed(unsigned int hz)
 {

+ 13 - 4
timer/timer.c

@@ -13,13 +13,16 @@
 #include <uart.h>
 #include <div64.h>
 
+#define TIMER_RATE_HZ				(TIMER_CLK_HZ /1000)  
+
+#if 0
 #define VIC_TIMER_NUM	        7
 #define VIC_TIMER_NUM_MAX        7
 #define VIC_SYS_TIMER          0
 
 #define CONFIG_SYS_HZ               1000
 
-#define TIMER_RATE_HZ				(CONFIG_SYS_HZ_CLOCK /CONFIG_SYS_HZ)  
+#define TIMER_RATE_HZ				(CONFIG_SYS_HZ_CLOCK /1000)  
 #define WDOG_UNKOCK                 0x378f0765
 
 u32 interrupt_count = 0;
@@ -300,10 +303,17 @@ u32 get_ticks(u32 tick_base)
 	lastdec = now;
 	return (u32)(timestamp-tick_base);
 }
+#endif
+#include "platform.h"
+
+unsigned long long get_ticks(void)
+{
+	return readq(CLINT_CTRL_MTIME);
+}
 
 u32 get_timer(unsigned int base)
 {
-	return lldiv(get_ticks(0), TIMER_RATE_HZ) - base;
+	return lldiv(get_ticks(), TIMER_RATE_HZ) - base;
 }
 #if 0
 u32 usec_to_tick(u32 usec)
@@ -331,12 +341,11 @@ int udelay(u32 usec)
 }
 
 #endif
-#include "platform.h"
 
 u64 usec_to_tick(u64 usec)
 {
     u64 value;
-    value = usec*(TIMER_CLK_HZ/1000000);
+    value = usec*(TIMER_CLK_HZ/1000)/1000;
     return value;
 }
 

+ 6 - 3
timer/timer.h

@@ -3,6 +3,7 @@
 
 #include <comdef.h>
 
+#if 0
 #define RUN_MODE_CONTINOUS     0
 #define RUN_MODE_SINGLE		1
 
@@ -43,8 +44,6 @@ struct timer_init_s{
  */
 int timer_clr_int_status(u32 id);
 
-u32 get_timer(unsigned int base);
-
 /*---------------------------------------------------
  *
  * timer_set:
@@ -107,6 +106,8 @@ int timer_init(int id);
  * Returns: 0 on success, not 0 on failure
  */
 int timer_exit(void);
+#endif
+
 /*---------------------------------------------------
  *
  * udelay:
@@ -123,6 +124,7 @@ void mdelay(unsigned int ms);
 
 void sdelay(unsigned int s);
 
+u32 get_timer(unsigned int base);
 
 /*---------------------------------------------------
  *
@@ -136,7 +138,8 @@ void sdelay(unsigned int s);
             ticks from system start based on tick_base.
  */
 
-u32 get_ticks(u32 tick_base);
+unsigned long long get_ticks(void);
+
 
 /*---------------------------------------------------
  *