timer.c 7.2 KB

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  1. /*************************************************************************
  2. * All rights reserved.
  3. *
  4. * Filename : timer.c
  5. * Version : version 001
  6. * Author :
  7. * Created on : 2018.07.14
  8. *************************************************************************/
  9. #include <comdef.h>
  10. #include <sys.h>
  11. #include <timer.h>
  12. #include <clkgen_ctrl_macro.h>
  13. #include <uart.h>
  14. #include <div64.h>
  15. #define TIMER_RATE_HZ (TIMER_CLK_HZ /1000)
  16. #if 0
  17. #define VIC_TIMER_NUM 7
  18. #define VIC_TIMER_NUM_MAX 7
  19. #define VIC_SYS_TIMER 0
  20. #define CONFIG_SYS_HZ 1000
  21. #define TIMER_RATE_HZ (CONFIG_SYS_HZ_CLOCK /1000)
  22. #define WDOG_UNKOCK 0x378f0765
  23. u32 interrupt_count = 0;
  24. /*
  25. * variables definition for local use
  26. */
  27. static const u32 timer_clk = CONFIG_SYS_HZ_CLOCK;
  28. static u64 lastdec;//Last decremneter snapshot
  29. static u64 timestamp;//Monotonic incrementing timer
  30. static u64 timer_load_val;
  31. struct timer_regs{
  32. u32 interrupt_status; //0x00
  33. struct time_reg{
  34. u32 control; //0x04+i*0x10
  35. u32 load_reg; //0x08+i*0x10
  36. u32 res0; //0x0c+i*0x10
  37. u32 enable_reg; //0x10+i*0x10
  38. u32 reload_reg; //0x14 + i * 0x10
  39. u32 timer_value; //0x18 + i * 0x10
  40. u32 res1; //0x1c
  41. u32 interrupt_clr; //0x20
  42. u32 interrupt_mask; //0x24
  43. u32 res3[5];
  44. u32 watchdog_lock; //0x3c+i*0x40 watchdog use ONLY
  45. u32 res4; //0x40+i*0x40
  46. }timer[VIC_TIMER_NUM_MAX];
  47. };
  48. struct timer_int_arg{
  49. u32 id;
  50. void (*callback)(void *);
  51. void *arg;
  52. u32 wdog_reset;
  53. };
  54. /*
  55. * local functions
  56. */
  57. struct timer_regs *timer_driver_to_base(struct timer_driver *driver)
  58. {
  59. return (struct timer_regs *)driver->base;
  60. }
  61. static struct timer_driver g_timer_driver;
  62. void timer_int_enable(u32 id)
  63. {
  64. struct timer_driver *driver = &g_timer_driver;
  65. volatile struct timer_regs *base;
  66. base = timer_driver_to_base(driver);
  67. base->timer[id].interrupt_mask = 0;
  68. }
  69. void timer_int_disable(u32 id)
  70. {
  71. struct timer_driver *driver = &g_timer_driver;
  72. volatile struct timer_regs *base;
  73. base = timer_driver_to_base(driver);
  74. base->timer[id].interrupt_mask = 1;
  75. }
  76. void timer_disable(u32 id)
  77. {
  78. struct timer_driver *driver = &g_timer_driver;
  79. volatile struct timer_regs *base;
  80. base = timer_driver_to_base(driver);
  81. base->timer[id].enable_reg = 0;
  82. }
  83. int timer_is_timeout(u32 id)
  84. {
  85. struct timer_driver *driver = &g_timer_driver;
  86. volatile struct timer_regs *base;
  87. base = timer_driver_to_base(driver);
  88. //printf("addr = 0x%x,base[id].raw_int_status = 0x%x\r\n", &(base[id].raw_int_status), base[id].raw_int_status);
  89. return (base->interrupt_status == 1) ? true : false;
  90. }
  91. void timer_set_mode(u32 id,u32 run_mode)
  92. {
  93. struct timer_driver *driver = &g_timer_driver;
  94. volatile struct timer_regs *base;
  95. base = timer_driver_to_base(driver);
  96. base->timer[id].control = run_mode;
  97. }
  98. void timer_set_val(u32 id,u32 val)
  99. {
  100. struct timer_driver *driver = &g_timer_driver;
  101. volatile struct timer_regs *base;
  102. base = timer_driver_to_base(driver);
  103. base->timer[id].load_reg = val;
  104. }
  105. void timer_set_reload_val(u32 id,u32 val)
  106. {
  107. struct timer_driver *driver = &g_timer_driver;
  108. volatile struct timer_regs *base;
  109. base = timer_driver_to_base(driver);
  110. base->timer[id].reload_reg = val;
  111. }
  112. static struct timer_int_arg int_arg[VIC_TIMER_NUM_MAX];
  113. int timer_set(u32 id,struct timer_init_s *init)
  114. {
  115. u32 irq = 0;
  116. timer_disable(id);
  117. timer_set_mode(id,init->run_mode);
  118. timer_set_val(id,init->count);
  119. timer_int_disable(id);
  120. timer_set_reload_val(id, init->count);
  121. timestamp=0;
  122. timer_load_val=init->count;
  123. lastdec=timer_load_val;
  124. //_ENABLE_CLOCK_clk_wdtimer_apb_;
  125. switch (id){
  126. case 0:
  127. _ENABLE_CLOCK_clk_timer0_coreclk_;
  128. break;
  129. case 1:
  130. _ENABLE_CLOCK_clk_timer1_coreclk_;
  131. break;
  132. case 2:
  133. _ENABLE_CLOCK_clk_timer2_coreclk_;
  134. break;
  135. case 3:
  136. _ENABLE_CLOCK_clk_timer3_coreclk_;
  137. break;
  138. case 4:
  139. _ENABLE_CLOCK_clk_timer4_coreclk_;
  140. break;
  141. case 5:
  142. _ENABLE_CLOCK_clk_timer5_coreclk_;
  143. break;
  144. case 6:
  145. _ENABLE_CLOCK_clk_timer6_coreclk_;
  146. break;
  147. }
  148. timer_int_disable(id);
  149. //timer_int_disable(id);
  150. return 0;
  151. }
  152. void timer_enable(u32 id)
  153. {
  154. struct timer_driver *driver = &g_timer_driver;
  155. volatile struct timer_regs *base;
  156. base = timer_driver_to_base(driver);
  157. base->timer[id].enable_reg = 1;
  158. }
  159. /*
  160. * public functions
  161. */
  162. int timer_clr_int_status(u32 id)
  163. {
  164. struct timer_driver *driver = &g_timer_driver;
  165. volatile struct timer_regs *base;
  166. int clr;
  167. //printf("clr timer id = %d\r\n", id);
  168. base = timer_driver_to_base(driver);
  169. base->timer[id].interrupt_clr = 1;
  170. return clr;
  171. }
  172. u32 timer_get_val(u32 id)
  173. {
  174. struct timer_driver *driver = &g_timer_driver;
  175. volatile struct timer_regs *base;
  176. base = timer_driver_to_base(driver);
  177. return base->timer[id].timer_value;
  178. }
  179. int timer_stop(u32 id)
  180. {
  181. int irq;
  182. timer_int_disable(id);
  183. timer_disable(id);
  184. timer_clr_int_status(id);
  185. return 0;
  186. }
  187. int timer_start(u32 id)
  188. {
  189. timer_enable(id);
  190. return 0;
  191. }
  192. int timer_exit(void)
  193. {
  194. return 0;
  195. }
  196. int timer_init(int id)
  197. {
  198. struct timer_driver *driver = &g_timer_driver;
  199. struct timer_init_s timer_init_param;
  200. int reg_value;
  201. /* timer clk use apb clk */
  202. /* reset */
  203. driver->base = (void *)TIMER_BASE_ADDR;
  204. driver->freq = CONFIG_SYS_HZ_CLOCK;
  205. // _ASSERT_RESET_rstn_apb_timer_;
  206. // _CLEAR_RESET_rstn_apb_timer_;
  207. if(id == SOC_SYS_TIMER)/* start timer0 as system delay timer */
  208. {
  209. timer_init_param.int_en = 0;//0:interrupt disable 1:interrupt enable
  210. timer_init_param.run_mode = 0;//0:continuous 1:single
  211. timer_init_param.count = 0xffffffff;
  212. timer_init_param.one_shot = 0;
  213. timer_init_param.callback = NULL;
  214. timer_init_param.arg = NULL;
  215. //_SET_SYSCON_REG_SCFG_misc_ctrl1_timclken1(1);
  216. timer_set(id, &timer_init_param);
  217. timer_start(id);
  218. }
  219. else
  220. {
  221. timer_set(id, &timer_init_param);
  222. timer_start(id);
  223. }
  224. return 0;
  225. }
  226. u32 get_ticks(u32 tick_base)
  227. {
  228. u32 id = SOC_SYS_TIMER;
  229. u32 now = timer_get_val(id);
  230. //printf("time value = 0x%x\r\n",now);
  231. if (lastdec >= now) {
  232. /* normal mode */
  233. timestamp += lastdec - now;
  234. } else {
  235. /* we have an overflow ... */
  236. timestamp += lastdec + timer_load_val - now;
  237. }
  238. lastdec = now;
  239. return (u32)(timestamp-tick_base);
  240. }
  241. #endif
  242. #include "platform.h"
  243. unsigned long long get_ticks(void)
  244. {
  245. return readq(CLINT_CTRL_MTIME);
  246. }
  247. u32 get_timer(unsigned int base)
  248. {
  249. return lldiv(get_ticks(), TIMER_RATE_HZ) - base;
  250. }
  251. #if 0
  252. u32 usec_to_tick(u32 usec)
  253. {
  254. u32 value = usec*(timer_clk/1000000);
  255. //printf("value = 0x%x\r\n", value);
  256. return usec*(timer_clk/1000000);
  257. }
  258. int udelay(u32 usec)
  259. {
  260. UINT64 tmp;
  261. UINT64 tmo;
  262. tmo = usec_to_tick(usec);
  263. tmp = get_ticks(0) + tmo; /* get current timestamp */
  264. while (get_ticks(0) < tmp)/* loop till event */
  265. /*NOP*/
  266. {
  267. }
  268. return 0;
  269. }
  270. #endif
  271. u64 usec_to_tick(u64 usec)
  272. {
  273. u64 value;
  274. value = usec*(TIMER_CLK_HZ/1000)/1000;
  275. return value;
  276. }
  277. /* delay x useconds */
  278. int udelay(unsigned int usec)
  279. {
  280. unsigned long tmp;
  281. tmp = readq((volatile void *)CLINT_CTRL_MTIME) + usec_to_tick(usec); /* get current timestamp */
  282. while (readq((volatile void *)CLINT_CTRL_MTIME) < tmp);
  283. }
  284. void mdelay(unsigned int ms)
  285. {
  286. udelay(1000*ms);
  287. }
  288. void sdelay(unsigned int s)
  289. {
  290. mdelay(1000*s);
  291. }