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Godzil
/
sd2snes
mirror of
https://github.com/Godzil/sd2snes.git
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godzil_dev2
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cx4
develop
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godzil_dev
godzil_dev2
master
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sd2snes
/
verilog
Maximilian Rehkopf
d47858083a
FPGA/Cx4: update user constraints for changed system clock
12 years ago
..
sd2snes
2ef480f751
FPGA/DSPx: buffer register input
12 years ago
sd2snes_cx4
d47858083a
FPGA/Cx4: update user constraints for changed system clock
12 years ago
sd2snes_test
7109f9e030
FPGA: add SD clock pullup to test configuration
12 years ago
sd2sneslite
968c347986
FPGA/SPI: detect end of byte via MSB toggle instead of constant compare of async input
12 years ago