Godzil 1d928e7091 Merge branch 'udev' into develop пре 10 година
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address.v 1d928e7091 Merge branch 'udev' into develop пре 10 година
data.v b05c89cdbf FPGA: merge recent changes into sd2sneslite пре 12 година
dcm.v b05c89cdbf FPGA: merge recent changes into sd2sneslite пре 12 година
main.ucf a083d80ff9 FPGA: update clock speed to 88MHz пре 12 година
main.v 1d928e7091 Merge branch 'udev' into develop пре 10 година
mcu_cmd.v 3af05cef91 FPGA/sd2sneslite: add missing file mcu_cmd.v; remove avr_cmd.v пре 12 година
sd2sneslite.xise 1d928e7091 Merge branch 'udev' into develop пре 10 година
spi.v 968c347986 FPGA/SPI: detect end of byte via MSB toggle instead of constant compare of async input пре 12 година