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@@ -252,39 +252,36 @@ l2_disabled:
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lis r1,CONFIG_SYS_MONITOR_BASE@h
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mtspr IVPR,r1
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- lis r3,(CONFIG_SYS_MONITOR_BASE & 0xffff)@h
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- ori r3,r3,(CONFIG_SYS_MONITOR_BASE & 0xffff)@l
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-
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- addi r4,r3,CriticalInput - _start + _START_OFFSET
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+ li r4,CriticalInput@l
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mtspr IVOR0,r4 /* 0: Critical input */
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- addi r4,r3,MachineCheck - _start + _START_OFFSET
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+ li r4,MachineCheck@l
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mtspr IVOR1,r4 /* 1: Machine check */
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- addi r4,r3,DataStorage - _start + _START_OFFSET
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+ li r4,DataStorage@l
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mtspr IVOR2,r4 /* 2: Data storage */
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- addi r4,r3,InstStorage - _start + _START_OFFSET
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+ li r4,InstStorage@l
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mtspr IVOR3,r4 /* 3: Instruction storage */
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- addi r4,r3,ExtInterrupt - _start + _START_OFFSET
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+ li r4,ExtInterrupt@l
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mtspr IVOR4,r4 /* 4: External interrupt */
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- addi r4,r3,Alignment - _start + _START_OFFSET
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+ li r4,Alignment@l
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mtspr IVOR5,r4 /* 5: Alignment */
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- addi r4,r3,ProgramCheck - _start + _START_OFFSET
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+ li r4,ProgramCheck@l
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mtspr IVOR6,r4 /* 6: Program check */
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- addi r4,r3,FPUnavailable - _start + _START_OFFSET
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+ li r4,FPUnavailable@l
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mtspr IVOR7,r4 /* 7: floating point unavailable */
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- addi r4,r3,SystemCall - _start + _START_OFFSET
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+ li r4,SystemCall@l
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mtspr IVOR8,r4 /* 8: System call */
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/* 9: Auxiliary processor unavailable(unsupported) */
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- addi r4,r3,Decrementer - _start + _START_OFFSET
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+ li r4,Decrementer@l
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mtspr IVOR10,r4 /* 10: Decrementer */
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- addi r4,r3,IntervalTimer - _start + _START_OFFSET
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+ li r4,IntervalTimer@l
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mtspr IVOR11,r4 /* 11: Interval timer */
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- addi r4,r3,WatchdogTimer - _start + _START_OFFSET
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+ li r4,WatchdogTimer@l
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mtspr IVOR12,r4 /* 12: Watchdog timer */
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- addi r4,r3,DataTLBError - _start + _START_OFFSET
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+ li r4,DataTLBError@l
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mtspr IVOR13,r4 /* 13: Data TLB error */
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- addi r4,r3,InstructionTLBError - _start + _START_OFFSET
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+ li r4,InstructionTLBError@l
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mtspr IVOR14,r4 /* 14: Instruction TLB error */
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- addi r4,r3,DebugBreakpoint - _start + _START_OFFSET
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+ li r4,DebugBreakpoint@l
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mtspr IVOR15,r4 /* 15: Debug */
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#endif
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@@ -1121,7 +1118,7 @@ switch_as:
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/*--------------------------------------------------------------*/
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lis r3,CONFIG_SYS_MONITOR_BASE@h
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ori r3,r3,CONFIG_SYS_MONITOR_BASE@l
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- addi r3,r3,_start_cont - _start + _START_OFFSET
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+ addi r3,r3,_start_cont - _start
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mtlr r3
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blr
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#endif
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@@ -1165,7 +1162,6 @@ _start_cont:
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/* NOTREACHED - board_init_f() does not return */
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#ifndef MINIMAL_SPL
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- . = EXC_OFF_SYS_RESET
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.globl _start_of_vectors
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_start_of_vectors:
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@@ -1185,7 +1181,6 @@ _start_of_vectors:
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STD_EXCEPTION(0x0500, ExtInterrupt, ExtIntException)
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/* Alignment exception. */
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- . = 0x0600
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Alignment:
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EXCEPTION_PROLOG(SRR0, SRR1)
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mfspr r4,DAR
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@@ -1193,21 +1188,20 @@ Alignment:
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mfspr r5,DSISR
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stw r5,_DSISR(r21)
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addi r3,r1,STACK_FRAME_OVERHEAD
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- EXC_XFER_TEMPLATE(Alignment, AlignmentException, MSR_KERNEL, COPY_EE)
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+ EXC_XFER_TEMPLATE(0x600, Alignment, AlignmentException,
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+ MSR_KERNEL, COPY_EE)
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/* Program check exception */
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- . = 0x0700
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ProgramCheck:
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EXCEPTION_PROLOG(SRR0, SRR1)
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addi r3,r1,STACK_FRAME_OVERHEAD
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- EXC_XFER_TEMPLATE(ProgramCheck, ProgramCheckException,
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+ EXC_XFER_TEMPLATE(0x700, ProgramCheck, ProgramCheckException,
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MSR_KERNEL, COPY_EE)
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/* No FPU on MPC85xx. This exception is not supposed to happen.
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*/
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STD_EXCEPTION(0x0800, FPUnavailable, UnknownException)
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- . = 0x0900
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/*
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* r0 - SYSCALL number
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* r3-... arguments
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@@ -1293,32 +1287,22 @@ _end_of_vectors:
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* This code finishes saving the registers to the exception frame
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* and jumps to the appropriate handler for the exception.
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* Register r21 is pointer into trap frame, r1 has new stack pointer.
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+ * r23 is the address of the handler.
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*/
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.globl transfer_to_handler
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transfer_to_handler:
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- stw r22,_NIP(r21)
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- lis r22,MSR_POW@h
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- andc r23,r23,r22
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- stw r23,_MSR(r21)
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SAVE_GPR(7, r21)
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SAVE_4GPRS(8, r21)
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SAVE_8GPRS(12, r21)
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SAVE_8GPRS(24, r21)
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- mflr r23
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- andi. r24,r23,0x3f00 /* get vector offset */
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- stw r24,TRAP(r21)
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li r22,0
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stw r22,RESULT(r21)
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mtspr SPRG2,r22 /* r1 is now kernel sp */
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- lwz r24,0(r23) /* virtual address of handler */
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- lwz r23,4(r23) /* where to go when done */
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- mtspr SRR0,r24
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- mtspr SRR1,r20
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- mtlr r23
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- SYNC
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- rfi /* jump to handler, enable MMU */
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+ mtctr r23 /* virtual address of handler */
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+ mtmsr r20
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+ bctrl
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int_return:
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mfmsr r28 /* Disable interrupts */
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@@ -1728,7 +1712,7 @@ relocate_code:
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* initialization, now running from RAM.
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*/
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- addi r0,r10,in_ram - _start + _START_OFFSET
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+ addi r0,r10,in_ram - _start
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/*
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* As IVPR is going to point RAM address,
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@@ -1816,89 +1800,41 @@ clear_bss:
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*/
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.globl trap_init
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trap_init:
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- mflr r4 /* save link register */
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- GET_GOT
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- lwz r7,GOT(_start_of_vectors)
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- lwz r8,GOT(_end_of_vectors)
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-
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- li r9,0x100 /* reset vector always at 0x100 */
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-
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- cmplw 0,r7,r8
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- bgelr /* return if r7>=r8 - just in case */
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-1:
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- lwz r0,0(r7)
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- stw r0,0(r9)
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- addi r7,r7,4
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- addi r9,r9,4
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- cmplw 0,r7,r8
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- bne 1b
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+ /* Update IVORs as per relocation */
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+ mtspr IVPR,r3
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- /*
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- * relocate `hdlr' and `int_return' entries
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- */
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- li r7,.L_CriticalInput - _start + _START_OFFSET
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- bl trap_reloc
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- li r7,.L_MachineCheck - _start + _START_OFFSET
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- bl trap_reloc
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- li r7,.L_DataStorage - _start + _START_OFFSET
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- bl trap_reloc
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- li r7,.L_InstStorage - _start + _START_OFFSET
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- bl trap_reloc
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- li r7,.L_ExtInterrupt - _start + _START_OFFSET
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- bl trap_reloc
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- li r7,.L_Alignment - _start + _START_OFFSET
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- bl trap_reloc
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- li r7,.L_ProgramCheck - _start + _START_OFFSET
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- bl trap_reloc
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- li r7,.L_FPUnavailable - _start + _START_OFFSET
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- bl trap_reloc
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- li r7,.L_Decrementer - _start + _START_OFFSET
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- bl trap_reloc
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- li r7,.L_IntervalTimer - _start + _START_OFFSET
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- li r8,_end_of_vectors - _start + _START_OFFSET
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-2:
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- bl trap_reloc
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- addi r7,r7,0x100 /* next exception vector */
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- cmplw 0,r7,r8
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- blt 2b
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-
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- /* Update IVORs as per relocated vector table address */
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- li r7,0x0100
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- mtspr IVOR0,r7 /* 0: Critical input */
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- li r7,0x0200
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- mtspr IVOR1,r7 /* 1: Machine check */
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- li r7,0x0300
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- mtspr IVOR2,r7 /* 2: Data storage */
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- li r7,0x0400
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- mtspr IVOR3,r7 /* 3: Instruction storage */
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- li r7,0x0500
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- mtspr IVOR4,r7 /* 4: External interrupt */
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- li r7,0x0600
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- mtspr IVOR5,r7 /* 5: Alignment */
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- li r7,0x0700
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- mtspr IVOR6,r7 /* 6: Program check */
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- li r7,0x0800
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- mtspr IVOR7,r7 /* 7: floating point unavailable */
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- li r7,0x0900
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- mtspr IVOR8,r7 /* 8: System call */
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+ li r4,CriticalInput@l
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+ mtspr IVOR0,r4 /* 0: Critical input */
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+ li r4,MachineCheck@l
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+ mtspr IVOR1,r4 /* 1: Machine check */
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+ li r4,DataStorage@l
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+ mtspr IVOR2,r4 /* 2: Data storage */
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+ li r4,InstStorage@l
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+ mtspr IVOR3,r4 /* 3: Instruction storage */
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+ li r4,ExtInterrupt@l
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+ mtspr IVOR4,r4 /* 4: External interrupt */
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+ li r4,Alignment@l
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+ mtspr IVOR5,r4 /* 5: Alignment */
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+ li r4,ProgramCheck@l
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+ mtspr IVOR6,r4 /* 6: Program check */
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+ li r4,FPUnavailable@l
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+ mtspr IVOR7,r4 /* 7: floating point unavailable */
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+ li r4,SystemCall@l
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+ mtspr IVOR8,r4 /* 8: System call */
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/* 9: Auxiliary processor unavailable(unsupported) */
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- li r7,0x0a00
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- mtspr IVOR10,r7 /* 10: Decrementer */
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- li r7,0x0b00
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- mtspr IVOR11,r7 /* 11: Interval timer */
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- li r7,0x0c00
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- mtspr IVOR12,r7 /* 12: Watchdog timer */
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- li r7,0x0d00
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- mtspr IVOR13,r7 /* 13: Data TLB error */
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- li r7,0x0e00
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- mtspr IVOR14,r7 /* 14: Instruction TLB error */
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- li r7,0x0f00
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- mtspr IVOR15,r7 /* 15: Debug */
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-
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- lis r7,0x0
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- mtspr IVPR,r7
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-
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- mtlr r4 /* restore link register */
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+ li r4,Decrementer@l
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+ mtspr IVOR10,r4 /* 10: Decrementer */
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+ li r4,IntervalTimer@l
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+ mtspr IVOR11,r4 /* 11: Interval timer */
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+ li r4,WatchdogTimer@l
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+ mtspr IVOR12,r4 /* 12: Watchdog timer */
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+ li r4,DataTLBError@l
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+ mtspr IVOR13,r4 /* 13: Data TLB error */
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+ li r4,InstructionTLBError@l
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+ mtspr IVOR14,r4 /* 14: Instruction TLB error */
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+ li r4,DebugBreakpoint@l
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+ mtspr IVOR15,r4 /* 15: Debug */
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+
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blr
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.globl unlock_ram_in_cache
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