Makefile 1.3 KB

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  1. # SPDX-License-Identifier: GPL-2.0+
  2. #
  3. # Copyright (C) 2017 Andes Technology Corporation.
  4. # Rick Chen, Andes Technology Corporation <rick@andestech.com>
  5. ifeq ($(CONFIG_ARCH_RV64I),y)
  6. ARCH_BASE = rv64im
  7. ABI_BASE = lp64
  8. endif
  9. ifeq ($(CONFIG_ARCH_RV32I),y)
  10. ARCH_BASE = rv32im
  11. ABI_BASE = ilp32
  12. endif
  13. ifeq ($(CONFIG_RISCV_ISA_A),y)
  14. ARCH_A = a
  15. endif
  16. ifeq ($(CONFIG_RISCV_ISA_F),y)
  17. ARCH_F = f
  18. endif
  19. ifeq ($(CONFIG_RISCV_ISA_D),y)
  20. ARCH_D = d
  21. ABI_D = d
  22. endif
  23. ifeq ($(CONFIG_RISCV_ISA_C),y)
  24. ARCH_C = c
  25. endif
  26. ifeq ($(CONFIG_CMODEL_MEDLOW),y)
  27. CMODEL = medlow
  28. endif
  29. ifeq ($(CONFIG_CMODEL_MEDANY),y)
  30. CMODEL = medany
  31. endif
  32. RISCV_MARCH = $(ARCH_BASE)$(ARCH_A)$(ARCH_F)$(ARCH_D)$(ARCH_C)
  33. ABI = $(ABI_BASE)$(ABI_D)
  34. # Newer binutils versions default to ISA spec version 20191213 which moves some
  35. # instructions from the I extension to the Zicsr and Zifencei extensions.
  36. toolchain-need-zicsr-zifencei := $(call cc-option-yn, -mabi=$(ABI) -march=$(RISCV_MARCH)_zicsr_zifencei)
  37. ifeq ($(toolchain-need-zicsr-zifencei),y)
  38. RISCV_MARCH := $(RISCV_MARCH)_zicsr_zifencei
  39. endif
  40. ARCH_FLAGS = -march=$(RISCV_MARCH) -mabi=$(ABI) \
  41. -mcmodel=$(CMODEL)
  42. PLATFORM_CPPFLAGS += $(ARCH_FLAGS)
  43. CFLAGS_EFI += $(ARCH_FLAGS)
  44. head-y := arch/riscv/cpu/start.o
  45. libs-y += arch/riscv/cpu/
  46. libs-y += arch/riscv/cpu/$(CPU)/
  47. libs-y += arch/riscv/lib/