imx8mp-evk-u-boot.dtsi 1.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2019 NXP
  4. */
  5. / {
  6. wdt-reboot {
  7. compatible = "wdt-reboot";
  8. wdt = <&wdog1>;
  9. u-boot,dm-spl;
  10. };
  11. };
  12. &{/soc@0} {
  13. u-boot,dm-pre-reloc;
  14. u-boot,dm-spl;
  15. };
  16. &clk {
  17. u-boot,dm-spl;
  18. u-boot,dm-pre-reloc;
  19. };
  20. &osc_32k {
  21. u-boot,dm-spl;
  22. u-boot,dm-pre-reloc;
  23. };
  24. &osc_24m {
  25. u-boot,dm-spl;
  26. u-boot,dm-pre-reloc;
  27. };
  28. &aips1 {
  29. u-boot,dm-spl;
  30. u-boot,dm-pre-reloc;
  31. };
  32. &aips2 {
  33. u-boot,dm-spl;
  34. };
  35. &aips3 {
  36. u-boot,dm-spl;
  37. };
  38. &iomuxc {
  39. u-boot,dm-spl;
  40. };
  41. &reg_usdhc2_vmmc {
  42. u-boot,off-on-delay-us = <20000>;
  43. };
  44. &reg_usdhc2_vmmc {
  45. u-boot,dm-spl;
  46. };
  47. &pinctrl_uart2 {
  48. u-boot,dm-spl;
  49. };
  50. &pinctrl_usdhc2_gpio {
  51. u-boot,dm-spl;
  52. };
  53. &pinctrl_usdhc2 {
  54. u-boot,dm-spl;
  55. };
  56. &pinctrl_usdhc3 {
  57. u-boot,dm-spl;
  58. };
  59. &gpio1 {
  60. u-boot,dm-spl;
  61. };
  62. &gpio2 {
  63. u-boot,dm-spl;
  64. };
  65. &gpio3 {
  66. u-boot,dm-spl;
  67. };
  68. &gpio4 {
  69. u-boot,dm-spl;
  70. };
  71. &gpio5 {
  72. u-boot,dm-spl;
  73. };
  74. &uart2 {
  75. u-boot,dm-spl;
  76. };
  77. &i2c1 {
  78. u-boot,dm-spl;
  79. };
  80. &i2c2 {
  81. u-boot,dm-spl;
  82. };
  83. &i2c3 {
  84. u-boot,dm-spl;
  85. };
  86. &i2c4 {
  87. u-boot,dm-spl;
  88. };
  89. &i2c5 {
  90. u-boot,dm-spl;
  91. };
  92. &i2c6 {
  93. u-boot,dm-spl;
  94. };
  95. &usdhc1 {
  96. u-boot,dm-spl;
  97. };
  98. &usdhc2 {
  99. u-boot,dm-spl;
  100. sd-uhs-sdr104;
  101. sd-uhs-ddr50;
  102. };
  103. &usdhc3 {
  104. u-boot,dm-spl;
  105. mmc-hs400-1_8v;
  106. mmc-hs400-enhanced-strobe;
  107. };
  108. &wdog1 {
  109. u-boot,dm-spl;
  110. };
  111. &fec {
  112. phy-reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
  113. phy-reset-duration = <15>;
  114. phy-reset-post-delay = <100>;
  115. };