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- // SPDX-License-Identifier: GPL-2.0+
- /*
- * Copyright 2019 NXP
- */
- / {
- wdt-reboot {
- compatible = "wdt-reboot";
- wdt = <&wdog1>;
- u-boot,dm-spl;
- };
- };
- &{/soc@0} {
- u-boot,dm-pre-reloc;
- u-boot,dm-spl;
- };
- &clk {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
- };
- &osc_32k {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
- };
- &osc_24m {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
- };
- &aips1 {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
- };
- &aips2 {
- u-boot,dm-spl;
- };
- &aips3 {
- u-boot,dm-spl;
- };
- &iomuxc {
- u-boot,dm-spl;
- };
- ®_usdhc2_vmmc {
- u-boot,off-on-delay-us = <20000>;
- };
- ®_usdhc2_vmmc {
- u-boot,dm-spl;
- };
- &pinctrl_uart2 {
- u-boot,dm-spl;
- };
- &pinctrl_usdhc2_gpio {
- u-boot,dm-spl;
- };
- &pinctrl_usdhc2 {
- u-boot,dm-spl;
- };
- &pinctrl_usdhc3 {
- u-boot,dm-spl;
- };
- &gpio1 {
- u-boot,dm-spl;
- };
- &gpio2 {
- u-boot,dm-spl;
- };
- &gpio3 {
- u-boot,dm-spl;
- };
- &gpio4 {
- u-boot,dm-spl;
- };
- &gpio5 {
- u-boot,dm-spl;
- };
- &uart2 {
- u-boot,dm-spl;
- };
- &i2c1 {
- u-boot,dm-spl;
- };
- &i2c2 {
- u-boot,dm-spl;
- };
- &i2c3 {
- u-boot,dm-spl;
- };
- &i2c4 {
- u-boot,dm-spl;
- };
- &i2c5 {
- u-boot,dm-spl;
- };
- &i2c6 {
- u-boot,dm-spl;
- };
- &usdhc1 {
- u-boot,dm-spl;
- };
- &usdhc2 {
- u-boot,dm-spl;
- sd-uhs-sdr104;
- sd-uhs-ddr50;
- };
- &usdhc3 {
- u-boot,dm-spl;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- };
- &wdog1 {
- u-boot,dm-spl;
- };
- &fec {
- phy-reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
- phy-reset-duration = <15>;
- phy-reset-post-delay = <100>;
- };
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