|
@@ -0,0 +1,371 @@
|
|
|
+// SPDX-License-Identifier: GPL-2.0 OR MIT
|
|
|
+/*
|
|
|
+ * Copyright (C) 2022 StarFive Technology Co., Ltd.
|
|
|
+ */
|
|
|
+
|
|
|
+/dts-v1/;
|
|
|
+
|
|
|
+#include "jh7110.dtsi"
|
|
|
+#include <dt-bindings/pinctrl/pinctrl-starfive-jh7110.h>
|
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
|
+/ {
|
|
|
+ #address-cells = <2>;
|
|
|
+ #size-cells = <2>;
|
|
|
+ model = "StarFive JH7110 DevKits";
|
|
|
+ compatible = "starfive,jh7110";
|
|
|
+
|
|
|
+ aliases {
|
|
|
+ spi0="/soc/spi@13010000";
|
|
|
+ gpio0="/soc/gpio@13040000";
|
|
|
+ ethernet0=&gmac0;
|
|
|
+ ethernet1=&gmac1;
|
|
|
+ mmc0=&sdio0;
|
|
|
+ mmc1=&sdio1;
|
|
|
+ i2c5=&i2c5;
|
|
|
+ };
|
|
|
+
|
|
|
+ chosen {
|
|
|
+ stdout-path = "/soc/serial@10000000:115200";
|
|
|
+ starfive,boot-hart-id = <1>;
|
|
|
+ };
|
|
|
+
|
|
|
+
|
|
|
+ memory@80000000 {
|
|
|
+ device_type = "memory";
|
|
|
+ reg = <0x0 0x40000000 0x1 0x0>;
|
|
|
+ };
|
|
|
+
|
|
|
+ soc {
|
|
|
+ };
|
|
|
+
|
|
|
+ gpio-restart {
|
|
|
+ compatible = "gpio-restart";
|
|
|
+ gpios = <&gpio 35 GPIO_ACTIVE_HIGH>;
|
|
|
+ };
|
|
|
+};
|
|
|
+
|
|
|
+&cpu0 {
|
|
|
+ status = "okay";
|
|
|
+};
|
|
|
+
|
|
|
+&clkgen {
|
|
|
+ clocks = <&osc>, <&gmac1_rmii_refin>,
|
|
|
+ <&stg_apb>, <&gmac0_rmii_refin>;
|
|
|
+ clock-names = "osc", "gmac1_rmii_refin",
|
|
|
+ "stg_apb", "gmac0_rmii_refin";
|
|
|
+};
|
|
|
+
|
|
|
+&gpio {
|
|
|
+ status = "okay";
|
|
|
+ gpio-controller;
|
|
|
+
|
|
|
+ i2c2_pins: i2c2-0 {
|
|
|
+ i2c-pins {
|
|
|
+ pinmux = <GPIOMUX(3, GPOUT_LOW,
|
|
|
+ GPOEN_SYS_I2C2_CLK,
|
|
|
+ GPI_SYS_I2C2_CLK)>,
|
|
|
+ <GPIOMUX(2, GPOUT_LOW,
|
|
|
+ GPOEN_SYS_I2C2_DATA,
|
|
|
+ GPI_SYS_I2C2_DATA)>;
|
|
|
+ bias-disable; /* external pull-up */
|
|
|
+ input-enable;
|
|
|
+ input-schmitt-enable;
|
|
|
+ };
|
|
|
+ };
|
|
|
+
|
|
|
+ i2c5_pins: i2c5-0 {
|
|
|
+ i2c-pins {
|
|
|
+ pinmux = <GPIOMUX(19, GPOUT_LOW,
|
|
|
+ GPOEN_SYS_I2C5_CLK,
|
|
|
+ GPI_SYS_I2C5_CLK)>,
|
|
|
+ <GPIOMUX(20, GPOUT_LOW,
|
|
|
+ GPOEN_SYS_I2C5_DATA,
|
|
|
+ GPI_SYS_I2C5_DATA)>;
|
|
|
+ bias-disable; /* external pull-up */
|
|
|
+ input-enable;
|
|
|
+ input-schmitt-enable;
|
|
|
+ };
|
|
|
+ };
|
|
|
+
|
|
|
+ mmc0_pins: mmc0-pins {
|
|
|
+ mmc0-pins-rest {
|
|
|
+ pinmux = <GPIOMUX(22, GPOUT_SYS_SDIO0_RST,
|
|
|
+ GPOEN_ENABLE, GPI_NONE)>;
|
|
|
+ bias-pull-up;
|
|
|
+ drive-strength = <12>;
|
|
|
+ input-disable;
|
|
|
+ input-schmitt-disable;
|
|
|
+ slew-rate = <0>;
|
|
|
+ };
|
|
|
+ };
|
|
|
+
|
|
|
+ sdcard1_pins: sdcard1-pins {
|
|
|
+ sdcard1-pins0 {
|
|
|
+ pinmux = <GPIOMUX(10, GPOUT_SYS_SDIO1_CLK,
|
|
|
+ GPOEN_ENABLE, GPI_NONE)>;
|
|
|
+ bias-pull-up;
|
|
|
+ drive-strength = <12>;
|
|
|
+ input-disable;
|
|
|
+ input-schmitt-disable;
|
|
|
+ slew-rate = <0>;
|
|
|
+ };
|
|
|
+
|
|
|
+ sdcard1-pins1 {
|
|
|
+ pinmux = <GPIOMUX(9, GPOUT_SYS_SDIO1_CMD,
|
|
|
+ GPOEN_SYS_SDIO1_CMD, GPI_SYS_SDIO1_CMD)>;
|
|
|
+ bias-pull-up;
|
|
|
+ drive-strength = <12>;
|
|
|
+ input-enable;
|
|
|
+ input-schmitt-enable;
|
|
|
+ slew-rate = <0>;
|
|
|
+ };
|
|
|
+
|
|
|
+ sdcard1-pins2 {
|
|
|
+ pinmux = <GPIOMUX(11, GPOUT_SYS_SDIO1_DATA0,
|
|
|
+ GPOEN_SYS_SDIO1_DATA0, GPI_SYS_SDIO1_DATA0)>;
|
|
|
+ bias-pull-up;
|
|
|
+ drive-strength = <12>;
|
|
|
+ input-enable;
|
|
|
+ input-schmitt-enable;
|
|
|
+ slew-rate = <0>;
|
|
|
+ };
|
|
|
+
|
|
|
+ sdcard1-pins3 {
|
|
|
+ pinmux = <GPIOMUX(12, GPOUT_SYS_SDIO1_DATA1,
|
|
|
+ GPOEN_SYS_SDIO1_DATA1, GPI_SYS_SDIO1_DATA1)>;
|
|
|
+ bias-pull-up;
|
|
|
+ drive-strength = <12>;
|
|
|
+ input-enable;
|
|
|
+ input-schmitt-enable;
|
|
|
+ slew-rate = <0>;
|
|
|
+ };
|
|
|
+
|
|
|
+ sdcard1-pins4 {
|
|
|
+ pinmux = <GPIOMUX(7, GPOUT_SYS_SDIO1_DATA2,
|
|
|
+ GPOEN_SYS_SDIO1_DATA2, GPI_SYS_SDIO1_DATA2)>;
|
|
|
+ bias-pull-up;
|
|
|
+ drive-strength = <12>;
|
|
|
+ input-enable;
|
|
|
+ input-schmitt-enable;
|
|
|
+ slew-rate = <0>;
|
|
|
+ };
|
|
|
+
|
|
|
+ sdcard1-pins5 {
|
|
|
+ pinmux = <GPIOMUX(8, GPOUT_SYS_SDIO1_DATA3,
|
|
|
+ GPOEN_SYS_SDIO1_DATA3, GPI_SYS_SDIO1_DATA3)>;
|
|
|
+ bias-pull-up;
|
|
|
+ drive-strength = <12>;
|
|
|
+ input-enable;
|
|
|
+ input-schmitt-enable;
|
|
|
+ slew-rate = <0>;
|
|
|
+ };
|
|
|
+ };
|
|
|
+
|
|
|
+ hdmi_pins: hdmi-0 {
|
|
|
+ i2c-pins {
|
|
|
+ pinmux = <GPIOMUX(0, GPOUT_SYS_HDMI_DDC_SCL,
|
|
|
+ GPOEN_SYS_HDMI_DDC_SCL,
|
|
|
+ GPI_SYS_HDMI_DDC_SCL)>,
|
|
|
+ <GPIOMUX(1, GPOUT_SYS_HDMI_DDC_SDA,
|
|
|
+ GPOEN_SYS_HDMI_DDC_SDA,
|
|
|
+ GPI_SYS_HDMI_DDC_SDA)>;
|
|
|
+ bias-pull-up;
|
|
|
+ input-enable;
|
|
|
+ };
|
|
|
+
|
|
|
+ cec-pins {
|
|
|
+ pinmux = <GPIOMUX(14, GPOUT_SYS_HDMI_CEC_SDA,
|
|
|
+ GPOEN_SYS_HDMI_CEC_SDA,
|
|
|
+ GPI_SYS_HDMI_CEC_SDA)>;
|
|
|
+ bias-pull-up;
|
|
|
+ input-enable;
|
|
|
+ };
|
|
|
+
|
|
|
+ hpd-pins {
|
|
|
+ pinmux = <GPIOMUX(15, GPOUT_LOW,
|
|
|
+ GPOEN_DISABLE,
|
|
|
+ GPI_SYS_HDMI_HPD)>;
|
|
|
+ input-enable;
|
|
|
+ };
|
|
|
+ };
|
|
|
+};
|
|
|
+
|
|
|
+&i2c2 {
|
|
|
+ clock-frequency = <100000>;
|
|
|
+ i2c-sda-hold-time-ns = <300>;
|
|
|
+ i2c-sda-falling-time-ns = <510>;
|
|
|
+ i2c-scl-falling-time-ns = <510>;
|
|
|
+ auto_calc_scl_lhcnt;
|
|
|
+ pinctrl-names = "default";
|
|
|
+ pinctrl-0 = <&i2c2_pins>;
|
|
|
+ status = "okay";
|
|
|
+
|
|
|
+ seeed_panel: seeed_panel@45 {
|
|
|
+ compatible = "starfive,seeed";
|
|
|
+ reg = <0x45>;
|
|
|
+ sel-gpios = <&ext_gpio 5 GPIO_ACTIVE_LOW>;
|
|
|
+ };
|
|
|
+
|
|
|
+ lt8911exb_i2c@29 {
|
|
|
+ compatible = "lontium,lt8911exb";
|
|
|
+ reg = <0x29>;
|
|
|
+ reset-gpios = <&gpio 41 1>;
|
|
|
+ pwm-gpios = <&gpio 33 1>;
|
|
|
+ bl-gpios = <&ext_gpio 6 GPIO_ACTIVE_LOW>;
|
|
|
+
|
|
|
+ };
|
|
|
+};
|
|
|
+
|
|
|
+&i2c5 {
|
|
|
+ clock-frequency = <100000>;
|
|
|
+ i2c-sda-hold-time-ns = <300>;
|
|
|
+ i2c-sda-falling-time-ns = <510>;
|
|
|
+ i2c-scl-falling-time-ns = <510>;
|
|
|
+ pinctrl-names = "default";
|
|
|
+ pinctrl-0 = <&i2c5_pins>;
|
|
|
+ status = "okay";
|
|
|
+
|
|
|
+ pmic_axp15060: axp15060_reg@36 {
|
|
|
+ compatible = "stf,axp15060-regulator";
|
|
|
+ reg = <0x36>;
|
|
|
+ };
|
|
|
+
|
|
|
+ eeprom@50 {
|
|
|
+ compatible = "atmel,24c04";
|
|
|
+ reg = <0x50>;
|
|
|
+ pagesize = <16>;
|
|
|
+ };
|
|
|
+
|
|
|
+ ext_gpio: ext_gpio@74 {
|
|
|
+ compatible = "ti,tca9539";
|
|
|
+ reg = <0x74>;
|
|
|
+ gpio-controller;
|
|
|
+ #gpio-cells = <2>;
|
|
|
+ };
|
|
|
+};
|
|
|
+
|
|
|
+&sdio0 {
|
|
|
+ assigned-clocks = <&clkgen JH7110_SDIO0_CLK_SDCARD>;
|
|
|
+ assigned-clock-rates = <50000000>;
|
|
|
+ fifo-depth = <32>;
|
|
|
+ bus-width = <4>;
|
|
|
+ status = "okay";
|
|
|
+ pinctrl-names = "default";
|
|
|
+ pinctrl-0 = <&mmc0_pins>;
|
|
|
+};
|
|
|
+
|
|
|
+&sdio1 {
|
|
|
+ assigned-clocks = <&clkgen JH7110_SDIO1_CLK_SDCARD>;
|
|
|
+ assigned-clock-rates = <50000000>;
|
|
|
+ fifo-depth = <32>;
|
|
|
+ bus-width = <4>;
|
|
|
+ status = "okay";
|
|
|
+ pinctrl-names = "default";
|
|
|
+ pinctrl-0 = <&sdcard1_pins>;
|
|
|
+};
|
|
|
+
|
|
|
+&gmac0 {
|
|
|
+ status = "okay";
|
|
|
+ #address-cells = <1>;
|
|
|
+ #size-cells = <0>;
|
|
|
+ phy0: ethernet-phy@0 {
|
|
|
+ rxc_dly_en = <0>;
|
|
|
+ rx_delay_sel = <0xb>;
|
|
|
+ tx_delay_sel_fe = <5>;
|
|
|
+ tx_delay_sel = <0xa>;
|
|
|
+ tx_inverted_10 = <0x1>;
|
|
|
+ tx_inverted_100 = <0x1>;
|
|
|
+ tx_inverted_1000 = <0x1>;
|
|
|
+ };
|
|
|
+};
|
|
|
+
|
|
|
+&gmac1 {
|
|
|
+ status = "okay";
|
|
|
+ #address-cells = <1>;
|
|
|
+ #size-cells = <0>;
|
|
|
+ phy1: ethernet-phy@1 {
|
|
|
+ rgmii_sw_dr_2 = <0x0>;
|
|
|
+ rgmii_sw_dr = <0x3>;
|
|
|
+ rgmii_sw_dr_rxc = <0x7>;
|
|
|
+ tx_delay_sel_fe = <5>;
|
|
|
+ tx_delay_sel = <0>;
|
|
|
+ rxc_dly_en = <0>;
|
|
|
+ rx_delay_sel = <0x2>;
|
|
|
+ tx_inverted_10 = <0x1>;
|
|
|
+ tx_inverted_100 = <0x1>;
|
|
|
+ tx_inverted_1000 = <0x0>;
|
|
|
+ };
|
|
|
+};
|
|
|
+
|
|
|
+&uart0 {
|
|
|
+ reg-offset = <0>;
|
|
|
+ current-speed = <115200>;
|
|
|
+ status = "okay";
|
|
|
+};
|
|
|
+
|
|
|
+&gpioa {
|
|
|
+ status = "disabled";
|
|
|
+};
|
|
|
+
|
|
|
+&usbdrd30 {
|
|
|
+ clocks = <&clkgen JH7110_USB_125M>,
|
|
|
+ <&clkgen JH7110_USB0_CLK_APP_125>,
|
|
|
+ <&clkgen JH7110_USB0_CLK_LPM>,
|
|
|
+ <&clkgen JH7110_USB0_CLK_STB>,
|
|
|
+ <&clkgen JH7110_USB0_CLK_USB_APB>,
|
|
|
+ <&clkgen JH7110_USB0_CLK_AXI>,
|
|
|
+ <&clkgen JH7110_USB0_CLK_UTMI_APB>,
|
|
|
+ <&clkgen JH7110_PCIE0_CLK_APB>;
|
|
|
+ clock-names = "125m","app","lpm","stb","apb","axi","utmi", "phy";
|
|
|
+ resets = <&rstgen RSTN_U0_CDN_USB_PWRUP>,
|
|
|
+ <&rstgen RSTN_U0_CDN_USB_APB>,
|
|
|
+ <&rstgen RSTN_U0_CDN_USB_AXI>,
|
|
|
+ <&rstgen RSTN_U0_CDN_USB_UTMI_APB>,
|
|
|
+ <&rstgen RSTN_U0_PLDA_PCIE_APB>;
|
|
|
+ reset-names = "pwrup","apb","axi","utmi", "phy";
|
|
|
+ starfive,usb2-only = <0>;
|
|
|
+ status = "okay";
|
|
|
+};
|
|
|
+
|
|
|
+&usbdrd_cdns3 {
|
|
|
+ dr_mode = "unknown";
|
|
|
+ dr_num_mode = <1>;
|
|
|
+};
|
|
|
+
|
|
|
+&timer {
|
|
|
+ status = "disabled";
|
|
|
+};
|
|
|
+
|
|
|
+&wdog {
|
|
|
+ status = "disabled";
|
|
|
+};
|
|
|
+
|
|
|
+&clkvout {
|
|
|
+ status = "okay";
|
|
|
+};
|
|
|
+
|
|
|
+&pdm {
|
|
|
+ status = "disabled";
|
|
|
+};
|
|
|
+
|
|
|
+&dc8200 {
|
|
|
+ status = "okay";
|
|
|
+};
|
|
|
+&mipi_dsi0 {
|
|
|
+ status = "okay";
|
|
|
+ rockchip,panel = <&seeed_panel>;
|
|
|
+ data-lanes-num = <1>;
|
|
|
+ status = "okay";
|
|
|
+};
|
|
|
+
|
|
|
+&hdmi{
|
|
|
+ pinctrl-names = "default";
|
|
|
+ pinctrl-0 = <&hdmi_pins>;
|
|
|
+ status = "okay";
|
|
|
+};
|
|
|
+
|
|
|
+&pcie1 {
|
|
|
+ power-gpios = <&ext_gpio 0 GPIO_ACTIVE_HIGH>;
|
|
|
+ reset-gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
|
|
|
+ status = "okay";
|
|
|
+};
|