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riscv: dts: jh7110: Sync with Devkits repo

To be compatible with the Devkits board.
The code is ported from tag JH7110_DVK_515_v3.9.3 of Devkits repo.

Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Hal Feng 9 months ago
parent
commit
55255733cf
2 changed files with 47 additions and 13 deletions
  1. 8 0
      arch/riscv/dts/jh7110-u-boot.dtsi
  2. 39 13
      arch/riscv/dts/jh7110.dtsi

+ 8 - 0
arch/riscv/dts/jh7110-u-boot.dtsi

@@ -129,3 +129,11 @@
 &gmac0_rmii_refin {
 	u-boot,dm-spl;
 };
+
+&gpio {
+	u-boot,dm-spl;
+};
+
+&gpioa {
+	u-boot,dm-spl;
+};

+ 39 - 13
arch/riscv/dts/jh7110.dtsi

@@ -623,19 +623,6 @@
 			status = "disabled";
 		};
 
-		i2c6: i2c@12060000 {
-			compatible = "snps,designware-i2c";
-			reg = <0x0 0x12060000 0x0 0x10000>;
-			clocks = <&clkgen JH7110_I2C6_CLK_CORE>,
-				 <&clkgen JH7110_I2C6_CLK_APB>;
-			clock-names = "ref", "pclk";
-			resets = <&rstgen RSTN_U6_DW_I2C_APB>;
-			interrupts = <51>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			status = "disabled";
-		};
-
 		i2c0: i2c@10030000 {
 			compatible = "snps,designware-i2c";
 			reg = <0x0 0x10030000 0x0 0x10000>;
@@ -675,6 +662,32 @@
 			status = "disabled";
 		};
 
+		i2c3: i2c@12030000 {
+			compatible = "snps,designware-i2c";
+			reg = <0x0 0x12030000 0x0 0x10000>;
+			clocks = <&clkgen JH7110_I2C3_CLK_CORE>,
+				 <&clkgen JH7110_I2C3_CLK_APB>;
+			clock-names = "ref", "pclk";
+			resets = <&rstgen RSTN_U3_DW_I2C_APB>;
+			interrupts = <48>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c4: i2c@12040000 {
+			compatible = "snps,designware-i2c";
+			reg = <0x0 0x12040000 0x0 0x10000>;
+			clocks = <&clkgen JH7110_I2C4_CLK_CORE>,
+				 <&clkgen JH7110_I2C4_CLK_APB>;
+			clock-names = "ref", "pclk";
+			resets = <&rstgen RSTN_U4_DW_I2C_APB>;
+			interrupts = <49>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		i2c5: i2c@12050000 {
 			compatible = "snps,designware-i2c";
 			reg = <0x0 0x12050000 0x0 0x10000>;
@@ -688,6 +701,19 @@
 			status = "disabled";
 		};
 
+		i2c6: i2c@12060000 {
+			compatible = "snps,designware-i2c";
+			reg = <0x0 0x12060000 0x0 0x10000>;
+			clocks = <&clkgen JH7110_I2C6_CLK_CORE>,
+				 <&clkgen JH7110_I2C6_CLK_APB>;
+			clock-names = "ref", "pclk";
+			resets = <&rstgen RSTN_U6_DW_I2C_APB>;
+			interrupts = <51>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		/* unremovable emmc as mmcblk0 */
 		sdio0: sdio0@16010000 {
 			compatible = "snps,dw-mshc";