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@@ -159,12 +159,21 @@ static void dsi_phy_post_set_mode(void *priv_data, unsigned long mode_flags)
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CFG_L0_SWAP_SEL_SHIFT, CFG_L0_SWAP_SEL_MASK);//Lane setting
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sf_dphy_set_reg(priv->phy_reg, 0x1,
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CFG_L1_SWAP_SEL_SHIFT, CFG_L1_SWAP_SEL_MASK);
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+#if CONFIG_IS_ENABLED(TARGET_STARFIVE_EVB)
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sf_dphy_set_reg(priv->phy_reg, 0x4,
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CFG_L2_SWAP_SEL_SHIFT, CFG_L2_SWAP_SEL_MASK);
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sf_dphy_set_reg(priv->phy_reg, 0x2,
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CFG_L3_SWAP_SEL_SHIFT, CFG_L3_SWAP_SEL_MASK);
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sf_dphy_set_reg(priv->phy_reg, 0x3,
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CFG_L4_SWAP_SEL_SHIFT, CFG_L4_SWAP_SEL_MASK);
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+#else
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+ sf_dphy_set_reg(priv->phy_reg, 0x2,
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+ CFG_L2_SWAP_SEL_SHIFT, CFG_L2_SWAP_SEL_MASK);
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+ sf_dphy_set_reg(priv->phy_reg, 0x3,
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+ CFG_L3_SWAP_SEL_SHIFT, CFG_L3_SWAP_SEL_MASK);
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+ sf_dphy_set_reg(priv->phy_reg, 0x4,
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+ CFG_L4_SWAP_SEL_SHIFT, CFG_L4_SWAP_SEL_MASK);
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+#endif
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//PLL setting
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sf_dphy_set_reg(priv->phy_reg + 0x1c, 0x0,
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RG_CDTX_PLL_SSC_EN_SHIFT, RG_CDTX_PLL_SSC_EN_MASK);
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