vpuapi.c 114 KB

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  1. //SPDX-License-Identifier: LGPL-2.1 OR BSD-3-Clause
  2. /*
  3. * Copyright (c) 2019, Chips&Media
  4. * All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions are met:
  8. *
  9. * 1. Redistributions of source code must retain the above copyright notice, this
  10. * list of conditions and the following disclaimer.
  11. * 2. Redistributions in binary form must reproduce the above copyright notice,
  12. * this list of conditions and the following disclaimer in the documentation
  13. * and/or other materials provided with the distribution.
  14. *
  15. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  16. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  17. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  18. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
  19. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  20. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  21. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  22. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  23. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  24. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25. */
  26. #include "vpuapifunc.h"
  27. #include "product.h"
  28. #include "wave/wave5_regdefine.h"
  29. #include "wave/wave5.h"
  30. #include "misc/debug.h"
  31. #define W5_RET_DEC_DISPLAY_SIZE (W5_REG_BASE + 0x01D8) // [FIX ME] delete ? or not?
  32. #define INVALID_CORE_INDEX_RETURN_ERROR(_coreIdx) \
  33. if (_coreIdx >= MAX_NUM_VPU_CORE) \
  34. return -1;
  35. static const Uint16* s_pusBitCode[MAX_NUM_VPU_CORE] = {NULL,};
  36. static int s_bitCodeSize[MAX_NUM_VPU_CORE] = {0,};
  37. Uint32 __VPU_BUSY_TIMEOUT = VPU_BUSY_CHECK_TIMEOUT;
  38. static RetCode CheckDecInstanceValidity(CodecInst* pCodecInst)
  39. {
  40. RetCode ret;
  41. if (pCodecInst == NULL)
  42. return RETCODE_INVALID_HANDLE;
  43. ret = CheckInstanceValidity(pCodecInst);
  44. if (ret != RETCODE_SUCCESS) {
  45. return RETCODE_INVALID_HANDLE;
  46. }
  47. if (!pCodecInst->inUse) {
  48. return RETCODE_INVALID_HANDLE;
  49. }
  50. return ProductVpuDecCheckCapability(pCodecInst);
  51. }
  52. Int32 VPU_IsInit(Uint32 coreIdx)
  53. {
  54. Int32 pc;
  55. INVALID_CORE_INDEX_RETURN_ERROR(coreIdx);
  56. pc = ProductVpuIsInit(coreIdx);
  57. return pc;
  58. }
  59. Int32 VPU_WaitInterrupt(Uint32 coreIdx, int timeout)
  60. {
  61. Int32 ret;
  62. CodecInst* instance;
  63. INVALID_CORE_INDEX_RETURN_ERROR(coreIdx);
  64. if ((instance=GetPendingInst(coreIdx)) != NULL) {
  65. ret = ProductVpuWaitInterrupt(instance, timeout);
  66. }
  67. else {
  68. ret = -1;
  69. }
  70. return ret;
  71. }
  72. Int32 VPU_WaitInterruptEx(VpuHandle handle, int timeout)
  73. {
  74. Int32 ret;
  75. CodecInst *pCodecInst;
  76. pCodecInst = handle;
  77. INVALID_CORE_INDEX_RETURN_ERROR(pCodecInst->coreIdx);
  78. ret = ProductVpuWaitInterrupt(pCodecInst, timeout);
  79. return ret;
  80. }
  81. void VPU_ClearInterrupt(Uint32 coreIdx)
  82. {
  83. /* clear all interrupt flags */
  84. ProductVpuClearInterrupt(coreIdx, 0xffff);
  85. }
  86. void VPU_ClearInterruptEx(VpuHandle handle, Int32 intrFlag)
  87. {
  88. CodecInst *pCodecInst;
  89. pCodecInst = handle;
  90. ProductVpuClearInterrupt(pCodecInst->coreIdx, intrFlag);
  91. }
  92. int VPU_GetFrameBufSize(VpuHandle handle, int coreIdx, int stride, int height, int mapType, int format, int interleave, DRAMConfig *pDramCfg)
  93. {
  94. int productId;
  95. CodecInst *pCodecInst;
  96. pCodecInst = handle;
  97. UNREFERENCED_PARAMETER(interleave); /*!<< for backward compatiblity */
  98. if (coreIdx < 0 || coreIdx >= MAX_NUM_VPU_CORE)
  99. return -1;
  100. productId = ProductVpuGetId(coreIdx);
  101. return ProductCalculateFrameBufSize(pCodecInst, productId, stride, height, (TiledMapType)mapType, (FrameBufferFormat)format, (BOOL)interleave, pDramCfg);
  102. }
  103. int VPU_GetProductId(int coreIdx)
  104. {
  105. Int32 productId;
  106. INVALID_CORE_INDEX_RETURN_ERROR(coreIdx);
  107. if ((productId=ProductVpuGetId(coreIdx)) != PRODUCT_ID_NONE) {
  108. return productId;
  109. }
  110. if (vdi_init(coreIdx) < 0)
  111. return -1;
  112. EnterLock(coreIdx);
  113. if (ProductVpuScan(coreIdx) == FALSE)
  114. productId = -1;
  115. else
  116. productId = ProductVpuGetId(coreIdx);
  117. LeaveLock((coreIdx));
  118. vdi_release(coreIdx);
  119. return productId;
  120. }
  121. int VPU_GetOpenInstanceNum(Uint32 coreIdx)
  122. {
  123. INVALID_CORE_INDEX_RETURN_ERROR(coreIdx);
  124. return vdi_get_instance_num(coreIdx);
  125. }
  126. static RetCode InitializeVPU(Uint32 coreIdx, const Uint16* code, Uint32 size)
  127. {
  128. RetCode ret;
  129. if (vdi_init(coreIdx) < 0)
  130. return RETCODE_FAILURE;
  131. EnterLock(coreIdx);
  132. if (vdi_get_instance_num(coreIdx) > 0) {
  133. if (ProductVpuScan(coreIdx) == 0) {
  134. LeaveLock(coreIdx);
  135. return RETCODE_NOT_FOUND_VPU_DEVICE;
  136. }
  137. }
  138. /* force to reset vpu, so that the vpu in a clean state */
  139. if (VPU_IsInit(coreIdx) != 0) {
  140. ProductVpuReInit(coreIdx, (void *)code, size);
  141. LeaveLock(coreIdx);
  142. return RETCODE_CALLED_BEFORE;
  143. }
  144. InitCodecInstancePool(coreIdx);
  145. ret = ProductVpuReset(coreIdx, SW_RESET_ON_BOOT);
  146. if (ret != RETCODE_SUCCESS) {
  147. LeaveLock(coreIdx);
  148. return ret;
  149. }
  150. #if defined(SUPPORT_SW_UART) || defined(SUPPORT_SW_UART_V2)
  151. create_sw_uart_thread(coreIdx);
  152. usleep(500*1000);
  153. #endif
  154. ret = ProductVpuInit(coreIdx, (void*)code, size);
  155. if (ret != RETCODE_SUCCESS) {
  156. LeaveLock(coreIdx);
  157. return ret;
  158. }
  159. LeaveLock(coreIdx);
  160. return RETCODE_SUCCESS;
  161. }
  162. RetCode VPU_Init(Uint32 coreIdx)
  163. {
  164. if (coreIdx >= MAX_NUM_VPU_CORE)
  165. return RETCODE_INVALID_PARAM;
  166. if (s_bitCodeSize[coreIdx] == 0)
  167. return RETCODE_NOT_FOUND_BITCODE_PATH;
  168. return InitializeVPU(coreIdx, s_pusBitCode[coreIdx], s_bitCodeSize[coreIdx]);
  169. }
  170. RetCode VPU_InitWithBitcode(Uint32 coreIdx, const Uint16* code, Uint32 size)
  171. {
  172. if (coreIdx >= MAX_NUM_VPU_CORE)
  173. return RETCODE_INVALID_PARAM;
  174. if (code == NULL || size == 0)
  175. return RETCODE_INVALID_PARAM;
  176. s_pusBitCode[coreIdx] = NULL;
  177. s_pusBitCode[coreIdx] = (Uint16 *)osal_malloc(size*sizeof(Uint16));
  178. if (!s_pusBitCode[coreIdx])
  179. return RETCODE_INSUFFICIENT_RESOURCE;
  180. osal_memcpy((void *)s_pusBitCode[coreIdx], (const void *)code, size*sizeof(Uint16));
  181. s_bitCodeSize[coreIdx] = size;
  182. return InitializeVPU(coreIdx, code, size);
  183. }
  184. RetCode VPU_DeInit(Uint32 coreIdx)
  185. {
  186. int ret;
  187. if (coreIdx >= MAX_NUM_VPU_CORE)
  188. return RETCODE_INVALID_PARAM;
  189. EnterLock(coreIdx);
  190. if (s_pusBitCode[coreIdx]) {
  191. osal_free((void *)s_pusBitCode[coreIdx]);
  192. }
  193. s_pusBitCode[coreIdx] = NULL;
  194. s_bitCodeSize[coreIdx] = 0;
  195. LeaveLock(coreIdx);
  196. #if defined(SUPPORT_SW_UART) || defined(SUPPORT_SW_UART_V2)
  197. destory_sw_uart_thread();
  198. #endif
  199. ret = vdi_release(coreIdx);
  200. if (ret != 0)
  201. return RETCODE_FAILURE;
  202. return RETCODE_SUCCESS;
  203. }
  204. RetCode VPU_GetVersionInfo(Uint32 coreIdx, Uint32 *versionInfo, Uint32 *revision, Uint32 *productId)
  205. {
  206. RetCode ret;
  207. if (coreIdx >= MAX_NUM_VPU_CORE)
  208. return RETCODE_INVALID_PARAM;
  209. EnterLock(coreIdx);
  210. if (ProductVpuIsInit(coreIdx) == 0) {
  211. LeaveLock(coreIdx);
  212. return RETCODE_NOT_INITIALIZED;
  213. }
  214. if (GetPendingInst(coreIdx)) {
  215. LeaveLock(coreIdx);
  216. return RETCODE_FRAME_NOT_COMPLETE;
  217. }
  218. if (productId != NULL) {
  219. *productId = ProductVpuGetId(coreIdx);
  220. }
  221. ret = ProductVpuGetVersion(coreIdx, versionInfo, revision);
  222. LeaveLock(coreIdx);
  223. return ret;
  224. }
  225. RetCode VPU_GetProductInfo(Uint32 coreIdx, VpuAttr *productInfo)
  226. {
  227. RetCode ret;
  228. if (coreIdx >= MAX_NUM_VPU_CORE)
  229. return RETCODE_INVALID_PARAM;
  230. EnterLock(coreIdx);
  231. if (ProductVpuIsInit(coreIdx) == 0) {
  232. LeaveLock(coreIdx);
  233. return RETCODE_NOT_INITIALIZED;
  234. }
  235. if (GetPendingInst(coreIdx)) {
  236. LeaveLock(coreIdx);
  237. return RETCODE_FRAME_NOT_COMPLETE;
  238. }
  239. productInfo->productId = ProductVpuGetId(coreIdx);
  240. ret = ProductVpuGetProductInfo(coreIdx, productInfo);
  241. LeaveLock(coreIdx);
  242. return ret;
  243. }
  244. RetCode VPU_DecOpen(DecHandle* pHandle, DecOpenParam* pop)
  245. {
  246. CodecInst * pCodecInst;
  247. DecInfo* pDecInfo;
  248. RetCode ret;
  249. ret = ProductCheckDecOpenParam(pop);
  250. if (ret != RETCODE_SUCCESS)
  251. return ret;
  252. EnterLock(pop->coreIdx);
  253. if (VPU_IsInit(pop->coreIdx) == 0) {
  254. LeaveLock(pop->coreIdx);
  255. return RETCODE_NOT_INITIALIZED;
  256. }
  257. ret = GetCodecInstance(pop->coreIdx, &pCodecInst);
  258. if (ret != RETCODE_SUCCESS)
  259. {
  260. *pHandle = 0;
  261. LeaveLock(pop->coreIdx);
  262. return ret;
  263. }
  264. pCodecInst->isDecoder = TRUE;
  265. *pHandle = pCodecInst;
  266. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  267. osal_memset(pDecInfo, 0x00, sizeof(DecInfo));
  268. osal_memcpy((void*)&pDecInfo->openParam, pop, sizeof(DecOpenParam));
  269. if (pop->bitstreamFormat == STD_MPEG4) {
  270. pCodecInst->codecMode = MP4_DEC;
  271. pCodecInst->codecModeAux = MP4_AUX_MPEG4;
  272. }
  273. else if (pop->bitstreamFormat == STD_AVC) {
  274. if (pCodecInst->productId == PRODUCT_ID_521 || pCodecInst->productId == PRODUCT_ID_511 || pCodecInst->productId == PRODUCT_ID_517) {
  275. pCodecInst->codecMode = W_AVC_DEC;
  276. }
  277. else {
  278. pCodecInst->codecMode = AVC_DEC;
  279. pCodecInst->codecModeAux = pop->avcExtension;
  280. }
  281. }
  282. else if (pop->bitstreamFormat == STD_VC1) {
  283. pCodecInst->codecMode = VC1_DEC;
  284. }
  285. else if (pop->bitstreamFormat == STD_MPEG2) {
  286. pCodecInst->codecMode = MP2_DEC;
  287. }
  288. else if (pop->bitstreamFormat == STD_H263) {
  289. pCodecInst->codecMode = MP4_DEC;
  290. pCodecInst->codecModeAux = MP4_AUX_MPEG4;
  291. }
  292. else if (pop->bitstreamFormat == STD_DIV3) {
  293. pCodecInst->codecMode = DV3_DEC;
  294. pCodecInst->codecModeAux = MP4_AUX_DIVX3;
  295. }
  296. else if (pop->bitstreamFormat == STD_RV) {
  297. pCodecInst->codecMode = RV_DEC;
  298. }
  299. else if (pop->bitstreamFormat == STD_AVS) {
  300. pCodecInst->codecMode = AVS_DEC;
  301. }
  302. else if (pop->bitstreamFormat == STD_THO) {
  303. pCodecInst->codecMode = VPX_DEC;
  304. pCodecInst->codecModeAux = VPX_AUX_THO;
  305. }
  306. else if (pop->bitstreamFormat == STD_VP3) {
  307. pCodecInst->codecMode = VPX_DEC;
  308. pCodecInst->codecModeAux = VPX_AUX_THO;
  309. }
  310. else if (pop->bitstreamFormat == STD_VP8) {
  311. pCodecInst->codecMode = VPX_DEC;
  312. pCodecInst->codecModeAux = VPX_AUX_VP8;
  313. }
  314. else if (pop->bitstreamFormat == STD_HEVC) {
  315. pCodecInst->codecMode = W_HEVC_DEC;
  316. }
  317. else if (pop->bitstreamFormat == STD_VP9) {
  318. pCodecInst->codecMode = W_VP9_DEC;
  319. }
  320. else if (pop->bitstreamFormat == STD_AVS2) {
  321. pCodecInst->codecMode = W_AVS2_DEC;
  322. }
  323. else if (pop->bitstreamFormat == STD_SVAC) {
  324. pCodecInst->codecMode = W_SVAC_DEC;
  325. }
  326. else if (pop->bitstreamFormat == STD_AV1) {
  327. pCodecInst->codecMode = W_AV1_DEC;
  328. }
  329. else {
  330. LeaveLock(pop->coreIdx);
  331. return RETCODE_INVALID_PARAM;
  332. }
  333. pDecInfo->wtlEnable = pop->wtlEnable;
  334. pDecInfo->wtlMode = pop->wtlMode;
  335. if (!pDecInfo->wtlEnable)
  336. pDecInfo->wtlMode = 0;
  337. pDecInfo->streamWrPtr = pop->bitstreamBuffer;
  338. pDecInfo->streamRdPtr = pop->bitstreamBuffer;
  339. pDecInfo->frameDelay = -1;
  340. pDecInfo->streamBufStartAddr = pop->bitstreamBuffer;
  341. pDecInfo->streamBufSize = pop->bitstreamBufferSize;
  342. pDecInfo->streamBufEndAddr = pop->bitstreamBuffer + pop->bitstreamBufferSize;
  343. pDecInfo->reorderEnable = VPU_REORDER_ENABLE;
  344. pDecInfo->mirrorDirection = MIRDIR_NONE;
  345. pDecInfo->prevFrameEndPos = pop->bitstreamBuffer;
  346. pDecInfo->tempIdSelectMode = pop->tempIdSelectMode;
  347. pDecInfo->targetSubLayerId = DECODE_ALL_TEMPORAL_LAYERS;
  348. pDecInfo->relTargetLayerId = 0;
  349. if ((ret=ProductVpuDecBuildUpOpenParam(pCodecInst, pop)) != RETCODE_SUCCESS) {
  350. *pHandle = 0;
  351. LeaveLock(pCodecInst->coreIdx);
  352. return ret;
  353. }
  354. pDecInfo->tiled2LinearEnable = pop->tiled2LinearEnable;
  355. pDecInfo->tiled2LinearMode = pop->tiled2LinearMode;
  356. if (!pDecInfo->tiled2LinearEnable)
  357. pDecInfo->tiled2LinearMode = 0; //coda980 only
  358. if (!pDecInfo->wtlEnable) //coda980, wave320, wave410 only
  359. pDecInfo->wtlMode = 0;
  360. osal_memset((void*)&pDecInfo->cacheConfig, 0x00, sizeof(MaverickCacheConfig));
  361. LeaveLock(pCodecInst->coreIdx);
  362. return RETCODE_SUCCESS;
  363. }
  364. RetCode VPU_DecClose(DecHandle handle)
  365. {
  366. CodecInst * pCodecInst;
  367. DecInfo * pDecInfo;
  368. RetCode ret;
  369. int i;
  370. ret = CheckDecInstanceValidity(handle);
  371. if (ret != RETCODE_SUCCESS) {
  372. return ret;
  373. }
  374. pCodecInst = handle;
  375. if (!pCodecInst) {
  376. return RETCODE_INVALID_HANDLE;
  377. }
  378. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  379. EnterLock(pCodecInst->coreIdx);
  380. if ((ret=ProductVpuDecFiniSeq(pCodecInst)) != RETCODE_SUCCESS) {
  381. if (pCodecInst->loggingEnable)
  382. vdi_log(pCodecInst->coreIdx, DEC_SEQ_END, 2);
  383. if (ret == RETCODE_VPU_STILL_RUNNING) {
  384. LeaveLock(pCodecInst->coreIdx);
  385. return ret;
  386. }
  387. }
  388. if (pCodecInst->loggingEnable)
  389. vdi_log(pCodecInst->coreIdx, DEC_SEQ_END, 0);
  390. if (pDecInfo->vbSlice.size)
  391. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbSlice, DEC_ETC, pCodecInst->instIndex);
  392. if (pDecInfo->vbWork.size) {
  393. if (pDecInfo->workBufferAllocExt == 0) {
  394. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbWork, DEC_WORK, pCodecInst->instIndex);
  395. }
  396. else {
  397. vdi_dettach_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbWork);
  398. }
  399. }
  400. if (pDecInfo->vbFrame.size) {
  401. if (pDecInfo->frameAllocExt == 0) {
  402. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFrame, DEC_ETC, pCodecInst->instIndex);
  403. }
  404. }
  405. for ( i=0 ; i<MAX_REG_FRAME; i++) {
  406. if (pDecInfo->vbMV[i].size)
  407. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbMV[i], DEC_MV, pCodecInst->instIndex);
  408. if (pDecInfo->vbFbcYTbl[i].size)
  409. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcYTbl[i], DEC_FBCY_TBL, pCodecInst->instIndex);
  410. if (pDecInfo->vbFbcCTbl[i].size)
  411. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcCTbl[i], DEC_FBCC_TBL, pCodecInst->instIndex);
  412. }
  413. if (pDecInfo->vbTemp.size)
  414. vdi_dettach_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbTemp);
  415. if (pDecInfo->vbPPU.size) {
  416. if (pDecInfo->ppuAllocExt == 0)
  417. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbPPU, DEC_ETC, pCodecInst->instIndex);
  418. }
  419. if (pDecInfo->vbWTL.size)
  420. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbWTL, DEC_FB_LINEAR, pCodecInst->instIndex);
  421. if (pDecInfo->vbUserData.size)
  422. vdi_dettach_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbUserData);
  423. if (pDecInfo->vbReport.size)
  424. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbReport, DEC_ETC, pCodecInst->instIndex);
  425. if (pDecInfo->vbTask.size)
  426. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbTask, DEC_TASK, pCodecInst->instIndex);
  427. if (GetPendingInst(pCodecInst->coreIdx) == pCodecInst)
  428. ClearPendingInst(pCodecInst->coreIdx);
  429. LeaveLock(pCodecInst->coreIdx);
  430. FreeCodecInstance(pCodecInst);
  431. return ret;
  432. }
  433. RetCode VPU_DecSetEscSeqInit(DecHandle handle, int escape)
  434. {
  435. CodecInst * pCodecInst;
  436. DecInfo * pDecInfo;
  437. RetCode ret;
  438. ret = CheckDecInstanceValidity(handle);
  439. if (ret != RETCODE_SUCCESS)
  440. return ret;
  441. pCodecInst = handle;
  442. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  443. if (pDecInfo->openParam.bitstreamMode != BS_MODE_INTERRUPT)
  444. return RETCODE_INVALID_PARAM;
  445. pDecInfo->seqInitEscape = escape;
  446. return RETCODE_SUCCESS;
  447. }
  448. RetCode VPU_DecGetInitialInfo(DecHandle handle, DecInitialInfo* info)
  449. {
  450. CodecInst* pCodecInst;
  451. DecInfo* pDecInfo;
  452. RetCode ret;
  453. Int32 flags;
  454. Uint32 interruptBit;
  455. VpuAttr* pAttr;
  456. if (PRODUCT_ID_W_SERIES(handle->productId)) {
  457. if (handle->productId == PRODUCT_ID_512 || handle->productId == PRODUCT_ID_515 || handle->productId == PRODUCT_ID_517 || handle->productId == PRODUCT_ID_521 || handle->productId == PRODUCT_ID_511) {
  458. interruptBit = INT_WAVE5_INIT_SEQ;
  459. }
  460. else
  461. return RETCODE_INVALID_PARAM;
  462. }
  463. else {
  464. /* CODA9xx */
  465. interruptBit = INT_BIT_SEQ_INIT;
  466. }
  467. ret = CheckDecInstanceValidity(handle);
  468. if (ret != RETCODE_SUCCESS)
  469. return ret;
  470. if (info == NULL)
  471. return RETCODE_INVALID_PARAM;
  472. pCodecInst = handle;
  473. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  474. ret = ProductVpuDecCheckCapability(pCodecInst);
  475. if (ret != RETCODE_SUCCESS)
  476. return ret;
  477. EnterLock(pCodecInst->coreIdx);
  478. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  479. if (GetPendingInst(pCodecInst->coreIdx)) {
  480. /* The other instance is running */
  481. LeaveLock(pCodecInst->coreIdx);
  482. return RETCODE_FRAME_NOT_COMPLETE;
  483. }
  484. if (DecBitstreamBufEmpty(pDecInfo)) {
  485. LeaveLock(pCodecInst->coreIdx);
  486. return RETCODE_WRONG_CALL_SEQUENCE;
  487. }
  488. ret = ProductVpuDecInitSeq(handle);
  489. if (ret != RETCODE_SUCCESS) {
  490. LeaveLock(pCodecInst->coreIdx);
  491. return ret;
  492. }
  493. if (pAttr->supportCommandQueue == TRUE) {
  494. LeaveLock(pCodecInst->coreIdx);
  495. }
  496. flags = ProductVpuWaitInterrupt(pCodecInst, __VPU_BUSY_TIMEOUT);
  497. if (pAttr->supportCommandQueue == TRUE) {
  498. EnterLock(pCodecInst->coreIdx);
  499. }
  500. if (flags == -1) {
  501. info->rdPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr);
  502. info->wrPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamWrPtrRegAddr);
  503. ret = RETCODE_VPU_RESPONSE_TIMEOUT;
  504. }
  505. else {
  506. if (flags&(1<<interruptBit))
  507. ProductVpuClearInterrupt(pCodecInst->coreIdx, (1<<interruptBit));
  508. if (flags != (1<<interruptBit))
  509. ret = RETCODE_FAILURE;
  510. else
  511. ret = ProductVpuDecGetSeqInfo(handle, info);
  512. }
  513. info->rdPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr);
  514. info->wrPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamWrPtrRegAddr);
  515. pDecInfo->initialInfo = *info;
  516. if (ret == RETCODE_SUCCESS) {
  517. pDecInfo->initialInfoObtained = 1;
  518. }
  519. SetPendingInst(pCodecInst->coreIdx, 0);
  520. LeaveLock(pCodecInst->coreIdx);
  521. return ret;
  522. }
  523. RetCode VPU_DecIssueSeqInit(DecHandle handle)
  524. {
  525. CodecInst* pCodecInst;
  526. RetCode ret;
  527. VpuAttr* pAttr;
  528. ret = CheckDecInstanceValidity(handle);
  529. if (ret != RETCODE_SUCCESS)
  530. return ret;
  531. pCodecInst = handle;
  532. EnterLock(pCodecInst->coreIdx);
  533. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  534. if (GetPendingInst(pCodecInst->coreIdx)) {
  535. LeaveLock(pCodecInst->coreIdx);
  536. return RETCODE_FRAME_NOT_COMPLETE;
  537. }
  538. ret = ProductVpuDecInitSeq(handle);
  539. if (ret == RETCODE_SUCCESS) {
  540. SetPendingInst(pCodecInst->coreIdx, pCodecInst);
  541. }
  542. if (pAttr->supportCommandQueue == TRUE) {
  543. SetPendingInst(pCodecInst->coreIdx, NULL);
  544. LeaveLock(pCodecInst->coreIdx);
  545. }
  546. return ret;
  547. }
  548. RetCode VPU_DecCompleteSeqInit(DecHandle handle, DecInitialInfo * info)
  549. {
  550. CodecInst* pCodecInst;
  551. DecInfo* pDecInfo;
  552. RetCode ret;
  553. VpuAttr* pAttr;
  554. ret = CheckDecInstanceValidity(handle);
  555. if (ret != RETCODE_SUCCESS) {
  556. return ret;
  557. }
  558. if (info == 0) {
  559. return RETCODE_INVALID_PARAM;
  560. }
  561. pCodecInst = handle;
  562. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  563. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  564. if (pAttr->supportCommandQueue == TRUE) {
  565. EnterLock(pCodecInst->coreIdx);
  566. }
  567. else {
  568. if (pCodecInst != GetPendingInst(pCodecInst->coreIdx)) {
  569. SetPendingInst(pCodecInst->coreIdx, 0);
  570. LeaveLock(pCodecInst->coreIdx);
  571. return RETCODE_WRONG_CALL_SEQUENCE;
  572. }
  573. }
  574. ret = ProductVpuDecGetSeqInfo(handle, info);
  575. if (ret == RETCODE_SUCCESS) {
  576. pDecInfo->initialInfoObtained = 1;
  577. }
  578. info->rdPtr = ProductVpuDecGetRdPtr(pCodecInst);
  579. info->wrPtr = pDecInfo->streamWrPtr;
  580. pDecInfo->prevFrameEndPos = info->rdPtr;
  581. pDecInfo->initialInfo = *info;
  582. SetPendingInst(pCodecInst->coreIdx, NULL);
  583. LeaveLock(pCodecInst->coreIdx);
  584. return ret;
  585. }
  586. static RetCode DecRegisterFrameBuffer(DecHandle handle, FrameBuffer *bufArray, int numFbsForDecoding, int numFbsForWTL, int stride, int height, int mapType)
  587. {
  588. CodecInst* pCodecInst;
  589. DecInfo* pDecInfo;
  590. Int32 i;
  591. RetCode ret;
  592. FrameBuffer* fb, nullFb;
  593. vpu_buffer_t* vb;
  594. FrameBufferFormat format = FORMAT_420;
  595. Int32 totalNumOfFbs;
  596. ret = CheckDecInstanceValidity(handle);
  597. if (ret != RETCODE_SUCCESS)
  598. return ret;
  599. if (numFbsForDecoding > MAX_FRAMEBUFFER_COUNT || numFbsForWTL > MAX_FRAMEBUFFER_COUNT) {
  600. return RETCODE_INVALID_PARAM;
  601. }
  602. osal_memset(&nullFb, 0x00, sizeof(FrameBuffer));
  603. pCodecInst = handle;
  604. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  605. pDecInfo->numFbsForDecoding = numFbsForDecoding;
  606. pDecInfo->numFbsForWTL = numFbsForWTL;
  607. pDecInfo->numFrameBuffers = numFbsForDecoding + numFbsForWTL;
  608. pDecInfo->stride = stride;
  609. if (pCodecInst->codecMode == VPX_DEC)
  610. pDecInfo->frameBufferHeight = VPU_ALIGN64(height);
  611. else if (pCodecInst->codecMode == W_VP9_DEC)
  612. pDecInfo->frameBufferHeight = VPU_ALIGN64(height);
  613. else
  614. pDecInfo->frameBufferHeight = height;
  615. pDecInfo->mapType = mapType;
  616. pDecInfo->mapCfg.productId = pCodecInst->productId;
  617. ret = ProductVpuDecCheckCapability(pCodecInst);
  618. if (ret != RETCODE_SUCCESS)
  619. return ret;
  620. if (!pDecInfo->initialInfoObtained)
  621. return RETCODE_WRONG_CALL_SEQUENCE;
  622. if ( (stride < pDecInfo->initialInfo.picWidth) || (stride % 8 != 0) || (height<pDecInfo->initialInfo.picHeight) ) {
  623. return RETCODE_INVALID_STRIDE;
  624. }
  625. EnterLock(pCodecInst->coreIdx);
  626. if (GetPendingInst(pCodecInst->coreIdx)) {
  627. LeaveLock(pCodecInst->coreIdx);
  628. return RETCODE_FRAME_NOT_COMPLETE;
  629. }
  630. /* clear frameBufPool */
  631. for (i=0; i<(int)(sizeof(pDecInfo->frameBufPool)/sizeof(FrameBuffer)); i++) {
  632. pDecInfo->frameBufPool[i] = nullFb;
  633. }
  634. /* LinearMap or TiledMap, compressed framebuffer inclusive. */
  635. if (pDecInfo->initialInfo.lumaBitdepth > 8 || pDecInfo->initialInfo.chromaBitdepth > 8)
  636. format = FORMAT_420_P10_16BIT_LSB;
  637. totalNumOfFbs = numFbsForDecoding + numFbsForWTL;
  638. if (pCodecInst->codecMode == W_SVAC_DEC && pDecInfo->initialInfo.spatialSvcEnable == TRUE)
  639. totalNumOfFbs = numFbsForDecoding + numFbsForDecoding + numFbsForWTL; // (EL + BL + linear)
  640. if (bufArray) {
  641. for(i=0; i<totalNumOfFbs; i++)
  642. pDecInfo->frameBufPool[i] = bufArray[i];
  643. }
  644. else {
  645. vb = &pDecInfo->vbFrame;
  646. fb = &pDecInfo->frameBufPool[0];
  647. ret = ProductVpuAllocateFramebuffer(
  648. (CodecInst*)handle, fb, (TiledMapType)mapType, numFbsForDecoding, stride, height, format,
  649. pDecInfo->openParam.cbcrInterleave,
  650. pDecInfo->openParam.nv21,
  651. pDecInfo->openParam.frameEndian, vb, 0, FB_TYPE_CODEC);
  652. if (ret != RETCODE_SUCCESS) {
  653. LeaveLock(pCodecInst->coreIdx);
  654. return ret;
  655. }
  656. }
  657. if (pCodecInst->productId != PRODUCT_ID_960) {
  658. pDecInfo->mapCfg.tiledBaseAddr = pDecInfo->frameBufPool[0].bufY;
  659. }
  660. /* LinearMap */
  661. if (pDecInfo->wtlEnable == TRUE || numFbsForWTL != 0) {
  662. pDecInfo->stride = stride;
  663. if (!bufArray) {
  664. TiledMapType map;
  665. map = pDecInfo->wtlMode==FF_FRAME ? LINEAR_FRAME_MAP : LINEAR_FIELD_MAP;
  666. vb = &pDecInfo->vbWTL;
  667. fb = &pDecInfo->frameBufPool[numFbsForDecoding];
  668. ret = ProductVpuAllocateFramebuffer(
  669. (CodecInst*)handle, fb, map, numFbsForWTL, stride, height,
  670. pDecInfo->wtlFormat,
  671. pDecInfo->openParam.cbcrInterleave,
  672. pDecInfo->openParam.nv21,
  673. pDecInfo->openParam.frameEndian, vb, 0, FB_TYPE_PPU);
  674. if (ret != RETCODE_SUCCESS) {
  675. LeaveLock(pCodecInst->coreIdx);
  676. return ret;
  677. }
  678. }
  679. }
  680. ret = ProductVpuRegisterFramebuffer(pCodecInst);
  681. LeaveLock(pCodecInst->coreIdx);
  682. return ret;
  683. }
  684. RetCode VPU_DecRegisterFrameBuffer(DecHandle handle, FrameBuffer *bufArray, int num, int stride, int height, int mapType)
  685. {
  686. DecInfo* pDecInfo = &handle->CodecInfo->decInfo;
  687. Uint32 numWTL = 0;
  688. if (pDecInfo->wtlEnable == TRUE) numWTL = num;
  689. return DecRegisterFrameBuffer(handle, bufArray, num, numWTL, stride, height, mapType);
  690. }
  691. RetCode VPU_DecRegisterFrameBufferEx(DecHandle handle, FrameBuffer *bufArray, int numOfDecFbs, int numOfDisplayFbs, int stride, int height, int mapType)
  692. {
  693. return DecRegisterFrameBuffer(handle, bufArray, numOfDecFbs, numOfDisplayFbs, stride, height, mapType);
  694. }
  695. RetCode VPU_DecGetFrameBuffer(DecHandle handle, int frameIdx, FrameBuffer* frameBuf)
  696. {
  697. CodecInst * pCodecInst;
  698. DecInfo * pDecInfo;
  699. RetCode ret;
  700. ret = CheckDecInstanceValidity(handle);
  701. if (ret != RETCODE_SUCCESS)
  702. return ret;
  703. if (frameBuf == 0)
  704. return RETCODE_INVALID_PARAM;
  705. pCodecInst = handle;
  706. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  707. if (frameIdx < 0 || frameIdx >= pDecInfo->numFrameBuffers)
  708. return RETCODE_INVALID_PARAM;
  709. *frameBuf = pDecInfo->frameBufPool[frameIdx];
  710. return RETCODE_SUCCESS;
  711. }
  712. RetCode VPU_DecUpdateFrameBuffer(
  713. DecHandle handle,
  714. FrameBuffer* fbcFb,
  715. FrameBuffer* linearFb,
  716. Int32 mvColIndex,
  717. Int32 picWidth,
  718. Int32 picHeight
  719. )
  720. {
  721. if (handle == NULL) {
  722. return RETCODE_INVALID_HANDLE;
  723. }
  724. return ProductVpuDecUpdateFrameBuffer((CodecInst*)handle, fbcFb, linearFb, mvColIndex, picWidth, picHeight);
  725. }
  726. RetCode VPU_DecGetBitstreamBuffer(DecHandle handle, PhysicalAddress* prdPtr, PhysicalAddress* pwrPtr, Uint32* size)
  727. {
  728. CodecInst* pCodecInst;
  729. DecInfo* pDecInfo;
  730. PhysicalAddress rdPtr;
  731. PhysicalAddress wrPtr;
  732. PhysicalAddress tempPtr;
  733. int room;
  734. Int32 coreIdx;
  735. VpuAttr* pAttr;
  736. coreIdx = handle->coreIdx;
  737. pAttr = &g_VpuCoreAttributes[coreIdx];
  738. pCodecInst = handle;
  739. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  740. if (pAttr->supportCommandQueue == TRUE) {
  741. if (pDecInfo->rdPtrValidFlag == TRUE) { // when RdPtr has been updated by calling SetRdPtr.
  742. rdPtr = pDecInfo->streamRdPtr;
  743. }
  744. else {
  745. EnterLock(pCodecInst->coreIdx);
  746. rdPtr = ProductVpuDecGetRdPtr(pCodecInst);
  747. LeaveLock(pCodecInst->coreIdx);
  748. }
  749. }
  750. else {
  751. if (GetPendingInst(coreIdx) == pCodecInst) {
  752. if (pCodecInst->codecMode == AVC_DEC && pCodecInst->codecModeAux == AVC_AUX_MVC) {
  753. rdPtr = pDecInfo->streamRdPtr;
  754. }
  755. else {
  756. rdPtr = VpuReadReg(coreIdx, pDecInfo->streamRdPtrRegAddr);
  757. }
  758. }
  759. else {
  760. rdPtr = pDecInfo->streamRdPtr;
  761. }
  762. }
  763. wrPtr = pDecInfo->streamWrPtr;
  764. pAttr = &g_VpuCoreAttributes[coreIdx];
  765. tempPtr = rdPtr;
  766. if (pDecInfo->openParam.bitstreamMode != BS_MODE_PIC_END) {
  767. if (wrPtr < tempPtr) {
  768. room = tempPtr - wrPtr - pAttr->bitstreamBufferMargin*2;
  769. }
  770. else {
  771. room = (pDecInfo->streamBufEndAddr - wrPtr) + (tempPtr - pDecInfo->streamBufStartAddr) - pAttr->bitstreamBufferMargin*2;
  772. }
  773. room--;
  774. }
  775. else {
  776. room = (pDecInfo->streamBufEndAddr - wrPtr);
  777. }
  778. if (prdPtr) *prdPtr = tempPtr;
  779. if (pwrPtr) *pwrPtr = wrPtr;
  780. if (size) *size = room;
  781. return RETCODE_SUCCESS;
  782. }
  783. RetCode VPU_DecUpdateBitstreamBuffer(DecHandle handle, int size)
  784. {
  785. CodecInst* pCodecInst;
  786. DecInfo* pDecInfo;
  787. PhysicalAddress wrPtr;
  788. PhysicalAddress rdPtr;
  789. RetCode ret;
  790. BOOL running;
  791. VpuAttr* pAttr;
  792. ret = CheckDecInstanceValidity(handle);
  793. if (ret != RETCODE_SUCCESS)
  794. return ret;
  795. pCodecInst = handle;
  796. if (!pCodecInst)
  797. return RETCODE_INVALID_HANDLE;
  798. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  799. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  800. wrPtr = pDecInfo->streamWrPtr;
  801. if (pAttr->supportCommandQueue == TRUE) {
  802. running = FALSE;
  803. }
  804. else {
  805. running = (BOOL)(GetPendingInst(pCodecInst->coreIdx) == pCodecInst);
  806. }
  807. if (size > 0) {
  808. Uint32 room = 0;
  809. if (running == TRUE)
  810. rdPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr);
  811. else
  812. rdPtr = pDecInfo->streamRdPtr;
  813. if (wrPtr < rdPtr) {
  814. if (rdPtr <= wrPtr + size) {
  815. return RETCODE_INVALID_PARAM;
  816. }
  817. }
  818. wrPtr += size;
  819. if (pDecInfo->openParam.bitstreamMode != BS_MODE_PIC_END) {
  820. if (wrPtr > pDecInfo->streamBufEndAddr) {
  821. room = wrPtr - pDecInfo->streamBufEndAddr;
  822. wrPtr = pDecInfo->streamBufStartAddr;
  823. wrPtr += room;
  824. }
  825. else if (wrPtr == pDecInfo->streamBufEndAddr) {
  826. wrPtr = pDecInfo->streamBufStartAddr;
  827. }
  828. }
  829. pDecInfo->streamWrPtr = wrPtr;
  830. pDecInfo->streamRdPtr = rdPtr;
  831. if (running == TRUE) {
  832. VpuWriteReg(pCodecInst->coreIdx, pDecInfo->streamWrPtrRegAddr, wrPtr);
  833. }
  834. }
  835. if (running == FALSE) {
  836. EnterLock(pCodecInst->coreIdx);
  837. }
  838. ret = ProductVpuDecSetBitstreamFlag(pCodecInst, running, size);
  839. if (running == FALSE) {
  840. LeaveLock(pCodecInst->coreIdx);
  841. }
  842. return ret;
  843. }
  844. RetCode VPU_HWReset(Uint32 coreIdx)
  845. {
  846. if (vdi_hw_reset(coreIdx) < 0 )
  847. return RETCODE_FAILURE;
  848. if (GetPendingInst(coreIdx))
  849. {
  850. SetPendingInst(coreIdx, 0);
  851. LeaveLock(coreIdx); //if vpu is in a lock state. release the state;
  852. }
  853. return RETCODE_SUCCESS;
  854. }
  855. /**
  856. * VPU_SWReset
  857. * IN
  858. * forcedReset : 1 if there is no need to waiting for BUS transaction,
  859. * 0 for otherwise
  860. * OUT
  861. * RetCode : RETCODE_FAILURE if failed to reset,
  862. * RETCODE_SUCCESS for otherwise
  863. */
  864. RetCode VPU_SWReset(Uint32 coreIdx, SWResetMode resetMode, void *pendingInst)
  865. {
  866. CodecInst *pCodecInst = (CodecInst *)pendingInst;
  867. RetCode ret = RETCODE_SUCCESS;
  868. VpuAttr* attr = &g_VpuCoreAttributes[coreIdx];
  869. if (attr->supportCommandQueue == TRUE) {
  870. if (pCodecInst && pCodecInst->loggingEnable) {
  871. vdi_log(pCodecInst->coreIdx, 0x10000, 1);
  872. }
  873. EnterLock(coreIdx);
  874. ret = ProductVpuReset(coreIdx, resetMode);
  875. LeaveLock(coreIdx);
  876. if (pCodecInst && pCodecInst->loggingEnable) {
  877. vdi_log(pCodecInst->coreIdx, 0x10000, 0);
  878. }
  879. }
  880. else {
  881. if (pCodecInst) {
  882. if (pCodecInst->loggingEnable) {
  883. vdi_log(pCodecInst->coreIdx, (pCodecInst->productId == PRODUCT_ID_960 || pCodecInst->productId == PRODUCT_ID_980)?0x10:0x10000, 1);
  884. }
  885. }
  886. else {
  887. EnterLock(coreIdx);
  888. }
  889. ret = ProductVpuReset(coreIdx, resetMode);
  890. if (pCodecInst) {
  891. if (pCodecInst->loggingEnable) {
  892. vdi_log(pCodecInst->coreIdx, (pCodecInst->productId == PRODUCT_ID_960 || pCodecInst->productId == PRODUCT_ID_980)?0x10:0x10000, 0);
  893. }
  894. SetPendingInst(pCodecInst->coreIdx, 0);
  895. LeaveLock(coreIdx);
  896. }
  897. else {
  898. LeaveLock(coreIdx);
  899. }
  900. }
  901. return ret;
  902. }
  903. //---- VPU_SLEEP/WAKE
  904. RetCode VPU_SleepWake(Uint32 coreIdx, int iSleepWake)
  905. {
  906. RetCode ret;
  907. EnterLock(coreIdx);
  908. ret = ProductVpuSleepWake(coreIdx, iSleepWake, s_pusBitCode[coreIdx], s_bitCodeSize[coreIdx]);
  909. LeaveLock(coreIdx);
  910. return ret;
  911. }
  912. RetCode VPU_DecStartOneFrame(DecHandle handle, DecParam *param)
  913. {
  914. CodecInst* pCodecInst;
  915. DecInfo* pDecInfo;
  916. Uint32 val = 0;
  917. RetCode ret = RETCODE_SUCCESS;
  918. VpuAttr* pAttr = NULL;
  919. ret = CheckDecInstanceValidity(handle);
  920. if (ret != RETCODE_SUCCESS) {
  921. return ret;
  922. }
  923. pCodecInst = (CodecInst*)handle;
  924. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  925. if (pDecInfo->stride == 0) { // This means frame buffers have not been registered.
  926. return RETCODE_WRONG_CALL_SEQUENCE;
  927. }
  928. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  929. EnterLock(pCodecInst->coreIdx);
  930. if (GetPendingInst(pCodecInst->coreIdx)) {
  931. LeaveLock(pCodecInst->coreIdx);
  932. return RETCODE_FRAME_NOT_COMPLETE;
  933. }
  934. if (pAttr->supportCommandQueue == FALSE) {
  935. EnterDispFlagLock(pCodecInst->coreIdx);
  936. val = pDecInfo->frameDisplayFlag;
  937. val |= pDecInfo->setDisplayIndexes;
  938. val &= ~(Uint32)(pDecInfo->clearDisplayIndexes);
  939. VpuWriteReg(pCodecInst->coreIdx, pDecInfo->frameDisplayFlagRegAddr, val);
  940. pDecInfo->clearDisplayIndexes = 0;
  941. pDecInfo->setDisplayIndexes = 0;
  942. LeaveDispFlagLock(pCodecInst->coreIdx);
  943. }
  944. pDecInfo->frameStartPos = pDecInfo->streamRdPtr;
  945. ret = ProductVpuDecode(pCodecInst, param);
  946. if (pAttr->supportCommandQueue == TRUE) {
  947. SetPendingInst(pCodecInst->coreIdx, NULL);
  948. LeaveLock(pCodecInst->coreIdx);
  949. }
  950. else {
  951. SetPendingInst(pCodecInst->coreIdx, pCodecInst);
  952. }
  953. return ret;
  954. }
  955. RetCode VPU_DecGetOutputInfo(DecHandle handle, DecOutputInfo* info)
  956. {
  957. CodecInst* pCodecInst;
  958. DecInfo* pDecInfo;
  959. RetCode ret;
  960. VpuRect rectInfo;
  961. Uint32 val;
  962. Int32 decodedIndex;
  963. Int32 displayIndex;
  964. Uint32 maxDecIndex;
  965. VpuAttr* pAttr;
  966. ret = CheckDecInstanceValidity(handle);
  967. if (ret != RETCODE_SUCCESS) {
  968. return ret;
  969. }
  970. if (info == 0) {
  971. return RETCODE_INVALID_PARAM;
  972. }
  973. pCodecInst = handle;
  974. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  975. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  976. if (pAttr->supportCommandQueue == TRUE) {
  977. EnterLock(pCodecInst->coreIdx);
  978. }
  979. else {
  980. if (pCodecInst != GetPendingInst(pCodecInst->coreIdx)) {
  981. SetPendingInst(pCodecInst->coreIdx, 0);
  982. LeaveLock(pCodecInst->coreIdx);
  983. return RETCODE_WRONG_CALL_SEQUENCE;
  984. }
  985. }
  986. osal_memset((void*)info, 0x00, sizeof(DecOutputInfo));
  987. ret = ProductVpuDecGetResult(pCodecInst, info);
  988. if (ret != RETCODE_SUCCESS) {
  989. info->rdPtr = pDecInfo->streamRdPtr;
  990. info->wrPtr = pDecInfo->streamWrPtr;
  991. SetPendingInst(pCodecInst->coreIdx, 0);
  992. LeaveLock(pCodecInst->coreIdx);
  993. return ret;
  994. }
  995. decodedIndex = info->indexFrameDecoded;
  996. // Calculate display frame region
  997. val = 0;
  998. if (decodedIndex >= 0 && decodedIndex < MAX_GDI_IDX) {
  999. //default value
  1000. rectInfo.left = 0;
  1001. rectInfo.right = info->decPicWidth;
  1002. rectInfo.top = 0;
  1003. rectInfo.bottom = info->decPicHeight;
  1004. if (pCodecInst->codecMode == W_HEVC_DEC || pCodecInst->codecMode == AVC_DEC || pCodecInst->codecMode == AVS_DEC)
  1005. rectInfo = pDecInfo->initialInfo.picCropRect;
  1006. if (pCodecInst->codecMode == W_HEVC_DEC)
  1007. pDecInfo->decOutInfo[decodedIndex].decodedPOC = info->decodedPOC;
  1008. if (pCodecInst->codecMode == W_AVS2_DEC)
  1009. pDecInfo->decOutInfo[decodedIndex].avs2Info.decodedPOI = info->avs2Info.decodedPOI;
  1010. info->rcDecoded.left = pDecInfo->decOutInfo[decodedIndex].rcDecoded.left = rectInfo.left;
  1011. info->rcDecoded.right = pDecInfo->decOutInfo[decodedIndex].rcDecoded.right = rectInfo.right;
  1012. info->rcDecoded.top = pDecInfo->decOutInfo[decodedIndex].rcDecoded.top = rectInfo.top;
  1013. info->rcDecoded.bottom = pDecInfo->decOutInfo[decodedIndex].rcDecoded.bottom = rectInfo.bottom;
  1014. }
  1015. else
  1016. {
  1017. info->rcDecoded.left = 0;
  1018. info->rcDecoded.right = info->decPicWidth;
  1019. info->rcDecoded.top = 0;
  1020. info->rcDecoded.bottom = info->decPicHeight;
  1021. }
  1022. displayIndex = info->indexFrameDisplay;
  1023. if (info->indexFrameDisplay >= 0 && info->indexFrameDisplay < MAX_GDI_IDX)
  1024. {
  1025. if (pCodecInst->codecMode == VC1_DEC) // vc1 rotates decoded frame buffer region. the other std rotated whole frame buffer region.
  1026. {
  1027. if (pDecInfo->rotationEnable && (pDecInfo->rotationAngle==90 || pDecInfo->rotationAngle==270))
  1028. {
  1029. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1030. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1031. info->rcDisplay.top = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1032. info->rcDisplay.bottom = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1033. }
  1034. else
  1035. {
  1036. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1037. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1038. info->rcDisplay.top = pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1039. info->rcDisplay.bottom = pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1040. }
  1041. }
  1042. else
  1043. {
  1044. if (pDecInfo->rotationEnable)
  1045. {
  1046. switch(pDecInfo->rotationAngle)
  1047. {
  1048. case 90:
  1049. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1050. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1051. info->rcDisplay.top = info->decPicWidth - pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1052. info->rcDisplay.bottom = info->decPicWidth - pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1053. break;
  1054. case 270:
  1055. info->rcDisplay.left = info->decPicHeight - pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1056. info->rcDisplay.right = info->decPicHeight - pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1057. info->rcDisplay.top = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1058. info->rcDisplay.bottom = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1059. break;
  1060. case 180:
  1061. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1062. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1063. info->rcDisplay.top = info->decPicHeight - pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1064. info->rcDisplay.bottom = info->decPicHeight - pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1065. break;
  1066. default:
  1067. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1068. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1069. info->rcDisplay.top = pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1070. info->rcDisplay.bottom = pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1071. break;
  1072. }
  1073. }
  1074. else
  1075. {
  1076. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1077. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1078. info->rcDisplay.top = pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1079. info->rcDisplay.bottom = pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1080. }
  1081. if (pDecInfo->mirrorEnable) {
  1082. Uint32 temp;
  1083. Uint32 width = (pDecInfo->rotationAngle == 90 || pDecInfo->rotationAngle == 270) ? info->decPicHeight: info->decPicWidth;
  1084. Uint32 height = (pDecInfo->rotationAngle == 90 || pDecInfo->rotationAngle == 270) ? info->decPicWidth : info->decPicHeight;
  1085. if (pDecInfo->mirrorDirection & MIRDIR_VER) {
  1086. temp = info->rcDisplay.top;
  1087. info->rcDisplay.top = height - info->rcDisplay.bottom;
  1088. info->rcDisplay.bottom = height - temp;
  1089. }
  1090. if (pDecInfo->mirrorDirection & MIRDIR_HOR) {
  1091. temp = info->rcDisplay.left;
  1092. info->rcDisplay.left = width - info->rcDisplay.right;
  1093. info->rcDisplay.right = width - temp;
  1094. }
  1095. }
  1096. switch (pCodecInst->codecMode) {
  1097. case W_HEVC_DEC:
  1098. info->displayPOC = pDecInfo->decOutInfo[displayIndex].decodedPOC;
  1099. break;
  1100. case W_AVS2_DEC:
  1101. info->avs2Info.displayPOI = pDecInfo->decOutInfo[displayIndex].avs2Info.decodedPOI;
  1102. break;
  1103. case W_AVC_DEC:
  1104. if (TRUE == PRODUCT_ID_W_SERIES(pCodecInst->productId)) {
  1105. info->displayPOC = pDecInfo->decOutInfo[displayIndex].decodedPOC;
  1106. }
  1107. break;
  1108. default:
  1109. break;
  1110. }
  1111. }
  1112. if (info->indexFrameDisplay == info->indexFrameDecoded)
  1113. {
  1114. info->dispPicWidth = info->decPicWidth;
  1115. info->dispPicHeight = info->decPicHeight;
  1116. }
  1117. else
  1118. {
  1119. /*
  1120. When indexFrameDecoded < 0, and indexFrameDisplay >= 0
  1121. info->decPicWidth and info->decPicHeight are still valid
  1122. But those of pDecInfo->decOutInfo[displayIndex] are invalid in VP9
  1123. */
  1124. info->dispPicWidth = pDecInfo->decOutInfo[displayIndex].decPicWidth;
  1125. info->dispPicHeight = pDecInfo->decOutInfo[displayIndex].decPicHeight;
  1126. }
  1127. if (pDecInfo->scalerEnable == TRUE) {
  1128. if ((pDecInfo->scaleWidth != 0) && (pDecInfo->scaleHeight != 0)) {
  1129. info->dispPicWidth = pDecInfo->scaleWidth;
  1130. info->dispPicHeight = pDecInfo->scaleHeight;
  1131. info->rcDisplay.right = pDecInfo->scaleWidth;
  1132. info->rcDisplay.bottom = pDecInfo->scaleHeight;
  1133. }
  1134. }
  1135. }
  1136. else
  1137. {
  1138. info->rcDisplay.left = 0;
  1139. info->rcDisplay.right = 0;
  1140. info->rcDisplay.top = 0;
  1141. info->rcDisplay.bottom = 0;
  1142. if (pDecInfo->rotationEnable || pDecInfo->mirrorEnable || pDecInfo->tiled2LinearEnable || pDecInfo->deringEnable) {
  1143. info->dispPicWidth = info->decPicWidth;
  1144. info->dispPicHeight = info->decPicHeight;
  1145. }
  1146. else {
  1147. info->dispPicWidth = 0;
  1148. info->dispPicHeight = 0;
  1149. }
  1150. }
  1151. if ( (pCodecInst->codecMode == VC1_DEC ) && info->indexFrameDisplay != -3) {
  1152. if (pDecInfo->vc1BframeDisplayValid == 0) {
  1153. if (info->picType == 2)
  1154. info->indexFrameDisplay = -3;
  1155. else
  1156. pDecInfo->vc1BframeDisplayValid = 1;
  1157. }
  1158. }
  1159. pDecInfo->streamRdPtr = ProductVpuDecGetRdPtr(pCodecInst);
  1160. pDecInfo->frameDisplayFlag = VpuReadReg(pCodecInst->coreIdx, pDecInfo->frameDisplayFlagRegAddr);
  1161. if (pCodecInst->codecMode == W_VP9_DEC) {
  1162. pDecInfo->frameDisplayFlag &= 0xFFFF;
  1163. }
  1164. pDecInfo->frameEndPos = pDecInfo->streamRdPtr;
  1165. if (pDecInfo->frameEndPos < pDecInfo->frameStartPos)
  1166. info->consumedByte = pDecInfo->frameEndPos + pDecInfo->streamBufSize - pDecInfo->frameStartPos;
  1167. else
  1168. info->consumedByte = pDecInfo->frameEndPos - pDecInfo->frameStartPos;
  1169. if (pDecInfo->deringEnable || pDecInfo->mirrorEnable || pDecInfo->rotationEnable || pDecInfo->tiled2LinearEnable) {
  1170. info->dispFrame = pDecInfo->rotatorOutput;
  1171. info->dispFrame.stride = pDecInfo->rotatorStride;
  1172. }
  1173. else {
  1174. Int32 SvacSvcFlag = (pCodecInst->codecMode == W_SVAC_DEC && pDecInfo->initialInfo.spatialSvcEnable == TRUE);
  1175. val = (pDecInfo->openParam.wtlEnable == TRUE ? pDecInfo->numFbsForDecoding: 0); //fbOffset
  1176. if (SvacSvcFlag && pDecInfo->openParam.wtlEnable == TRUE)
  1177. val = pDecInfo->numFbsForDecoding*2;
  1178. maxDecIndex = (pDecInfo->numFbsForDecoding > pDecInfo->numFbsForWTL) ? (SvacSvcFlag ? pDecInfo->numFbsForDecoding*2 : pDecInfo->numFbsForDecoding) : pDecInfo->numFbsForWTL;
  1179. if (0 <= info->indexFrameDisplay && info->indexFrameDisplay < (int)maxDecIndex)
  1180. info->dispFrame = pDecInfo->frameBufPool[val+info->indexFrameDisplay];
  1181. }
  1182. info->rdPtr = pDecInfo->streamRdPtr;
  1183. info->wrPtr = pDecInfo->streamWrPtr;
  1184. info->frameDisplayFlag = pDecInfo->frameDisplayFlag;
  1185. info->sequenceNo = pDecInfo->initialInfo.sequenceNo;
  1186. if (decodedIndex >= 0 && decodedIndex < MAX_GDI_IDX) {
  1187. pDecInfo->decOutInfo[decodedIndex] = *info;
  1188. }
  1189. if (displayIndex >= 0 && displayIndex < MAX_GDI_IDX) {
  1190. info->numOfTotMBs = info->numOfTotMBs;
  1191. info->numOfErrMBs = info->numOfErrMBs;
  1192. info->numOfTotMBsInDisplay = pDecInfo->decOutInfo[displayIndex].numOfTotMBs;
  1193. info->numOfErrMBsInDisplay = pDecInfo->decOutInfo[displayIndex].numOfErrMBs;
  1194. info->dispFrame.sequenceNo = info->sequenceNo;
  1195. }
  1196. else {
  1197. info->numOfTotMBsInDisplay = 0;
  1198. info->numOfErrMBsInDisplay = 0;
  1199. }
  1200. if (info->sequenceChanged != 0) {
  1201. if (!(pCodecInst->productId == PRODUCT_ID_960 || pCodecInst->productId == PRODUCT_ID_980)) {
  1202. /* Update new sequence information */
  1203. osal_memcpy((void*)&pDecInfo->initialInfo, (void*)&pDecInfo->newSeqInfo, sizeof(DecInitialInfo));
  1204. }
  1205. if ((info->sequenceChanged & SEQ_CHANGE_INTER_RES_CHANGE) != SEQ_CHANGE_INTER_RES_CHANGE) {
  1206. pDecInfo->initialInfo.sequenceNo++;
  1207. }
  1208. }
  1209. SetPendingInst(pCodecInst->coreIdx, 0);
  1210. LeaveLock(pCodecInst->coreIdx);
  1211. return RETCODE_SUCCESS;
  1212. }
  1213. RetCode VPU_DecFrameBufferFlush(DecHandle handle, DecOutputInfo* pRemainings, Uint32* retNum)
  1214. {
  1215. CodecInst* pCodecInst;
  1216. DecInfo* pDecInfo;
  1217. DecOutputInfo* pOut;
  1218. RetCode ret;
  1219. FramebufferIndex retIndex[MAX_GDI_IDX];
  1220. Uint32 retRemainings = 0;
  1221. Int32 i, index, val;
  1222. VpuAttr* pAttr = NULL;
  1223. ret = CheckDecInstanceValidity(handle);
  1224. if (ret != RETCODE_SUCCESS)
  1225. return ret;
  1226. pCodecInst = handle;
  1227. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  1228. EnterLock(pCodecInst->coreIdx);
  1229. if (GetPendingInst(pCodecInst->coreIdx)) {
  1230. LeaveLock(pCodecInst->coreIdx);
  1231. return RETCODE_FRAME_NOT_COMPLETE;
  1232. }
  1233. osal_memset((void*)retIndex, 0xff, sizeof(retIndex));
  1234. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  1235. if (pAttr->supportCommandQueue == FALSE) {
  1236. EnterDispFlagLock(pCodecInst->coreIdx);
  1237. val = pDecInfo->frameDisplayFlag;
  1238. val |= pDecInfo->setDisplayIndexes;
  1239. val &= ~(Uint32)(pDecInfo->clearDisplayIndexes);
  1240. VpuWriteReg(pCodecInst->coreIdx, pDecInfo->frameDisplayFlagRegAddr, val);
  1241. pDecInfo->clearDisplayIndexes = 0;
  1242. pDecInfo->setDisplayIndexes = 0;
  1243. LeaveDispFlagLock(pCodecInst->coreIdx);
  1244. }
  1245. if ((ret=ProductVpuDecFlush(pCodecInst, retIndex, MAX_GDI_IDX)) != RETCODE_SUCCESS) {
  1246. LeaveLock(pCodecInst->coreIdx);
  1247. return ret;
  1248. }
  1249. if (pRemainings != NULL) {
  1250. for (i=0; i<MAX_GDI_IDX; i++) {
  1251. index = (pDecInfo->wtlEnable == TRUE) ? retIndex[i].tiledIndex : retIndex[i].linearIndex;
  1252. if (index < 0)
  1253. break;
  1254. pRemainings[i] = pDecInfo->decOutInfo[index];
  1255. pOut = &pRemainings[i];
  1256. pOut->indexFrameDisplay = pOut->indexFrameDecoded;
  1257. pOut->indexFrameDisplayForTiled = pOut->indexFrameDecodedForTiled;
  1258. if (pDecInfo->wtlEnable == TRUE)
  1259. pOut->dispFrame = pDecInfo->frameBufPool[pDecInfo->numFbsForDecoding+retIndex[i].linearIndex];
  1260. else
  1261. pOut->dispFrame = pDecInfo->frameBufPool[index];
  1262. pOut->dispFrame.sequenceNo = pOut->sequenceNo;
  1263. if (pCodecInst->codecMode == W_VP9_DEC || pCodecInst->codecMode == W_AVS2_DEC) {
  1264. Uint32 regVal;
  1265. if ((pDecInfo->scaleWidth == 0) || (pDecInfo->scaleHeight == 0)) {
  1266. regVal = VpuReadReg(pCodecInst->coreIdx, W5_RET_DEC_DISPLAY_SIZE);
  1267. pOut->dispPicWidth = regVal>>16;
  1268. pOut->dispPicHeight = regVal&0xffff;
  1269. }
  1270. else {
  1271. pOut->dispPicWidth = pDecInfo->scaleWidth;
  1272. pOut->dispPicHeight = pDecInfo->scaleHeight;
  1273. }
  1274. }
  1275. else {
  1276. pOut->dispPicWidth = pOut->decPicWidth;
  1277. pOut->dispPicHeight = pOut->decPicHeight;
  1278. }
  1279. if (pDecInfo->rotationEnable)
  1280. {
  1281. switch(pDecInfo->rotationAngle)
  1282. {
  1283. case 90:
  1284. pOut->rcDisplay.left = pDecInfo->decOutInfo[index].rcDecoded.top;
  1285. pOut->rcDisplay.right = pDecInfo->decOutInfo[index].rcDecoded.bottom;
  1286. pOut->rcDisplay.top = pOut->decPicWidth - pDecInfo->decOutInfo[index].rcDecoded.right;
  1287. pOut->rcDisplay.bottom = pOut->decPicWidth - pDecInfo->decOutInfo[index].rcDecoded.left;
  1288. break;
  1289. case 270:
  1290. pOut->rcDisplay.left = pOut->decPicHeight - pDecInfo->decOutInfo[index].rcDecoded.bottom;
  1291. pOut->rcDisplay.right = pOut->decPicHeight - pDecInfo->decOutInfo[index].rcDecoded.top;
  1292. pOut->rcDisplay.top = pDecInfo->decOutInfo[index].rcDecoded.left;
  1293. pOut->rcDisplay.bottom = pDecInfo->decOutInfo[index].rcDecoded.right;
  1294. break;
  1295. case 180:
  1296. pOut->rcDisplay.left = pDecInfo->decOutInfo[index].rcDecoded.left;
  1297. pOut->rcDisplay.right = pDecInfo->decOutInfo[index].rcDecoded.right;
  1298. pOut->rcDisplay.top = pOut->decPicHeight - pDecInfo->decOutInfo[index].rcDecoded.bottom;
  1299. pOut->rcDisplay.bottom = pOut->decPicHeight - pDecInfo->decOutInfo[index].rcDecoded.top;
  1300. break;
  1301. default:
  1302. pOut->rcDisplay.left = pDecInfo->decOutInfo[index].rcDecoded.left;
  1303. pOut->rcDisplay.right = pDecInfo->decOutInfo[index].rcDecoded.right;
  1304. pOut->rcDisplay.top = pDecInfo->decOutInfo[index].rcDecoded.top;
  1305. pOut->rcDisplay.bottom = pDecInfo->decOutInfo[index].rcDecoded.bottom;
  1306. break;
  1307. }
  1308. }
  1309. else
  1310. {
  1311. pOut->rcDisplay.left = pDecInfo->decOutInfo[index].rcDecoded.left;
  1312. pOut->rcDisplay.right = pDecInfo->decOutInfo[index].rcDecoded.right;
  1313. pOut->rcDisplay.top = pDecInfo->decOutInfo[index].rcDecoded.top;
  1314. pOut->rcDisplay.bottom = pDecInfo->decOutInfo[index].rcDecoded.bottom;
  1315. }
  1316. retRemainings++;
  1317. }
  1318. }
  1319. if (retNum) *retNum = retRemainings;
  1320. if (pCodecInst->loggingEnable)
  1321. vdi_log(pCodecInst->coreIdx, DEC_BUF_FLUSH, 0);
  1322. LeaveLock(pCodecInst->coreIdx);
  1323. return ret;
  1324. }
  1325. RetCode VPU_DecSetRdPtr(DecHandle handle, PhysicalAddress addr, int updateWrPtr)
  1326. {
  1327. CodecInst* pCodecInst;
  1328. CodecInst* pPendingInst;
  1329. DecInfo* pDecInfo;
  1330. RetCode ret;
  1331. ret = CheckDecInstanceValidity(handle);
  1332. if (ret != RETCODE_SUCCESS) {
  1333. return ret;
  1334. }
  1335. pCodecInst = (CodecInst*)handle;
  1336. ret = ProductVpuDecCheckCapability(pCodecInst);
  1337. if (ret != RETCODE_SUCCESS) {
  1338. return ret;
  1339. }
  1340. pCodecInst = handle;
  1341. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  1342. pPendingInst = GetPendingInst(pCodecInst->coreIdx);
  1343. if (pCodecInst == pPendingInst) {
  1344. VpuWriteReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr, addr);
  1345. }
  1346. else {
  1347. EnterLock(pCodecInst->coreIdx);
  1348. VpuWriteReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr, addr);
  1349. LeaveLock(pCodecInst->coreIdx);
  1350. }
  1351. pDecInfo->streamRdPtr = addr;
  1352. pDecInfo->prevFrameEndPos = addr;
  1353. if (updateWrPtr == TRUE) {
  1354. pDecInfo->streamWrPtr = addr;
  1355. }
  1356. pDecInfo->rdPtrValidFlag = 1;
  1357. return RETCODE_SUCCESS;
  1358. }
  1359. RetCode VPU_EncSetWrPtr(EncHandle handle, PhysicalAddress addr, int updateRdPtr)
  1360. {
  1361. CodecInst* pCodecInst;
  1362. CodecInst* pPendingInst;
  1363. EncInfo * pEncInfo;
  1364. RetCode ret;
  1365. ret = CheckEncInstanceValidity(handle);
  1366. if (ret != RETCODE_SUCCESS)
  1367. return ret;
  1368. pCodecInst = (CodecInst*)handle;
  1369. if (pCodecInst->productId == PRODUCT_ID_960 || pCodecInst->productId == PRODUCT_ID_980) {
  1370. return RETCODE_NOT_SUPPORTED_FEATURE;
  1371. }
  1372. pEncInfo = &handle->CodecInfo->encInfo;
  1373. pPendingInst = GetPendingInst(pCodecInst->coreIdx);
  1374. if (pCodecInst == pPendingInst) {
  1375. VpuWriteReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr, addr);
  1376. }
  1377. else {
  1378. EnterLock(pCodecInst->coreIdx);
  1379. VpuWriteReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr, addr);
  1380. LeaveLock(pCodecInst->coreIdx);
  1381. }
  1382. pEncInfo->streamWrPtr = addr;
  1383. if (updateRdPtr)
  1384. pEncInfo->streamRdPtr = addr;
  1385. return RETCODE_SUCCESS;
  1386. }
  1387. RetCode VPU_DecClrDispFlag(DecHandle handle, int index)
  1388. {
  1389. CodecInst* pCodecInst;
  1390. DecInfo* pDecInfo;
  1391. RetCode ret = RETCODE_SUCCESS;
  1392. Int32 endIndex, SvacSvcFlag;
  1393. VpuAttr* pAttr = NULL;
  1394. FrameBuffer* pBuffer = NULL;
  1395. BOOL supportCommandQueue;
  1396. ret = CheckDecInstanceValidity(handle);
  1397. if (ret != RETCODE_SUCCESS)
  1398. return ret;
  1399. pCodecInst = handle;
  1400. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  1401. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  1402. SvacSvcFlag = (pCodecInst->codecMode == W_SVAC_DEC && pDecInfo->initialInfo.spatialSvcEnable == TRUE);
  1403. endIndex = (pDecInfo->openParam.wtlEnable == TRUE) ? pDecInfo->numFbsForWTL : (SvacSvcFlag == TRUE ? pDecInfo->numFbsForDecoding*2 : pDecInfo->numFbsForDecoding);
  1404. if ((index < 0) || (index > (endIndex - 1))) {
  1405. return RETCODE_INVALID_PARAM;
  1406. }
  1407. pBuffer = &pDecInfo->frameBufPool[pDecInfo->numFbsForDecoding + index];
  1408. if(pBuffer->size < MAX_CACHE_SIZE) {
  1409. vdi_flush_ddr(pCodecInst->coreIdx, pBuffer->bufY, pBuffer->size, 1);
  1410. }
  1411. supportCommandQueue = (pAttr->supportCommandQueue == TRUE);
  1412. if (supportCommandQueue == TRUE) {
  1413. EnterLock(pCodecInst->coreIdx);
  1414. ret = ProductClrDispFlag(pCodecInst, index);
  1415. LeaveLock(pCodecInst->coreIdx);
  1416. }
  1417. else {
  1418. EnterDispFlagLock(pCodecInst->coreIdx);
  1419. pDecInfo->clearDisplayIndexes |= (1<<index);
  1420. LeaveDispFlagLock(pCodecInst->coreIdx);
  1421. }
  1422. return ret;
  1423. }
  1424. RetCode VPU_DecGiveCommand(DecHandle handle, CodecCommand cmd, void* param)
  1425. {
  1426. CodecInst* pCodecInst;
  1427. DecInfo* pDecInfo;
  1428. RetCode ret;
  1429. ret = CheckDecInstanceValidity(handle);
  1430. if (ret != RETCODE_SUCCESS)
  1431. return ret;
  1432. pCodecInst = handle;
  1433. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  1434. switch (cmd)
  1435. {
  1436. case ENABLE_ROTATION :
  1437. {
  1438. if (pDecInfo->rotatorStride == 0) {
  1439. return RETCODE_ROTATOR_STRIDE_NOT_SET;
  1440. }
  1441. pDecInfo->rotationEnable = 1;
  1442. break;
  1443. }
  1444. case DISABLE_ROTATION :
  1445. {
  1446. pDecInfo->rotationEnable = 0;
  1447. break;
  1448. }
  1449. case ENABLE_MIRRORING :
  1450. {
  1451. if (pDecInfo->rotatorStride == 0) {
  1452. return RETCODE_ROTATOR_STRIDE_NOT_SET;
  1453. }
  1454. pDecInfo->mirrorEnable = 1;
  1455. break;
  1456. }
  1457. case DISABLE_MIRRORING :
  1458. {
  1459. pDecInfo->mirrorEnable = 0;
  1460. break;
  1461. }
  1462. case SET_MIRROR_DIRECTION :
  1463. {
  1464. MirrorDirection mirDir;
  1465. if (param == 0) {
  1466. return RETCODE_INVALID_PARAM;
  1467. }
  1468. mirDir = *(MirrorDirection *)param;
  1469. if ( !(mirDir == MIRDIR_NONE) && !(mirDir==MIRDIR_HOR) && !(mirDir==MIRDIR_VER) && !(mirDir==MIRDIR_HOR_VER)) {
  1470. return RETCODE_INVALID_PARAM;
  1471. }
  1472. pDecInfo->mirrorDirection = mirDir;
  1473. break;
  1474. }
  1475. case SET_ROTATION_ANGLE :
  1476. {
  1477. int angle;
  1478. if (param == 0) {
  1479. return RETCODE_INVALID_PARAM;
  1480. }
  1481. angle = *(int *)param;
  1482. if (angle != 0 && angle != 90 &&
  1483. angle != 180 && angle != 270) {
  1484. return RETCODE_INVALID_PARAM;
  1485. }
  1486. if (pDecInfo->rotatorStride != 0) {
  1487. if (angle == 90 || angle ==270) {
  1488. if (pDecInfo->initialInfo.picHeight > pDecInfo->rotatorStride) {
  1489. return RETCODE_INVALID_PARAM;
  1490. }
  1491. } else {
  1492. if (pDecInfo->initialInfo.picWidth > pDecInfo->rotatorStride) {
  1493. return RETCODE_INVALID_PARAM;
  1494. }
  1495. }
  1496. }
  1497. pDecInfo->rotationAngle = angle;
  1498. break;
  1499. }
  1500. case SET_ROTATOR_OUTPUT :
  1501. {
  1502. FrameBuffer *frame;
  1503. if (param == 0) {
  1504. return RETCODE_INVALID_PARAM;
  1505. }
  1506. frame = (FrameBuffer *)param;
  1507. pDecInfo->rotatorOutput = *frame;
  1508. pDecInfo->rotatorOutputValid = 1;
  1509. break;
  1510. }
  1511. case SET_ROTATOR_STRIDE :
  1512. {
  1513. int stride;
  1514. if (param == 0) {
  1515. return RETCODE_INVALID_PARAM;
  1516. }
  1517. stride = *(int *)param;
  1518. if (stride % 8 != 0 || stride == 0) {
  1519. return RETCODE_INVALID_STRIDE;
  1520. }
  1521. if (pDecInfo->rotationAngle == 90 || pDecInfo->rotationAngle == 270) {
  1522. if (pDecInfo->initialInfo.picHeight > stride) {
  1523. return RETCODE_INVALID_STRIDE;
  1524. }
  1525. } else {
  1526. if (pDecInfo->initialInfo.picWidth > stride) {
  1527. return RETCODE_INVALID_STRIDE;
  1528. }
  1529. }
  1530. pDecInfo->rotatorStride = stride;
  1531. break;
  1532. }
  1533. case DEC_SET_SPS_RBSP:
  1534. {
  1535. if (pCodecInst->codecMode != AVC_DEC) {
  1536. return RETCODE_INVALID_COMMAND;
  1537. }
  1538. if (param == 0) {
  1539. return RETCODE_INVALID_PARAM;
  1540. }
  1541. return SetParaSet(handle, 0, (DecParamSet *)param);
  1542. }
  1543. case DEC_SET_PPS_RBSP:
  1544. {
  1545. if (pCodecInst->codecMode != AVC_DEC) {
  1546. return RETCODE_INVALID_COMMAND;
  1547. }
  1548. if (param == 0) {
  1549. return RETCODE_INVALID_PARAM;
  1550. }
  1551. return SetParaSet(handle, 1, (DecParamSet *)param);
  1552. }
  1553. case ENABLE_DERING :
  1554. {
  1555. if (pDecInfo->rotatorStride == 0) {
  1556. return RETCODE_ROTATOR_STRIDE_NOT_SET;
  1557. }
  1558. pDecInfo->deringEnable = 1;
  1559. break;
  1560. }
  1561. case DISABLE_DERING :
  1562. {
  1563. pDecInfo->deringEnable = 0;
  1564. break;
  1565. }
  1566. case SET_SEC_AXI:
  1567. {
  1568. SecAxiUse secAxiUse;
  1569. if (param == 0) {
  1570. return RETCODE_INVALID_PARAM;
  1571. }
  1572. secAxiUse = *(SecAxiUse *)param;
  1573. if (handle->productId == PRODUCT_ID_512 || handle->productId == PRODUCT_ID_515 ||
  1574. handle->productId == PRODUCT_ID_521 || handle->productId == PRODUCT_ID_511 || handle->productId == PRODUCT_ID_517) {
  1575. pDecInfo->secAxiInfo.u.wave.useIpEnable = secAxiUse.u.wave.useIpEnable;
  1576. pDecInfo->secAxiInfo.u.wave.useLfRowEnable = secAxiUse.u.wave.useLfRowEnable;
  1577. pDecInfo->secAxiInfo.u.wave.useBitEnable = secAxiUse.u.wave.useBitEnable;
  1578. pDecInfo->secAxiInfo.u.wave.useSclEnable = secAxiUse.u.wave.useSclEnable;
  1579. }
  1580. else {
  1581. pDecInfo->secAxiInfo.u.coda9.useBitEnable = secAxiUse.u.coda9.useBitEnable;
  1582. pDecInfo->secAxiInfo.u.coda9.useIpEnable = secAxiUse.u.coda9.useIpEnable;
  1583. pDecInfo->secAxiInfo.u.coda9.useDbkYEnable = secAxiUse.u.coda9.useDbkYEnable;
  1584. pDecInfo->secAxiInfo.u.coda9.useDbkCEnable = secAxiUse.u.coda9.useDbkCEnable;
  1585. pDecInfo->secAxiInfo.u.coda9.useOvlEnable = secAxiUse.u.coda9.useOvlEnable;
  1586. pDecInfo->secAxiInfo.u.coda9.useBtpEnable = secAxiUse.u.coda9.useBtpEnable;
  1587. }
  1588. break;
  1589. }
  1590. case ENABLE_REP_USERDATA:
  1591. {
  1592. if (!pDecInfo->userDataBufAddr) {
  1593. return RETCODE_USERDATA_BUF_NOT_SET;
  1594. }
  1595. if (pDecInfo->userDataBufSize == 0) {
  1596. return RETCODE_USERDATA_BUF_NOT_SET;
  1597. }
  1598. switch (pCodecInst->productId) {
  1599. case PRODUCT_ID_512:
  1600. case PRODUCT_ID_515:
  1601. case PRODUCT_ID_521:
  1602. case PRODUCT_ID_511:
  1603. case PRODUCT_ID_517:
  1604. if (!param)
  1605. return RETCODE_INVALID_PARAM;
  1606. pDecInfo->userDataEnable = *(Uint32*)param;
  1607. break;
  1608. case PRODUCT_ID_960:
  1609. case PRODUCT_ID_980:
  1610. pDecInfo->userDataEnable = TRUE;
  1611. break;
  1612. default:
  1613. VLOG(INFO, "%s(ENABLE_REP_DATA) invalid productId(%d)\n", __FUNCTION__, pCodecInst->productId);
  1614. return RETCODE_INVALID_PARAM;
  1615. }
  1616. break;
  1617. }
  1618. case DISABLE_REP_USERDATA:
  1619. {
  1620. pDecInfo->userDataEnable = 0;
  1621. break;
  1622. }
  1623. case SET_ADDR_REP_USERDATA:
  1624. {
  1625. PhysicalAddress userDataBufAddr;
  1626. if (param == 0) {
  1627. return RETCODE_INVALID_PARAM;
  1628. }
  1629. userDataBufAddr = *(PhysicalAddress *)param;
  1630. if (userDataBufAddr % 8 != 0 || userDataBufAddr == 0) {
  1631. return RETCODE_INVALID_PARAM;
  1632. }
  1633. pDecInfo->userDataBufAddr = userDataBufAddr;
  1634. break;
  1635. }
  1636. case SET_VIRT_ADDR_REP_USERDATA:
  1637. {
  1638. unsigned long userDataVirtAddr;
  1639. if (param == 0) {
  1640. return RETCODE_INVALID_PARAM;
  1641. }
  1642. if (!pDecInfo->userDataBufAddr) {
  1643. return RETCODE_USERDATA_BUF_NOT_SET;
  1644. }
  1645. if (pDecInfo->userDataBufSize == 0) {
  1646. return RETCODE_USERDATA_BUF_NOT_SET;
  1647. }
  1648. userDataVirtAddr = *(unsigned long *)param;
  1649. if (!userDataVirtAddr) {
  1650. return RETCODE_INVALID_PARAM;
  1651. }
  1652. pDecInfo->vbUserData.phys_addr = pDecInfo->userDataBufAddr;
  1653. pDecInfo->vbUserData.size = pDecInfo->userDataBufSize;
  1654. pDecInfo->vbUserData.virt_addr = (unsigned long)userDataVirtAddr;
  1655. if (vdi_attach_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbUserData) != 0) {
  1656. return RETCODE_INSUFFICIENT_RESOURCE;
  1657. }
  1658. break;
  1659. }
  1660. case SET_SIZE_REP_USERDATA:
  1661. {
  1662. PhysicalAddress userDataBufSize;
  1663. if (param == 0) {
  1664. return RETCODE_INVALID_PARAM;
  1665. }
  1666. userDataBufSize = *(PhysicalAddress *)param;
  1667. pDecInfo->userDataBufSize = userDataBufSize;
  1668. break;
  1669. }
  1670. case SET_USERDATA_REPORT_MODE:
  1671. {
  1672. int userDataMode;
  1673. userDataMode = *(int *)param;
  1674. if (userDataMode != 1 && userDataMode != 0) {
  1675. return RETCODE_INVALID_PARAM;
  1676. }
  1677. pDecInfo->userDataReportMode = userDataMode;
  1678. break;
  1679. }
  1680. case SET_CACHE_CONFIG:
  1681. {
  1682. MaverickCacheConfig *mcCacheConfig;
  1683. if (param == 0) {
  1684. return RETCODE_INVALID_PARAM;
  1685. }
  1686. mcCacheConfig = (MaverickCacheConfig *)param;
  1687. pDecInfo->cacheConfig = *mcCacheConfig;
  1688. }
  1689. break;
  1690. case SET_LOW_DELAY_CONFIG:
  1691. {
  1692. LowDelayInfo *lowDelayInfo;
  1693. if (param == 0) {
  1694. return RETCODE_INVALID_PARAM;
  1695. }
  1696. if (pCodecInst->productId != PRODUCT_ID_980) {
  1697. return RETCODE_NOT_SUPPORTED_FEATURE;
  1698. }
  1699. lowDelayInfo = (LowDelayInfo *)param;
  1700. if (lowDelayInfo->lowDelayEn) {
  1701. if ( (pCodecInst->codecMode != AVC_DEC) ||
  1702. pDecInfo->rotationEnable ||
  1703. pDecInfo->mirrorEnable ||
  1704. pDecInfo->tiled2LinearEnable ||
  1705. pDecInfo->deringEnable) {
  1706. return RETCODE_INVALID_PARAM;
  1707. }
  1708. }
  1709. pDecInfo->lowDelayInfo.lowDelayEn = lowDelayInfo->lowDelayEn;
  1710. pDecInfo->lowDelayInfo.numRows = lowDelayInfo->numRows;
  1711. }
  1712. break;
  1713. case DEC_SET_FRAME_DELAY:
  1714. {
  1715. pDecInfo->frameDelay = *(int *)param;
  1716. break;
  1717. }
  1718. case DEC_ENABLE_REORDER:
  1719. {
  1720. if((handle->productId == PRODUCT_ID_980) || (handle->productId == PRODUCT_ID_960) || (handle->productId == PRODUCT_ID_950))
  1721. {
  1722. if (pDecInfo->initialInfoObtained) {
  1723. return RETCODE_WRONG_CALL_SEQUENCE;
  1724. }
  1725. }
  1726. pDecInfo->reorderEnable = 1;
  1727. break;
  1728. }
  1729. case DEC_DISABLE_REORDER:
  1730. {
  1731. if((handle->productId == PRODUCT_ID_980) || (handle->productId == PRODUCT_ID_960) || (handle->productId == PRODUCT_ID_950))
  1732. {
  1733. if (pDecInfo->initialInfoObtained) {
  1734. return RETCODE_WRONG_CALL_SEQUENCE;
  1735. }
  1736. if(pCodecInst->codecMode != AVC_DEC && pCodecInst->codecMode != VC1_DEC && pCodecInst->codecMode != AVS_DEC) {
  1737. return RETCODE_INVALID_COMMAND;
  1738. }
  1739. }
  1740. pDecInfo->reorderEnable = 0;
  1741. break;
  1742. }
  1743. case DEC_SET_AVC_ERROR_CONCEAL_MODE:
  1744. {
  1745. if(pCodecInst->codecMode != AVC_DEC) {
  1746. return RETCODE_INVALID_COMMAND;
  1747. }
  1748. pDecInfo->avcErrorConcealMode = *(int *)param;
  1749. break;
  1750. }
  1751. case DEC_FREE_FRAME_BUFFER:
  1752. {
  1753. int i;
  1754. if (pDecInfo->vbSlice.size)
  1755. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbSlice, DEC_ETC, pCodecInst->instIndex);
  1756. if (pDecInfo->vbFrame.size){
  1757. if (pDecInfo->frameAllocExt == 0)
  1758. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFrame, DEC_ETC, pCodecInst->instIndex);
  1759. }
  1760. for (i=0 ; i<MAX_REG_FRAME; i++) {
  1761. if (pDecInfo->vbFbcYTbl[i].size)
  1762. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcYTbl[i], DEC_FBCY_TBL, pCodecInst->instIndex);
  1763. if (pDecInfo->vbFbcCTbl[i].size)
  1764. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcCTbl[i], DEC_FBCC_TBL, pCodecInst->instIndex);
  1765. if (pDecInfo->vbMV[i].size)
  1766. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbMV[i], DEC_MV, pCodecInst->instIndex);
  1767. }
  1768. if (pDecInfo->vbPPU.size) {
  1769. if (pDecInfo->ppuAllocExt == 0)
  1770. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbPPU, DEC_ETC, pCodecInst->instIndex);
  1771. }
  1772. if (pDecInfo->wtlEnable) {
  1773. if (pDecInfo->vbWTL.size)
  1774. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbWTL, DEC_FB_LINEAR, pCodecInst->instIndex);
  1775. }
  1776. break;
  1777. }
  1778. case DEC_GET_FRAMEBUF_INFO:
  1779. {
  1780. DecGetFramebufInfo* fbInfo = (DecGetFramebufInfo*)param;
  1781. Uint32 i;
  1782. fbInfo->vbFrame = pDecInfo->vbFrame;
  1783. fbInfo->vbWTL = pDecInfo->vbWTL;
  1784. for (i=0 ; i<MAX_REG_FRAME; i++)
  1785. {
  1786. fbInfo->vbFbcYTbl[i] = pDecInfo->vbFbcYTbl[i];
  1787. fbInfo->vbFbcCTbl[i] = pDecInfo->vbFbcCTbl[i];
  1788. fbInfo->vbMvCol[i] = pDecInfo->vbMV[i];
  1789. }
  1790. for (i=0; i<MAX_GDI_IDX*2; i++) {
  1791. fbInfo->framebufPool[i] = pDecInfo->frameBufPool[i];
  1792. }
  1793. fbInfo->vbTask = pDecInfo->vbTask;
  1794. }
  1795. break;
  1796. case DEC_RESET_FRAMEBUF_INFO:
  1797. {
  1798. int i;
  1799. pDecInfo->vbFrame.base = 0;
  1800. pDecInfo->vbFrame.phys_addr = 0;
  1801. pDecInfo->vbFrame.virt_addr = 0;
  1802. pDecInfo->vbFrame.size = 0;
  1803. pDecInfo->vbWTL.base = 0;
  1804. pDecInfo->vbWTL.phys_addr = 0;
  1805. pDecInfo->vbWTL.virt_addr = 0;
  1806. pDecInfo->vbWTL.size = 0;
  1807. for (i=0 ; i<MAX_REG_FRAME; i++)
  1808. {
  1809. pDecInfo->vbFbcYTbl[i].base = 0;
  1810. pDecInfo->vbFbcYTbl[i].phys_addr = 0;
  1811. pDecInfo->vbFbcYTbl[i].virt_addr = 0;
  1812. pDecInfo->vbFbcYTbl[i].size = 0;
  1813. pDecInfo->vbFbcCTbl[i].base = 0;
  1814. pDecInfo->vbFbcCTbl[i].phys_addr = 0;
  1815. pDecInfo->vbFbcCTbl[i].virt_addr = 0;
  1816. pDecInfo->vbFbcCTbl[i].size = 0;
  1817. pDecInfo->vbMV[i].base = 0;
  1818. pDecInfo->vbMV[i].phys_addr = 0;
  1819. pDecInfo->vbMV[i].virt_addr = 0;
  1820. pDecInfo->vbMV[i].size = 0;
  1821. }
  1822. pDecInfo->frameDisplayFlag = 0;
  1823. pDecInfo->setDisplayIndexes = 0;
  1824. pDecInfo->clearDisplayIndexes = 0;
  1825. break;
  1826. }
  1827. case DEC_GET_QUEUE_STATUS:
  1828. {
  1829. QueueStatusInfo* queueInfo = (QueueStatusInfo*)param;
  1830. queueInfo->instanceQueueCount = pDecInfo->instanceQueueCount;
  1831. queueInfo->reportQueueCount = pDecInfo->reportQueueCount;
  1832. break;
  1833. }
  1834. case ENABLE_DEC_THUMBNAIL_MODE:
  1835. {
  1836. pDecInfo->thumbnailMode = 1;
  1837. break;
  1838. }
  1839. case DEC_GET_SEQ_INFO:
  1840. {
  1841. DecInitialInfo* seqInfo = (DecInitialInfo*)param;
  1842. *seqInfo = pDecInfo->initialInfo;
  1843. break;
  1844. }
  1845. case DEC_GET_FIELD_PIC_TYPE:
  1846. {
  1847. return RETCODE_FAILURE;
  1848. }
  1849. case DEC_GET_DISPLAY_OUTPUT_INFO:
  1850. {
  1851. DecOutputInfo *pDecOutInfo = (DecOutputInfo *)param;
  1852. *pDecOutInfo = pDecInfo->decOutInfo[pDecOutInfo->indexFrameDisplay];
  1853. break;
  1854. }
  1855. case GET_TILEDMAP_CONFIG:
  1856. {
  1857. TiledMapConfig *pMapCfg = (TiledMapConfig *)param;
  1858. if (!pMapCfg) {
  1859. return RETCODE_INVALID_PARAM;
  1860. }
  1861. if (!pDecInfo->stride) {
  1862. return RETCODE_WRONG_CALL_SEQUENCE;
  1863. }
  1864. *pMapCfg = pDecInfo->mapCfg;
  1865. break;
  1866. }
  1867. case SET_DRAM_CONFIG:
  1868. {
  1869. DRAMConfig *cfg = (DRAMConfig *)param;
  1870. if (!cfg) {
  1871. return RETCODE_INVALID_PARAM;
  1872. }
  1873. pDecInfo->dramCfg = *cfg;
  1874. break;
  1875. }
  1876. case GET_DRAM_CONFIG:
  1877. {
  1878. DRAMConfig *cfg = (DRAMConfig *)param;
  1879. if (!cfg) {
  1880. return RETCODE_INVALID_PARAM;
  1881. }
  1882. *cfg = pDecInfo->dramCfg;
  1883. break;
  1884. }
  1885. case GET_LOW_DELAY_OUTPUT:
  1886. {
  1887. DecOutputInfo *lowDelayOutput;
  1888. if (param == 0) {
  1889. return RETCODE_INVALID_PARAM;
  1890. }
  1891. if (!pDecInfo->lowDelayInfo.lowDelayEn || pCodecInst->codecMode != AVC_DEC) {
  1892. return RETCODE_INVALID_COMMAND;
  1893. }
  1894. if (pCodecInst != GetPendingInst(pCodecInst->coreIdx)) {
  1895. return RETCODE_WRONG_CALL_SEQUENCE;
  1896. }
  1897. lowDelayOutput = (DecOutputInfo *)param;
  1898. GetLowDelayOutput(pCodecInst, lowDelayOutput);
  1899. }
  1900. break;
  1901. case ENABLE_LOGGING:
  1902. {
  1903. pCodecInst->loggingEnable = 1;
  1904. }
  1905. break;
  1906. case DISABLE_LOGGING:
  1907. {
  1908. pCodecInst->loggingEnable = 0;
  1909. }
  1910. break;
  1911. case DEC_SET_SEQ_CHANGE_MASK:
  1912. if (PRODUCT_ID_NOT_W_SERIES(pCodecInst->productId))
  1913. return RETCODE_INVALID_PARAM;
  1914. pDecInfo->seqChangeMask = *(int*)param;
  1915. break;
  1916. case DEC_SET_WTL_FRAME_FORMAT:
  1917. pDecInfo->wtlFormat = *(FrameBufferFormat*)param;
  1918. break;
  1919. case DEC_SET_DISPLAY_FLAG:
  1920. {
  1921. Int32 index;
  1922. VpuAttr* pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  1923. BOOL supportCommandQueue = FALSE;
  1924. if (param == 0) {
  1925. return RETCODE_INVALID_PARAM;
  1926. }
  1927. index = *(Int32 *)param;
  1928. supportCommandQueue = (pAttr->supportCommandQueue == TRUE);
  1929. if (supportCommandQueue == TRUE) {
  1930. EnterLock(pCodecInst->coreIdx);
  1931. ProductSetDispFlag(pCodecInst, index);
  1932. LeaveLock(pCodecInst->coreIdx);
  1933. }
  1934. else {
  1935. EnterDispFlagLock(pCodecInst->coreIdx);
  1936. pDecInfo->setDisplayIndexes |= (1<<index);
  1937. LeaveDispFlagLock(pCodecInst->coreIdx);
  1938. }
  1939. }
  1940. break;
  1941. case DEC_GET_SCALER_INFO:
  1942. {
  1943. ScalerInfo* scalerInfo = (ScalerInfo*)param;
  1944. if (scalerInfo == NULL) {
  1945. return RETCODE_INVALID_PARAM;
  1946. }
  1947. scalerInfo->enScaler = pDecInfo->scalerEnable;
  1948. scalerInfo->scaleWidth = pDecInfo->scaleWidth;
  1949. scalerInfo->scaleHeight = pDecInfo->scaleHeight;
  1950. }
  1951. break;
  1952. case DEC_SET_SCALER_INFO:
  1953. {
  1954. ScalerInfo* scalerInfo = (ScalerInfo*)param;
  1955. if (!pDecInfo->initialInfoObtained) {
  1956. return RETCODE_WRONG_CALL_SEQUENCE;
  1957. }
  1958. if (scalerInfo == NULL) {
  1959. return RETCODE_INVALID_PARAM;
  1960. }
  1961. pDecInfo->scalerEnable = scalerInfo->enScaler;
  1962. if (scalerInfo->enScaler == TRUE) {
  1963. VpuAttr* pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  1964. Uint32 scalerStep = (pAttr->support2AlignScaler == TRUE) ? 2 : 8;
  1965. // minW = Ceil8(picWidth/8), minH = Ceil8(picHeight/8)
  1966. Uint32 minScaleWidth = VPU_ALIGN8(pDecInfo->initialInfo.picWidth>>3);
  1967. Uint32 minScaleHeight = VPU_ALIGN8(pDecInfo->initialInfo.picHeight>>3);
  1968. if (minScaleWidth == 0) minScaleWidth = 8;
  1969. if (minScaleHeight == 0) minScaleHeight = 8;
  1970. if (scalerInfo->scaleWidth < minScaleWidth || scalerInfo->scaleHeight < minScaleHeight) {
  1971. return RETCODE_INVALID_PARAM;
  1972. }
  1973. if (scalerInfo->scaleWidth > 0 || scalerInfo->scaleHeight > 0) {
  1974. if ((scalerInfo->scaleWidth % scalerStep) || scalerInfo->scaleWidth > (Uint32)(VPU_ALIGN8(pDecInfo->initialInfo.picWidth))) {
  1975. return RETCODE_INVALID_PARAM;
  1976. }
  1977. if ((scalerInfo->scaleHeight % scalerStep) || scalerInfo->scaleHeight > (Uint32)(VPU_ALIGN8(pDecInfo->initialInfo.picHeight))) {
  1978. return RETCODE_INVALID_PARAM;
  1979. }
  1980. pDecInfo->scaleWidth = scalerInfo->scaleWidth;
  1981. pDecInfo->scaleHeight = scalerInfo->scaleHeight;
  1982. pDecInfo->scalerEnable = scalerInfo->enScaler;
  1983. }
  1984. }
  1985. break;
  1986. }
  1987. case DEC_SET_TARGET_TEMPORAL_ID:
  1988. if (param == NULL) {
  1989. return RETCODE_INVALID_PARAM;
  1990. }
  1991. if (pDecInfo->tempIdSelectMode == FALSE)
  1992. pDecInfo->targetSubLayerId = *(Uint32*)param;
  1993. else
  1994. pDecInfo->relTargetLayerId = *(Uint32*)param;
  1995. break;
  1996. case DEC_SET_TEMPORAL_ID_MODE:
  1997. if (param == NULL) {
  1998. return RETCODE_INVALID_PARAM;
  1999. }
  2000. pDecInfo->tempIdSelectMode = *(Uint32*)param;
  2001. break;
  2002. case DEC_SET_BWB_CUR_FRAME_IDX:
  2003. pDecInfo->chBwbFrameIdx = *(Uint32*)param;
  2004. break;
  2005. case DEC_SET_FBC_CUR_FRAME_IDX:
  2006. pDecInfo->chFbcFrameIdx = *(Uint32*)param;
  2007. break;
  2008. case DEC_SET_INTER_RES_INFO_ON:
  2009. pDecInfo->interResChange = 1;
  2010. break;
  2011. case DEC_SET_INTER_RES_INFO_OFF:
  2012. pDecInfo->interResChange = 0;
  2013. break;
  2014. case DEC_FREE_FBC_TABLE_BUFFER:
  2015. {
  2016. Uint32 fbcCurFrameIdx = *(Uint32*)param;
  2017. if(pDecInfo->vbFbcYTbl[fbcCurFrameIdx].size > 0) {
  2018. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcYTbl[fbcCurFrameIdx], DEC_FBCY_TBL, pCodecInst->instIndex);
  2019. pDecInfo->vbFbcYTbl[fbcCurFrameIdx].size = 0;
  2020. }
  2021. if(pDecInfo->vbFbcCTbl[fbcCurFrameIdx].size > 0) {
  2022. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcCTbl[fbcCurFrameIdx], DEC_FBCC_TBL, pCodecInst->instIndex);
  2023. pDecInfo->vbFbcCTbl[fbcCurFrameIdx].size = 0;
  2024. }
  2025. }
  2026. break;
  2027. case DEC_FREE_MV_BUFFER:
  2028. {
  2029. Uint32 fbcCurFrameIdx = *(Uint32*)param;
  2030. if(pDecInfo->vbMV[fbcCurFrameIdx].size > 0) {
  2031. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbMV[fbcCurFrameIdx], DEC_MV, pCodecInst->instIndex);
  2032. pDecInfo->vbMV[fbcCurFrameIdx].size = 0;
  2033. }
  2034. }
  2035. break;
  2036. case DEC_ALLOC_MV_BUFFER:
  2037. {
  2038. Uint32 fbcCurFrameIdx = *(Uint32*)param;
  2039. Uint32 size;
  2040. size = WAVE5_DEC_VP9_MVCOL_BUF_SIZE(pDecInfo->initialInfo.picWidth, pDecInfo->initialInfo.picHeight);
  2041. pDecInfo->vbMV[fbcCurFrameIdx].phys_addr = 0;
  2042. pDecInfo->vbMV[fbcCurFrameIdx].size = ((size+4095)&~4095)+4096; /* 4096 is a margin */
  2043. if (vdi_allocate_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbMV[fbcCurFrameIdx], DEC_MV, pCodecInst->instIndex) < 0)
  2044. return RETCODE_INSUFFICIENT_RESOURCE;
  2045. }
  2046. break;
  2047. case DEC_ALLOC_FBC_Y_TABLE_BUFFER:
  2048. {
  2049. Uint32 fbcCurFrameIdx = *(Uint32*)param;
  2050. Uint32 size;
  2051. size = WAVE5_FBC_LUMA_TABLE_SIZE(VPU_ALIGN64(pDecInfo->initialInfo.picWidth), VPU_ALIGN64(pDecInfo->initialInfo.picHeight));
  2052. size = VPU_ALIGN16(size);
  2053. pDecInfo->vbFbcYTbl[fbcCurFrameIdx].phys_addr = 0;
  2054. pDecInfo->vbFbcYTbl[fbcCurFrameIdx].size = ((size+4095)&~4095)+4096;
  2055. if (vdi_allocate_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcYTbl[fbcCurFrameIdx], DEC_FBCY_TBL, pCodecInst->instIndex) < 0)
  2056. return RETCODE_INSUFFICIENT_RESOURCE;
  2057. }
  2058. break;
  2059. case DEC_ALLOC_FBC_C_TABLE_BUFFER:
  2060. {
  2061. Uint32 fbcCurFrameIdx = *(Uint32*)param;
  2062. Uint32 size;
  2063. size = WAVE5_FBC_CHROMA_TABLE_SIZE(VPU_ALIGN64(pDecInfo->initialInfo.picWidth), VPU_ALIGN64(pDecInfo->initialInfo.picHeight));
  2064. size = VPU_ALIGN16(size);
  2065. pDecInfo->vbFbcCTbl[fbcCurFrameIdx].phys_addr = 0;
  2066. pDecInfo->vbFbcCTbl[fbcCurFrameIdx].size = ((size+4095)&~4095)+4096;
  2067. if (vdi_allocate_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcCTbl[fbcCurFrameIdx], DEC_FBCC_TBL, pCodecInst->instIndex) < 0)
  2068. return RETCODE_INSUFFICIENT_RESOURCE;
  2069. }
  2070. break;
  2071. case GET_BANDWIDTH_REPORT:
  2072. ret = ProductVpuGetBandwidth(pCodecInst, (VPUBWData*)param);
  2073. break;
  2074. case SET_CYCLE_PER_TICK:
  2075. {
  2076. pDecInfo->cyclePerTick = *(Uint32 *)param;
  2077. }
  2078. break;
  2079. case GET_DEBUG_INFORM:
  2080. ret = ProductVpuGetDebugInfo(pCodecInst, (VPUDebugInfo*)param);
  2081. break;
  2082. default:
  2083. return RETCODE_INVALID_COMMAND;
  2084. }
  2085. return ret;
  2086. }
  2087. RetCode VPU_DecAllocateFrameBuffer(DecHandle handle, FrameBufferAllocInfo info, FrameBuffer *frameBuffer)
  2088. {
  2089. CodecInst* pCodecInst;
  2090. DecInfo* pDecInfo;
  2091. RetCode ret;
  2092. Uint32 gdiIndex;
  2093. ret = CheckDecInstanceValidity(handle);
  2094. if (ret != RETCODE_SUCCESS)
  2095. return ret;
  2096. pCodecInst = handle;
  2097. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  2098. if (!frameBuffer) {
  2099. return RETCODE_INVALID_PARAM;
  2100. }
  2101. if (info.type == FB_TYPE_PPU) {
  2102. if (pDecInfo->numFrameBuffers == 0)
  2103. return RETCODE_WRONG_CALL_SEQUENCE;
  2104. if (frameBuffer[0].updateFbInfo == TRUE) {
  2105. pDecInfo->ppuAllocExt = TRUE;
  2106. }
  2107. pDecInfo->ppuAllocExt = frameBuffer[0].updateFbInfo;
  2108. gdiIndex = pDecInfo->numFbsForDecoding;
  2109. ret = ProductVpuAllocateFramebuffer(
  2110. pCodecInst, frameBuffer, (TiledMapType)info.mapType, (Int32)info.num,
  2111. info.stride, info.height, info.format, info.cbcrInterleave, info.nv21, info.endian, &pDecInfo->vbPPU, gdiIndex, FB_TYPE_PPU);
  2112. }
  2113. else if (info.type == FB_TYPE_CODEC) {
  2114. gdiIndex = 0;
  2115. if (frameBuffer[0].updateFbInfo == TRUE) {
  2116. pDecInfo->frameAllocExt = TRUE;
  2117. }
  2118. ret = ProductVpuAllocateFramebuffer(
  2119. pCodecInst, frameBuffer, (TiledMapType)info.mapType, (Int32)info.num,
  2120. info.stride, info.height, info.format, info.cbcrInterleave, info.nv21, info.endian, &pDecInfo->vbFrame, gdiIndex, (FramebufferAllocType)info.type);
  2121. pDecInfo->mapCfg.tiledBaseAddr = pDecInfo->vbFrame.phys_addr;
  2122. }
  2123. return ret;
  2124. }
  2125. RetCode VPU_EncOpen(EncHandle* pHandle, EncOpenParam * pop)
  2126. {
  2127. CodecInst* pCodecInst;
  2128. EncInfo* pEncInfo;
  2129. RetCode ret;
  2130. if ((ret=ProductCheckEncOpenParam(pop)) != RETCODE_SUCCESS)
  2131. return ret;
  2132. EnterLock(pop->coreIdx);
  2133. if (VPU_IsInit(pop->coreIdx) == 0) {
  2134. LeaveLock(pop->coreIdx);
  2135. return RETCODE_NOT_INITIALIZED;
  2136. }
  2137. ret = GetCodecInstance(pop->coreIdx, &pCodecInst);
  2138. if (ret == RETCODE_FAILURE) {
  2139. *pHandle = 0;
  2140. LeaveLock(pop->coreIdx);
  2141. return RETCODE_FAILURE;
  2142. }
  2143. pCodecInst->isDecoder = FALSE;
  2144. *pHandle = pCodecInst;
  2145. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2146. osal_memset(pEncInfo, 0x00, sizeof(EncInfo));
  2147. pEncInfo->openParam = *pop;
  2148. if ((ret=ProductVpuEncBuildUpOpenParam(pCodecInst, pop)) != RETCODE_SUCCESS) {
  2149. *pHandle = 0;
  2150. }
  2151. LeaveLock(pCodecInst->coreIdx);
  2152. return ret;
  2153. }
  2154. RetCode VPU_EncClose(EncHandle handle)
  2155. {
  2156. CodecInst* pCodecInst;
  2157. EncInfo* pEncInfo;
  2158. RetCode ret;
  2159. ret = CheckEncInstanceValidity(handle);
  2160. if (ret != RETCODE_SUCCESS) {
  2161. return ret;
  2162. }
  2163. pCodecInst = handle;
  2164. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2165. EnterLock(pCodecInst->coreIdx);
  2166. if (pEncInfo->initialInfoObtained) {
  2167. VpuWriteReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr, pEncInfo->streamWrPtr);
  2168. VpuWriteReg(pCodecInst->coreIdx, pEncInfo->streamRdPtrRegAddr, pEncInfo->streamRdPtr);
  2169. if ((ret=ProductVpuEncFiniSeq(pCodecInst)) != RETCODE_SUCCESS) {
  2170. if (pCodecInst->loggingEnable)
  2171. vdi_log(pCodecInst->coreIdx, ENC_SEQ_END, 2);
  2172. if (ret == RETCODE_VPU_STILL_RUNNING) {
  2173. LeaveLock(pCodecInst->coreIdx);
  2174. return ret;
  2175. }
  2176. }
  2177. if (pCodecInst->loggingEnable)
  2178. vdi_log(pCodecInst->coreIdx, ENC_SEQ_END, 0);
  2179. pEncInfo->streamWrPtr = VpuReadReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr);
  2180. }
  2181. if (pEncInfo->vbScratch.size) {
  2182. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbScratch, ENC_ETC, pCodecInst->instIndex);
  2183. }
  2184. if (pEncInfo->vbWork.size) {
  2185. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbWork, ENC_WORK, pCodecInst->instIndex);
  2186. }
  2187. if (pEncInfo->vbFrame.size) {
  2188. if (pEncInfo->frameAllocExt == 0)
  2189. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbFrame, ENC_ETC, pCodecInst->instIndex);
  2190. }
  2191. if (pCodecInst->codecMode == W_HEVC_ENC || pCodecInst->codecMode == W_SVAC_ENC || pCodecInst->codecMode == W_AVC_ENC) {
  2192. if (pEncInfo->vbSubSamBuf.size)
  2193. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbSubSamBuf, ENC_SUBSAMBUF, pCodecInst->instIndex);
  2194. if (pEncInfo->vbMV.size)
  2195. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbMV, ENC_MV, pCodecInst->instIndex);
  2196. if (pEncInfo->vbFbcYTbl.size)
  2197. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbFbcYTbl, ENC_FBCY_TBL, pCodecInst->instIndex);
  2198. if (pEncInfo->vbFbcCTbl.size)
  2199. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbFbcCTbl, ENC_FBCC_TBL, pCodecInst->instIndex);
  2200. if (pEncInfo->vbTemp.size)
  2201. vdi_dettach_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbTemp);
  2202. }
  2203. if (pEncInfo->vbPPU.size) {
  2204. if (pEncInfo->ppuAllocExt == 0)
  2205. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbPPU, ENC_ETC, pCodecInst->instIndex);
  2206. }
  2207. if (pEncInfo->vbSubSampFrame.size)
  2208. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbSubSampFrame, ENC_ETC, pCodecInst->instIndex);
  2209. if (pEncInfo->vbMvcSubSampFrame.size)
  2210. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbMvcSubSampFrame, ENC_ETC, pCodecInst->instIndex);
  2211. if (pEncInfo->vbTask.size)
  2212. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbTask, ENC_TASK, pCodecInst->instIndex);
  2213. LeaveLock(pCodecInst->coreIdx);
  2214. FreeCodecInstance(pCodecInst);
  2215. return ret;
  2216. }
  2217. RetCode VPU_EncGetInitialInfo(EncHandle handle, EncInitialInfo * info)
  2218. {
  2219. CodecInst* pCodecInst;
  2220. EncInfo* pEncInfo;
  2221. RetCode ret;
  2222. ret = CheckEncInstanceValidity(handle);
  2223. if (ret != RETCODE_SUCCESS)
  2224. return ret;
  2225. if (info == 0) {
  2226. return RETCODE_INVALID_PARAM;
  2227. }
  2228. pCodecInst = handle;
  2229. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2230. EnterLock(pCodecInst->coreIdx);
  2231. if (GetPendingInst(pCodecInst->coreIdx)) {
  2232. LeaveLock(pCodecInst->coreIdx);
  2233. return RETCODE_FRAME_NOT_COMPLETE;
  2234. }
  2235. if ((ret=ProductVpuEncSetup(pCodecInst)) != RETCODE_SUCCESS) {
  2236. LeaveLock(pCodecInst->coreIdx);
  2237. return ret;
  2238. }
  2239. if (pCodecInst->codecMode == AVC_ENC && pCodecInst->codecModeAux == AVC_AUX_MVC)
  2240. info->minFrameBufferCount = 3; // reconstructed frame + 2 reference frame
  2241. else if(pCodecInst->codecMode == W_HEVC_ENC || pCodecInst->codecMode == W_SVAC_ENC || pCodecInst->codecMode == W_AVC_ENC) {
  2242. info->minFrameBufferCount = pEncInfo->initialInfo.minFrameBufferCount;
  2243. info->minSrcFrameCount = pEncInfo->initialInfo.minSrcFrameCount;
  2244. }
  2245. else
  2246. info->minFrameBufferCount = 2; // reconstructed frame + reference frame
  2247. pEncInfo->initialInfo = *info;
  2248. pEncInfo->initialInfoObtained = TRUE;
  2249. LeaveLock(pCodecInst->coreIdx);
  2250. return RETCODE_SUCCESS;
  2251. }
  2252. RetCode VPU_EncRegisterFrameBuffer(EncHandle handle, FrameBuffer* bufArray, int num, int stride, int height, TiledMapType mapType)
  2253. {
  2254. CodecInst* pCodecInst;
  2255. EncInfo* pEncInfo;
  2256. Int32 i;
  2257. RetCode ret;
  2258. EncOpenParam* openParam;
  2259. FrameBuffer* fb;
  2260. ret = CheckEncInstanceValidity(handle);
  2261. // FIXME temp
  2262. if (ret != RETCODE_SUCCESS)
  2263. return ret;
  2264. pCodecInst = handle;
  2265. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2266. openParam = &pEncInfo->openParam;
  2267. if (pEncInfo->stride)
  2268. return RETCODE_CALLED_BEFORE;
  2269. if (!pEncInfo->initialInfoObtained)
  2270. return RETCODE_WRONG_CALL_SEQUENCE;
  2271. if (num < pEncInfo->initialInfo.minFrameBufferCount)
  2272. return RETCODE_INSUFFICIENT_FRAME_BUFFERS;
  2273. if (stride == 0 || (stride % 8 != 0) || stride < 0)
  2274. return RETCODE_INVALID_STRIDE;
  2275. if (height == 0 || height < 0)
  2276. return RETCODE_INVALID_PARAM;
  2277. if ( pEncInfo->productCode == WAVE521C_DUAL_CODE) {
  2278. if (openParam->bitstreamFormat == STD_HEVC) {
  2279. if (stride % 16 != 0)
  2280. return RETCODE_INVALID_STRIDE;
  2281. }
  2282. }
  2283. else {
  2284. if (openParam->bitstreamFormat == STD_HEVC) {
  2285. if (stride % 32 != 0)
  2286. return RETCODE_INVALID_STRIDE;
  2287. }
  2288. }
  2289. EnterLock(pCodecInst->coreIdx);
  2290. if (GetPendingInst(pCodecInst->coreIdx)) {
  2291. LeaveLock(pCodecInst->coreIdx);
  2292. return RETCODE_FRAME_NOT_COMPLETE;
  2293. }
  2294. pEncInfo->numFrameBuffers = num;
  2295. pEncInfo->stride = stride;
  2296. pEncInfo->frameBufferHeight = height;
  2297. pEncInfo->mapType = mapType;
  2298. pEncInfo->mapCfg.productId = pCodecInst->productId;
  2299. if (bufArray) {
  2300. for(i=0; i<num; i++) {
  2301. pEncInfo->frameBufPool[i] = bufArray[i];
  2302. }
  2303. if (openParam->EncStdParam.waveParam.svcEnable == TRUE) {
  2304. for(i=num; i<num*2; i++) {
  2305. pEncInfo->frameBufPool[i] = bufArray[i];
  2306. }
  2307. }
  2308. }
  2309. if (pEncInfo->frameAllocExt == FALSE) {
  2310. fb = pEncInfo->frameBufPool;
  2311. if (bufArray) {
  2312. if (bufArray[0].bufCb == (PhysicalAddress)-1 && bufArray[0].bufCr == (PhysicalAddress)-1) {
  2313. Uint32 size;
  2314. pEncInfo->frameAllocExt = TRUE;
  2315. size = ProductCalculateFrameBufSize(pCodecInst, pCodecInst->productId, stride, height,
  2316. (TiledMapType)mapType, (FrameBufferFormat)openParam->srcFormat,
  2317. (BOOL)openParam->cbcrInterleave, NULL);
  2318. if (mapType == LINEAR_FRAME_MAP) {
  2319. pEncInfo->vbFrame.phys_addr = bufArray[0].bufY;
  2320. pEncInfo->vbFrame.size = size * num;
  2321. }
  2322. }
  2323. }
  2324. ret = ProductVpuAllocateFramebuffer(
  2325. pCodecInst, fb, (TiledMapType)mapType, num, stride, height, (FrameBufferFormat)openParam->srcFormat,
  2326. openParam->cbcrInterleave, FALSE, openParam->frameEndian, &pEncInfo->vbFrame, 0, FB_TYPE_CODEC);
  2327. if (ret != RETCODE_SUCCESS) {
  2328. SetPendingInst(pCodecInst->coreIdx, 0);
  2329. LeaveLock(pCodecInst->coreIdx);
  2330. return ret;
  2331. }
  2332. }
  2333. ret = ProductVpuRegisterFramebuffer(pCodecInst);
  2334. SetPendingInst(pCodecInst->coreIdx, 0);
  2335. LeaveLock(pCodecInst->coreIdx);
  2336. return ret;
  2337. }
  2338. RetCode VPU_EncGetBitstreamBuffer( EncHandle handle,
  2339. PhysicalAddress * prdPrt,
  2340. PhysicalAddress * pwrPtr,
  2341. int * size)
  2342. {
  2343. CodecInst * pCodecInst;
  2344. EncInfo * pEncInfo;
  2345. PhysicalAddress rdPtr;
  2346. PhysicalAddress wrPtr;
  2347. Uint32 room;
  2348. RetCode ret;
  2349. ret = CheckEncInstanceValidity(handle);
  2350. if (ret != RETCODE_SUCCESS)
  2351. return ret;
  2352. if ( prdPrt == 0 || pwrPtr == 0 || size == 0) {
  2353. return RETCODE_INVALID_PARAM;
  2354. }
  2355. pCodecInst = handle;
  2356. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2357. rdPtr = pEncInfo->streamRdPtr;
  2358. if (GetPendingInst(pCodecInst->coreIdx) == pCodecInst)
  2359. wrPtr = VpuReadReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr);
  2360. else {
  2361. if (handle->productId == PRODUCT_ID_521) {
  2362. EnterLock(pCodecInst->coreIdx);
  2363. ProductVpuEncGetRdWrPtr(pCodecInst, &rdPtr, &wrPtr);
  2364. LeaveLock(pCodecInst->coreIdx);
  2365. }
  2366. else
  2367. wrPtr = pEncInfo->streamWrPtr;
  2368. }
  2369. if(pEncInfo->ringBufferEnable == 1 || pEncInfo->lineBufIntEn == 1) {
  2370. if (wrPtr >= rdPtr) {
  2371. room = wrPtr - rdPtr;
  2372. }
  2373. else {
  2374. room = (pEncInfo->streamBufEndAddr - rdPtr) + (wrPtr - pEncInfo->streamBufStartAddr);
  2375. }
  2376. }
  2377. else {
  2378. if(wrPtr >= rdPtr)
  2379. room = wrPtr - rdPtr;
  2380. else
  2381. return RETCODE_INVALID_PARAM;
  2382. }
  2383. *prdPrt = rdPtr;
  2384. *pwrPtr = wrPtr;
  2385. *size = room;
  2386. return RETCODE_SUCCESS;
  2387. }
  2388. RetCode VPU_EncUpdateBitstreamBuffer(
  2389. EncHandle handle,
  2390. int size)
  2391. {
  2392. CodecInst * pCodecInst;
  2393. EncInfo * pEncInfo;
  2394. PhysicalAddress wrPtr;
  2395. PhysicalAddress rdPtr;
  2396. RetCode ret;
  2397. int room = 0;
  2398. ret = CheckEncInstanceValidity(handle);
  2399. if (ret != RETCODE_SUCCESS)
  2400. return ret;
  2401. pCodecInst = handle;
  2402. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2403. rdPtr = pEncInfo->streamRdPtr;
  2404. if (GetPendingInst(pCodecInst->coreIdx) == pCodecInst)
  2405. wrPtr = VpuReadReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr);
  2406. else
  2407. wrPtr = pEncInfo->streamWrPtr;
  2408. if ( rdPtr < wrPtr ) {
  2409. if ( rdPtr + size > wrPtr ) {
  2410. return RETCODE_INVALID_PARAM;
  2411. }
  2412. }
  2413. if (PRODUCT_ID_NOT_W_SERIES(pCodecInst->productId)) {
  2414. //************** for CODA *********************/
  2415. if (pEncInfo->ringBufferEnable == TRUE || pEncInfo->lineBufIntEn == TRUE) {
  2416. rdPtr += size;
  2417. if (rdPtr > pEncInfo->streamBufEndAddr) {
  2418. if (pEncInfo->lineBufIntEn == TRUE) {
  2419. return RETCODE_INVALID_PARAM;
  2420. }
  2421. room = rdPtr - pEncInfo->streamBufEndAddr;
  2422. rdPtr = pEncInfo->streamBufStartAddr;
  2423. rdPtr += room;
  2424. }
  2425. if (rdPtr == pEncInfo->streamBufEndAddr)
  2426. rdPtr = pEncInfo->streamBufStartAddr;
  2427. }
  2428. else {
  2429. rdPtr = pEncInfo->streamBufStartAddr;
  2430. }
  2431. }
  2432. else {
  2433. //************** for WAVE5 *********************/
  2434. if (size > 0) {
  2435. if (pEncInfo->ringBufferEnable == TRUE) {
  2436. rdPtr += size;
  2437. if (pEncInfo->ringBufferWrapEnable == TRUE) {
  2438. //======== [case1]. ring=1 & wrap=1 ===================
  2439. if (rdPtr > pEncInfo->streamBufEndAddr) {
  2440. if (pEncInfo->lineBufIntEn == TRUE) {
  2441. return RETCODE_INVALID_PARAM;
  2442. }
  2443. room = rdPtr - pEncInfo->streamBufEndAddr;
  2444. rdPtr = pEncInfo->streamBufStartAddr;
  2445. rdPtr += room;
  2446. }
  2447. pEncInfo->streamRdPtr = rdPtr;
  2448. EnterLock(pCodecInst->coreIdx);
  2449. ProductVpuEncUpdateBitstreamBuffer(pCodecInst, size);
  2450. LeaveLock(pCodecInst->coreIdx);
  2451. if (rdPtr == pEncInfo->streamBufEndAddr) {
  2452. //set EndAddr to FW and set StartAddr to API
  2453. rdPtr = pEncInfo->streamBufStartAddr; // wrap-around
  2454. }
  2455. }
  2456. else {
  2457. //========= [case2]. ring=1 & wrap=0 ===================
  2458. pEncInfo->streamRdPtr = rdPtr;
  2459. EnterLock(pCodecInst->coreIdx);
  2460. ProductVpuEncUpdateBitstreamBuffer(pCodecInst, size);
  2461. LeaveLock(pCodecInst->coreIdx);
  2462. if (rdPtr == pEncInfo->streamBufEndAddr) {
  2463. //set EndAddr to FW and set StartAddr to API
  2464. rdPtr = pEncInfo->streamBufStartAddr; // start? end? [FIX ME]
  2465. }
  2466. }
  2467. }
  2468. else {
  2469. //========= [case3]. Line buffer mode ===================
  2470. if (VPU_ALIGN16(wrPtr) >= pEncInfo->streamRdPtr + pEncInfo->streamBufSize) { // linebuffer full detected. already host read whole bistream in bitstreamBuffer.
  2471. EnterLock(pCodecInst->coreIdx);
  2472. ProductVpuEncUpdateBitstreamBuffer(pCodecInst, size);
  2473. LeaveLock(pCodecInst->coreIdx);
  2474. }
  2475. }
  2476. }
  2477. else {
  2478. //************ update new CPB buffer addr/size ***************/
  2479. if (size == UPDATE_NEW_BS_BUF) {
  2480. pEncInfo->streamRdPtr = pEncInfo->streamBufStartAddr;
  2481. pEncInfo->streamBufTobeReadStartAddr = pEncInfo->streamBufStartAddr;
  2482. pEncInfo->streamBufTobeReadSize = pEncInfo->streamBufSize;
  2483. pEncInfo->streamBufTobeReadEndAddr = pEncInfo->streamBufStartAddr + pEncInfo->streamBufSize;
  2484. EnterLock(pCodecInst->coreIdx);
  2485. ProductVpuEncUpdateBitstreamBuffer(pCodecInst, size);
  2486. LeaveLock(pCodecInst->coreIdx);
  2487. rdPtr = pEncInfo->streamBufStartAddr;
  2488. }
  2489. }
  2490. }
  2491. pEncInfo->streamRdPtr = rdPtr;
  2492. pEncInfo->streamWrPtr = wrPtr;
  2493. if (GetPendingInst(pCodecInst->coreIdx) == pCodecInst)
  2494. VpuWriteReg(pCodecInst->coreIdx, pEncInfo->streamRdPtrRegAddr, rdPtr);
  2495. if (pEncInfo->ringBufferEnable == FALSE && pEncInfo->lineBufIntEn == TRUE) {
  2496. pEncInfo->streamRdPtr = pEncInfo->streamBufStartAddr;
  2497. }
  2498. return RETCODE_SUCCESS;
  2499. }
  2500. RetCode VPU_EncStartOneFrame(
  2501. EncHandle handle,
  2502. EncParam * param
  2503. )
  2504. {
  2505. CodecInst* pCodecInst;
  2506. EncInfo* pEncInfo;
  2507. RetCode ret;
  2508. VpuAttr* pAttr = NULL;
  2509. vpu_instance_pool_t* vip;
  2510. ret = CheckEncInstanceValidity(handle);
  2511. if (ret != RETCODE_SUCCESS)
  2512. return ret;
  2513. pCodecInst = handle;
  2514. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2515. vip = (vpu_instance_pool_t *)vdi_get_instance_pool(pCodecInst->coreIdx);
  2516. if (!vip) {
  2517. return RETCODE_INVALID_HANDLE;
  2518. }
  2519. if (pEncInfo->stride == 0) { // This means frame buffers have not been registered.
  2520. return RETCODE_WRONG_CALL_SEQUENCE;
  2521. }
  2522. ret = CheckEncParam(handle, param);
  2523. if (ret != RETCODE_SUCCESS) {
  2524. return ret;
  2525. }
  2526. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  2527. EnterLock(pCodecInst->coreIdx);
  2528. pEncInfo->ptsMap[param->srcIdx] = (pEncInfo->openParam.enablePTS == TRUE) ? GetTimestamp(handle) : param->pts;
  2529. if (GetPendingInst(pCodecInst->coreIdx)) {
  2530. LeaveLock(pCodecInst->coreIdx);
  2531. return RETCODE_FRAME_NOT_COMPLETE;
  2532. }
  2533. ret = ProductVpuEncode(pCodecInst, param);
  2534. if (pAttr->supportCommandQueue == TRUE) {
  2535. SetPendingInst(pCodecInst->coreIdx, NULL);
  2536. LeaveLock(pCodecInst->coreIdx);
  2537. }
  2538. else {
  2539. SetPendingInst(pCodecInst->coreIdx, pCodecInst);
  2540. }
  2541. return ret;
  2542. }
  2543. RetCode VPU_EncGetOutputInfo(
  2544. EncHandle handle,
  2545. EncOutputInfo* info
  2546. )
  2547. {
  2548. CodecInst* pCodecInst;
  2549. EncInfo* pEncInfo;
  2550. RetCode ret;
  2551. VpuAttr* pAttr;
  2552. ret = CheckEncInstanceValidity(handle);
  2553. if (ret != RETCODE_SUCCESS) {
  2554. return ret;
  2555. }
  2556. if (info == 0) {
  2557. return RETCODE_INVALID_PARAM;
  2558. }
  2559. pCodecInst = handle;
  2560. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2561. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  2562. if (pAttr->supportCommandQueue == TRUE) {
  2563. EnterLock(pCodecInst->coreIdx);
  2564. }
  2565. else {
  2566. if (pCodecInst != GetPendingInst(pCodecInst->coreIdx)) {
  2567. SetPendingInst(pCodecInst->coreIdx, 0);
  2568. LeaveLock(pCodecInst->coreIdx);
  2569. return RETCODE_WRONG_CALL_SEQUENCE;
  2570. }
  2571. }
  2572. ret = ProductVpuEncGetResult(pCodecInst, info);
  2573. if (ret == RETCODE_SUCCESS) {
  2574. if (info->encSrcIdx >= 0 && info->reconFrameIndex >= 0 )
  2575. info->pts = pEncInfo->ptsMap[info->encSrcIdx];
  2576. }
  2577. else {
  2578. info->pts = 0LL;
  2579. }
  2580. SetPendingInst(pCodecInst->coreIdx, 0);
  2581. LeaveLock(pCodecInst->coreIdx);
  2582. return ret;
  2583. }
  2584. RetCode VPU_EncGiveCommand(
  2585. EncHandle handle,
  2586. CodecCommand cmd,
  2587. void* param
  2588. )
  2589. {
  2590. CodecInst* pCodecInst;
  2591. EncInfo* pEncInfo;
  2592. RetCode ret;
  2593. ret = CheckEncInstanceValidity(handle);
  2594. if (ret != RETCODE_SUCCESS) {
  2595. return ret;
  2596. }
  2597. pCodecInst = handle;
  2598. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2599. switch (cmd)
  2600. {
  2601. case ENABLE_ROTATION :
  2602. {
  2603. pEncInfo->rotationEnable = 1;
  2604. }
  2605. break;
  2606. case DISABLE_ROTATION :
  2607. {
  2608. pEncInfo->rotationEnable = 0;
  2609. }
  2610. break;
  2611. case ENABLE_MIRRORING :
  2612. {
  2613. pEncInfo->mirrorEnable = 1;
  2614. }
  2615. break;
  2616. case DISABLE_MIRRORING :
  2617. {
  2618. pEncInfo->mirrorEnable = 0;
  2619. }
  2620. break;
  2621. case SET_MIRROR_DIRECTION :
  2622. {
  2623. MirrorDirection mirDir;
  2624. if (param == 0) {
  2625. return RETCODE_INVALID_PARAM;
  2626. }
  2627. mirDir = *(MirrorDirection *)param;
  2628. if ( !(mirDir == MIRDIR_NONE) && !(mirDir==MIRDIR_HOR) && !(mirDir==MIRDIR_VER) && !(mirDir==MIRDIR_HOR_VER)) {
  2629. return RETCODE_INVALID_PARAM;
  2630. }
  2631. pEncInfo->mirrorDirection = mirDir;
  2632. }
  2633. break;
  2634. case SET_ROTATION_ANGLE :
  2635. {
  2636. int angle;
  2637. if (param == 0) {
  2638. return RETCODE_INVALID_PARAM;
  2639. }
  2640. angle = *(int *)param;
  2641. if (angle != 0 && angle != 90 &&
  2642. angle != 180 && angle != 270) {
  2643. return RETCODE_INVALID_PARAM;
  2644. }
  2645. if (pEncInfo->initialInfoObtained && (angle == 90 || angle ==270)) {
  2646. return RETCODE_INVALID_PARAM;
  2647. }
  2648. pEncInfo->rotationAngle = angle;
  2649. }
  2650. break;
  2651. case SET_CACHE_CONFIG:
  2652. {
  2653. MaverickCacheConfig *mcCacheConfig;
  2654. if (param == 0) {
  2655. return RETCODE_INVALID_PARAM;
  2656. }
  2657. mcCacheConfig = (MaverickCacheConfig *)param;
  2658. pEncInfo->cacheConfig = *mcCacheConfig;
  2659. }
  2660. break;
  2661. case ENC_PUT_VIDEO_HEADER:
  2662. {
  2663. EncHeaderParam *encHeaderParam;
  2664. if (param == 0) {
  2665. return RETCODE_INVALID_PARAM;
  2666. }
  2667. encHeaderParam = (EncHeaderParam *)param;
  2668. if (pCodecInst->codecMode == MP4_ENC ) {
  2669. if (!( VOL_HEADER<=encHeaderParam->headerType && encHeaderParam->headerType <= VIS_HEADER)) {
  2670. return RETCODE_INVALID_PARAM;
  2671. }
  2672. }
  2673. else if (pCodecInst->codecMode == AVC_ENC) {
  2674. if (!( SPS_RBSP<=encHeaderParam->headerType && encHeaderParam->headerType <= PPS_RBSP_MVC)) {
  2675. return RETCODE_INVALID_PARAM;
  2676. }
  2677. }
  2678. else if (pCodecInst->codecMode == W_HEVC_ENC || pCodecInst->codecMode == W_SVAC_ENC || pCodecInst->codecMode == W_AVC_ENC) {
  2679. if (!( CODEOPT_ENC_VPS<=encHeaderParam->headerType && encHeaderParam->headerType <= (CODEOPT_ENC_VPS|CODEOPT_ENC_SPS|CODEOPT_ENC_PPS))) {
  2680. return RETCODE_INVALID_PARAM;
  2681. }
  2682. if (pEncInfo->ringBufferEnable == 0 ) {
  2683. if (encHeaderParam->buf % 16 || encHeaderParam->size == 0)
  2684. return RETCODE_INVALID_PARAM;
  2685. }
  2686. if (encHeaderParam->headerType & CODEOPT_ENC_VCL) // ENC_PUT_VIDEO_HEADER encode only non-vcl header.
  2687. return RETCODE_INVALID_PARAM;
  2688. }
  2689. else
  2690. return RETCODE_INVALID_PARAM;
  2691. if (pEncInfo->ringBufferEnable == 0 ) {
  2692. if (encHeaderParam->buf % 8 || encHeaderParam->size == 0) {
  2693. return RETCODE_INVALID_PARAM;
  2694. }
  2695. }
  2696. if (pCodecInst->codecMode == W_HEVC_ENC || pCodecInst->codecMode == W_SVAC_ENC || pCodecInst->codecMode == W_AVC_ENC) {
  2697. if (handle->productId == PRODUCT_ID_521)
  2698. return Wave5VpuEncGetHeader(handle, encHeaderParam);
  2699. else
  2700. return RETCODE_INVALID_PARAM;
  2701. }
  2702. else {
  2703. return GetEncHeader(handle, encHeaderParam);
  2704. }
  2705. }
  2706. case ENC_SET_PARAM:
  2707. {
  2708. if (param == 0) {
  2709. return RETCODE_INVALID_PARAM;
  2710. }
  2711. pEncInfo->openParam = *(EncOpenParam *)param;
  2712. if (pCodecInst->codecMode != AVC_ENC)
  2713. return RETCODE_INVALID_COMMAND;
  2714. ret = EncParaSet(handle, SPS_RBSP);
  2715. if (ret != RETCODE_SUCCESS)
  2716. return ret;
  2717. ret = EncParaSet(handle, PPS_RBSP);
  2718. if (ret != RETCODE_SUCCESS)
  2719. return ret;
  2720. return ret;
  2721. }
  2722. case ENC_SET_GOP_NUMBER:
  2723. {
  2724. int *pGopNumber =(int *)param;
  2725. if (pCodecInst->codecMode != MP4_ENC && pCodecInst->codecMode != AVC_ENC) {
  2726. return RETCODE_INVALID_COMMAND;
  2727. }
  2728. if (*pGopNumber < 0)
  2729. return RETCODE_INVALID_PARAM;
  2730. pEncInfo->openParam.gopSize = *pGopNumber;
  2731. SetGopNumber(handle, (Uint32 *)pGopNumber);
  2732. }
  2733. break;
  2734. case ENC_SET_INTRA_QP:
  2735. {
  2736. int *pIntraQp =(int *)param;
  2737. if (pCodecInst->codecMode != MP4_ENC && pCodecInst->codecMode != AVC_ENC) {
  2738. return RETCODE_INVALID_COMMAND;
  2739. }
  2740. if (pCodecInst->codecMode == MP4_ENC)
  2741. {
  2742. if(*pIntraQp<1 || *pIntraQp>31)
  2743. return RETCODE_INVALID_PARAM;
  2744. }
  2745. if (pCodecInst->codecMode == AVC_ENC)
  2746. {
  2747. if(*pIntraQp<0 || *pIntraQp>51)
  2748. return RETCODE_INVALID_PARAM;
  2749. }
  2750. SetIntraQp(handle, (Uint32 *)pIntraQp);
  2751. }
  2752. break;
  2753. case ENC_SET_BITRATE:
  2754. {
  2755. int *pBitrate = (int *)param;
  2756. if (pCodecInst->codecMode != MP4_ENC && pCodecInst->codecMode != AVC_ENC) {
  2757. return RETCODE_INVALID_COMMAND;
  2758. }
  2759. {
  2760. if (*pBitrate < 0 || *pBitrate> 32767) {
  2761. return RETCODE_INVALID_PARAM;
  2762. }
  2763. }
  2764. SetBitrate(handle, (Uint32 *)pBitrate);
  2765. }
  2766. break;
  2767. case ENC_SET_FRAME_RATE:
  2768. {
  2769. int *pFramerate = (int *)param;
  2770. if (pCodecInst->codecMode != MP4_ENC && pCodecInst->codecMode != AVC_ENC) {
  2771. return RETCODE_INVALID_COMMAND;
  2772. }
  2773. if (*pFramerate <= 0) {
  2774. return RETCODE_INVALID_PARAM;
  2775. }
  2776. SetFramerate(handle, (Uint32 *)pFramerate);
  2777. }
  2778. break;
  2779. case ENC_SET_INTRA_MB_REFRESH_NUMBER:
  2780. {
  2781. int *pIntraRefreshNum =(int *)param;
  2782. SetIntraRefreshNum(handle, (Uint32 *)pIntraRefreshNum);
  2783. }
  2784. break;
  2785. case ENC_SET_SLICE_INFO:
  2786. {
  2787. EncSliceMode *pSliceMode = (EncSliceMode *)param;
  2788. if(pSliceMode->sliceMode<0 || pSliceMode->sliceMode>1)
  2789. {
  2790. return RETCODE_INVALID_PARAM;
  2791. }
  2792. if(pSliceMode->sliceSizeMode<0 || pSliceMode->sliceSizeMode>1)
  2793. {
  2794. return RETCODE_INVALID_PARAM;
  2795. }
  2796. SetSliceMode(handle, (EncSliceMode *)pSliceMode);
  2797. }
  2798. break;
  2799. case ENC_ENABLE_HEC:
  2800. {
  2801. if (pCodecInst->codecMode != MP4_ENC) {
  2802. return RETCODE_INVALID_COMMAND;
  2803. }
  2804. SetHecMode(handle, 1);
  2805. }
  2806. break;
  2807. case ENC_DISABLE_HEC:
  2808. {
  2809. if (pCodecInst->codecMode != MP4_ENC) {
  2810. return RETCODE_INVALID_COMMAND;
  2811. }
  2812. SetHecMode(handle, 0);
  2813. }
  2814. break;
  2815. case SET_SEC_AXI:
  2816. {
  2817. SecAxiUse secAxiUse;
  2818. if (param == 0) {
  2819. return RETCODE_INVALID_PARAM;
  2820. }
  2821. secAxiUse = *(SecAxiUse *)param;
  2822. if (handle->productId == PRODUCT_ID_521) {
  2823. pEncInfo->secAxiInfo.u.wave.useEncRdoEnable = secAxiUse.u.wave.useEncRdoEnable;
  2824. pEncInfo->secAxiInfo.u.wave.useEncLfEnable = secAxiUse.u.wave.useEncLfEnable;
  2825. }
  2826. else { // coda9 or coda7q or ...
  2827. pEncInfo->secAxiInfo.u.coda9.useBitEnable = secAxiUse.u.coda9.useBitEnable;
  2828. pEncInfo->secAxiInfo.u.coda9.useIpEnable = secAxiUse.u.coda9.useIpEnable;
  2829. pEncInfo->secAxiInfo.u.coda9.useDbkYEnable = secAxiUse.u.coda9.useDbkYEnable;
  2830. pEncInfo->secAxiInfo.u.coda9.useDbkCEnable = secAxiUse.u.coda9.useDbkCEnable;
  2831. pEncInfo->secAxiInfo.u.coda9.useOvlEnable = secAxiUse.u.coda9.useOvlEnable;
  2832. pEncInfo->secAxiInfo.u.coda9.useBtpEnable = secAxiUse.u.coda9.useBtpEnable;
  2833. }
  2834. }
  2835. break;
  2836. case GET_TILEDMAP_CONFIG:
  2837. {
  2838. TiledMapConfig *pMapCfg = (TiledMapConfig *)param;
  2839. if (!pMapCfg) {
  2840. return RETCODE_INVALID_PARAM;
  2841. }
  2842. *pMapCfg = pEncInfo->mapCfg;
  2843. break;
  2844. }
  2845. case SET_DRAM_CONFIG:
  2846. {
  2847. DRAMConfig *cfg = (DRAMConfig *)param;
  2848. if (!cfg) {
  2849. return RETCODE_INVALID_PARAM;
  2850. }
  2851. pEncInfo->dramCfg = *cfg;
  2852. break;
  2853. }
  2854. case GET_DRAM_CONFIG:
  2855. {
  2856. DRAMConfig *cfg = (DRAMConfig *)param;
  2857. if (!cfg) {
  2858. return RETCODE_INVALID_PARAM;
  2859. }
  2860. *cfg = pEncInfo->dramCfg;
  2861. break;
  2862. }
  2863. case ENABLE_LOGGING:
  2864. {
  2865. pCodecInst->loggingEnable = 1;
  2866. }
  2867. break;
  2868. case DISABLE_LOGGING:
  2869. {
  2870. pCodecInst->loggingEnable = 0;
  2871. }
  2872. break;
  2873. case ENC_SET_PARA_CHANGE:
  2874. {
  2875. EncChangeParam* option = (EncChangeParam*)param;
  2876. if (handle->productId == PRODUCT_ID_521)
  2877. return Wave5VpuEncParaChange(handle, option);
  2878. else
  2879. return RETCODE_INVALID_PARAM;
  2880. }
  2881. case GET_BANDWIDTH_REPORT :
  2882. return ProductVpuGetBandwidth(pCodecInst, (VPUBWData*)param);
  2883. case ENC_GET_QUEUE_STATUS:
  2884. {
  2885. QueueStatusInfo* queueInfo = (QueueStatusInfo*)param;
  2886. queueInfo->instanceQueueCount = pEncInfo->instanceQueueCount;
  2887. queueInfo->reportQueueCount = pEncInfo->reportQueueCount;
  2888. break;
  2889. }
  2890. case ENC_WRPTR_SEL:
  2891. {
  2892. pEncInfo->encWrPtrSel = *(int *)param;
  2893. }
  2894. break;
  2895. case SET_CYCLE_PER_TICK:
  2896. {
  2897. pEncInfo->cyclePerTick = *(Uint32 *)param;
  2898. }
  2899. break;
  2900. case ENC_GET_SRC_BUF_FLAG:
  2901. return ProductVpuGetSrcBufFlag(pCodecInst, (Uint32*)param);
  2902. case GET_DEBUG_INFORM:
  2903. return ProductVpuGetDebugInfo(pCodecInst, (VPUDebugInfo*)param);
  2904. #ifdef SUPPORT_LOOK_AHEAD_RC
  2905. case ENC_SET_LARC_DATA:
  2906. {
  2907. EncLarcInfo* larcInfo = (EncLarcInfo*)param;
  2908. if (handle->productId == PRODUCT_ID_521)
  2909. return Wave5VpuEncSetLarcData(handle, *larcInfo);
  2910. else
  2911. return RETCODE_INVALID_PARAM;
  2912. }
  2913. break;
  2914. #endif
  2915. default:
  2916. return RETCODE_INVALID_COMMAND;
  2917. }
  2918. return RETCODE_SUCCESS;
  2919. }
  2920. RetCode VPU_EncAllocateFrameBuffer(EncHandle handle, FrameBufferAllocInfo info, FrameBuffer *frameBuffer)
  2921. {
  2922. CodecInst* pCodecInst;
  2923. EncInfo* pEncInfo;
  2924. RetCode ret;
  2925. int gdiIndex;
  2926. ret = CheckEncInstanceValidity(handle);
  2927. if (ret != RETCODE_SUCCESS)
  2928. return ret;
  2929. pCodecInst = handle;
  2930. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2931. if (!frameBuffer) {
  2932. return RETCODE_INVALID_PARAM;
  2933. }
  2934. if (info.num == 0 || info.num < 0) {
  2935. return RETCODE_INVALID_PARAM;
  2936. }
  2937. if (info.stride == 0 || info.stride < 0) {
  2938. return RETCODE_INVALID_PARAM;
  2939. }
  2940. if (info.height == 0 || info.height < 0) {
  2941. return RETCODE_INVALID_PARAM;
  2942. }
  2943. if (info.type == FB_TYPE_PPU) {
  2944. if (pEncInfo->numFrameBuffers == 0) {
  2945. return RETCODE_WRONG_CALL_SEQUENCE;
  2946. }
  2947. pEncInfo->ppuAllocExt = frameBuffer[0].updateFbInfo;
  2948. gdiIndex = pEncInfo->numFrameBuffers;
  2949. ret = ProductVpuAllocateFramebuffer(pCodecInst, frameBuffer, (TiledMapType)info.mapType, (Int32)info.num,
  2950. info.stride, info.height, info.format, info.cbcrInterleave, info.nv21,
  2951. info.endian, &pEncInfo->vbPPU, gdiIndex, (FramebufferAllocType)info.type);
  2952. }
  2953. else if (info.type == FB_TYPE_CODEC) {
  2954. gdiIndex = 0;
  2955. pEncInfo->frameAllocExt = frameBuffer[0].updateFbInfo;
  2956. ret = ProductVpuAllocateFramebuffer(
  2957. pCodecInst, frameBuffer, (TiledMapType)info.mapType, (Int32)info.num,
  2958. info.stride, info.height, info.format, info.cbcrInterleave, FALSE, info.endian, &pEncInfo->vbFrame, gdiIndex, (FramebufferAllocType)info.type);
  2959. }
  2960. else {
  2961. ret = RETCODE_INVALID_PARAM;
  2962. }
  2963. return ret;
  2964. }
  2965. RetCode VPU_EncIssueSeqInit(EncHandle handle)
  2966. {
  2967. CodecInst* pCodecInst;
  2968. RetCode ret;
  2969. VpuAttr* pAttr;
  2970. ret = CheckEncInstanceValidity(handle);
  2971. if (ret != RETCODE_SUCCESS)
  2972. return ret;
  2973. pCodecInst = handle;
  2974. EnterLock(pCodecInst->coreIdx);
  2975. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  2976. if (GetPendingInst(pCodecInst->coreIdx)) {
  2977. LeaveLock(pCodecInst->coreIdx);
  2978. return RETCODE_FRAME_NOT_COMPLETE;
  2979. }
  2980. ret = ProductVpuEncInitSeq(handle);
  2981. if (ret == RETCODE_SUCCESS) {
  2982. SetPendingInst(pCodecInst->coreIdx, pCodecInst);
  2983. }
  2984. if (pAttr->supportCommandQueue == TRUE) {
  2985. SetPendingInst(pCodecInst->coreIdx, NULL);
  2986. LeaveLock(pCodecInst->coreIdx);
  2987. }
  2988. return ret;
  2989. }
  2990. RetCode VPU_EncCompleteSeqInit(EncHandle handle, EncInitialInfo * info)
  2991. {
  2992. CodecInst* pCodecInst;
  2993. EncInfo* pEncInfo;
  2994. RetCode ret;
  2995. VpuAttr* pAttr;
  2996. ret = CheckEncInstanceValidity(handle);
  2997. if (ret != RETCODE_SUCCESS) {
  2998. return ret;
  2999. }
  3000. if (info == 0) {
  3001. return RETCODE_INVALID_PARAM;
  3002. }
  3003. pCodecInst = handle;
  3004. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  3005. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  3006. if (pAttr->supportCommandQueue == TRUE) {
  3007. EnterLock(pCodecInst->coreIdx);
  3008. }
  3009. else {
  3010. if (pCodecInst != GetPendingInst(pCodecInst->coreIdx)) {
  3011. SetPendingInst(pCodecInst->coreIdx, 0);
  3012. LeaveLock(pCodecInst->coreIdx);
  3013. return RETCODE_WRONG_CALL_SEQUENCE;
  3014. }
  3015. }
  3016. ret = ProductVpuEncGetSeqInfo(handle, info);
  3017. if (ret == RETCODE_SUCCESS) {
  3018. pEncInfo->initialInfoObtained = 1;
  3019. }
  3020. //info->rdPtr = VpuReadReg(pCodecInst->coreIdx, pEncInfo->streamRdPtrRegAddr);
  3021. //info->wrPtr = VpuReadReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr);
  3022. //pEncInfo->prevFrameEndPos = info->rdPtr;
  3023. pEncInfo->initialInfo = *info;
  3024. SetPendingInst(pCodecInst->coreIdx, NULL);
  3025. LeaveLock(pCodecInst->coreIdx);
  3026. return ret;
  3027. }