vpuapi.c 114 KB

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  1. //SPDX-License-Identifier: LGPL-2.1 OR BSD-3-Clause
  2. /*
  3. * Copyright (c) 2019, Chips&Media
  4. * All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions are met:
  8. *
  9. * 1. Redistributions of source code must retain the above copyright notice, this
  10. * list of conditions and the following disclaimer.
  11. * 2. Redistributions in binary form must reproduce the above copyright notice,
  12. * this list of conditions and the following disclaimer in the documentation
  13. * and/or other materials provided with the distribution.
  14. *
  15. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  16. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  17. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  18. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
  19. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  20. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  21. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  22. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  23. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  24. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25. */
  26. #include "vpuapifunc.h"
  27. #include "product.h"
  28. #include "wave/wave5_regdefine.h"
  29. #include "wave/wave5.h"
  30. #include "misc/debug.h"
  31. #define W5_RET_DEC_DISPLAY_SIZE (W5_REG_BASE + 0x01D8) // [FIX ME] delete ? or not?
  32. #define INVALID_CORE_INDEX_RETURN_ERROR(_coreIdx) \
  33. if (_coreIdx >= MAX_NUM_VPU_CORE) \
  34. return -1;
  35. static const Uint16* s_pusBitCode[MAX_NUM_VPU_CORE] = {NULL,};
  36. static int s_bitCodeSize[MAX_NUM_VPU_CORE] = {0,};
  37. Uint32 __VPU_BUSY_TIMEOUT = VPU_BUSY_CHECK_TIMEOUT;
  38. static RetCode CheckDecInstanceValidity(CodecInst* pCodecInst)
  39. {
  40. RetCode ret;
  41. if (pCodecInst == NULL)
  42. return RETCODE_INVALID_HANDLE;
  43. ret = CheckInstanceValidity(pCodecInst);
  44. if (ret != RETCODE_SUCCESS) {
  45. return RETCODE_INVALID_HANDLE;
  46. }
  47. if (!pCodecInst->inUse) {
  48. return RETCODE_INVALID_HANDLE;
  49. }
  50. return ProductVpuDecCheckCapability(pCodecInst);
  51. }
  52. Int32 VPU_IsInit(Uint32 coreIdx)
  53. {
  54. Int32 pc;
  55. INVALID_CORE_INDEX_RETURN_ERROR(coreIdx);
  56. pc = ProductVpuIsInit(coreIdx);
  57. return pc;
  58. }
  59. Int32 VPU_WaitInterrupt(Uint32 coreIdx, int timeout)
  60. {
  61. Int32 ret;
  62. CodecInst* instance;
  63. INVALID_CORE_INDEX_RETURN_ERROR(coreIdx);
  64. if ((instance=GetPendingInst(coreIdx)) != NULL) {
  65. ret = ProductVpuWaitInterrupt(instance, timeout);
  66. }
  67. else {
  68. ret = -1;
  69. }
  70. return ret;
  71. }
  72. Int32 VPU_WaitInterruptEx(VpuHandle handle, int timeout)
  73. {
  74. Int32 ret;
  75. CodecInst *pCodecInst;
  76. pCodecInst = handle;
  77. INVALID_CORE_INDEX_RETURN_ERROR(pCodecInst->coreIdx);
  78. ret = ProductVpuWaitInterrupt(pCodecInst, timeout);
  79. return ret;
  80. }
  81. void VPU_ClearInterrupt(Uint32 coreIdx)
  82. {
  83. /* clear all interrupt flags */
  84. ProductVpuClearInterrupt(coreIdx, 0xffff);
  85. }
  86. void VPU_ClearInterruptEx(VpuHandle handle, Int32 intrFlag)
  87. {
  88. CodecInst *pCodecInst;
  89. pCodecInst = handle;
  90. ProductVpuClearInterrupt(pCodecInst->coreIdx, intrFlag);
  91. }
  92. int VPU_GetFrameBufSize(VpuHandle handle, int coreIdx, int stride, int height, int mapType, int format, int interleave, DRAMConfig *pDramCfg)
  93. {
  94. int productId;
  95. CodecInst *pCodecInst;
  96. pCodecInst = handle;
  97. UNREFERENCED_PARAMETER(interleave); /*!<< for backward compatiblity */
  98. if (coreIdx < 0 || coreIdx >= MAX_NUM_VPU_CORE)
  99. return -1;
  100. productId = ProductVpuGetId(coreIdx);
  101. return ProductCalculateFrameBufSize(pCodecInst, productId, stride, height, (TiledMapType)mapType, (FrameBufferFormat)format, (BOOL)interleave, pDramCfg);
  102. }
  103. int VPU_GetProductId(int coreIdx)
  104. {
  105. Int32 productId;
  106. INVALID_CORE_INDEX_RETURN_ERROR(coreIdx);
  107. if ((productId=ProductVpuGetId(coreIdx)) != PRODUCT_ID_NONE) {
  108. return productId;
  109. }
  110. if (vdi_init(coreIdx) < 0)
  111. return -1;
  112. EnterLock(coreIdx);
  113. if (ProductVpuScan(coreIdx) == FALSE)
  114. productId = -1;
  115. else
  116. productId = ProductVpuGetId(coreIdx);
  117. LeaveLock((coreIdx));
  118. vdi_release(coreIdx);
  119. return productId;
  120. }
  121. int VPU_GetOpenInstanceNum(Uint32 coreIdx)
  122. {
  123. INVALID_CORE_INDEX_RETURN_ERROR(coreIdx);
  124. return vdi_get_instance_num(coreIdx);
  125. }
  126. static RetCode InitializeVPU(Uint32 coreIdx, const Uint16* code, Uint32 size)
  127. {
  128. RetCode ret;
  129. if (vdi_init(coreIdx) < 0)
  130. return RETCODE_FAILURE;
  131. EnterLock(coreIdx);
  132. if (vdi_get_instance_num(coreIdx) > 0) {
  133. if (ProductVpuScan(coreIdx) == 0) {
  134. LeaveLock(coreIdx);
  135. return RETCODE_NOT_FOUND_VPU_DEVICE;
  136. }
  137. }
  138. /* force to reset vpu, so that the vpu in a clean state */
  139. if (VPU_IsInit(coreIdx) != 0) {
  140. ProductVpuReInit(coreIdx, (void *)code, size);
  141. LeaveLock(coreIdx);
  142. return RETCODE_CALLED_BEFORE;
  143. }
  144. InitCodecInstancePool(coreIdx);
  145. ret = ProductVpuReset(coreIdx, SW_RESET_ON_BOOT);
  146. if (ret != RETCODE_SUCCESS) {
  147. LeaveLock(coreIdx);
  148. return ret;
  149. }
  150. #if defined(SUPPORT_SW_UART) || defined(SUPPORT_SW_UART_V2)
  151. create_sw_uart_thread(coreIdx);
  152. usleep(500*1000);
  153. #endif
  154. ret = ProductVpuInit(coreIdx, (void*)code, size);
  155. if (ret != RETCODE_SUCCESS) {
  156. LeaveLock(coreIdx);
  157. return ret;
  158. }
  159. LeaveLock(coreIdx);
  160. return RETCODE_SUCCESS;
  161. }
  162. RetCode VPU_Init(Uint32 coreIdx)
  163. {
  164. if (coreIdx >= MAX_NUM_VPU_CORE)
  165. return RETCODE_INVALID_PARAM;
  166. if (s_bitCodeSize[coreIdx] == 0)
  167. return RETCODE_NOT_FOUND_BITCODE_PATH;
  168. return InitializeVPU(coreIdx, s_pusBitCode[coreIdx], s_bitCodeSize[coreIdx]);
  169. }
  170. RetCode VPU_InitWithBitcode(Uint32 coreIdx, const Uint16* code, Uint32 size)
  171. {
  172. if (coreIdx >= MAX_NUM_VPU_CORE)
  173. return RETCODE_INVALID_PARAM;
  174. if (code == NULL || size == 0)
  175. return RETCODE_INVALID_PARAM;
  176. s_pusBitCode[coreIdx] = NULL;
  177. s_pusBitCode[coreIdx] = (Uint16 *)osal_malloc(size*sizeof(Uint16));
  178. if (!s_pusBitCode[coreIdx])
  179. return RETCODE_INSUFFICIENT_RESOURCE;
  180. osal_memcpy((void *)s_pusBitCode[coreIdx], (const void *)code, size*sizeof(Uint16));
  181. s_bitCodeSize[coreIdx] = size;
  182. return InitializeVPU(coreIdx, code, size);
  183. }
  184. RetCode VPU_DeInit(Uint32 coreIdx)
  185. {
  186. int ret;
  187. if (coreIdx >= MAX_NUM_VPU_CORE)
  188. return RETCODE_INVALID_PARAM;
  189. EnterLock(coreIdx);
  190. if (s_pusBitCode[coreIdx]) {
  191. osal_free((void *)s_pusBitCode[coreIdx]);
  192. }
  193. s_pusBitCode[coreIdx] = NULL;
  194. s_bitCodeSize[coreIdx] = 0;
  195. LeaveLock(coreIdx);
  196. #if defined(SUPPORT_SW_UART) || defined(SUPPORT_SW_UART_V2)
  197. destory_sw_uart_thread();
  198. #endif
  199. ret = vdi_release(coreIdx);
  200. if (ret != 0)
  201. return RETCODE_FAILURE;
  202. return RETCODE_SUCCESS;
  203. }
  204. RetCode VPU_GetVersionInfo(Uint32 coreIdx, Uint32 *versionInfo, Uint32 *revision, Uint32 *productId)
  205. {
  206. RetCode ret;
  207. if (coreIdx >= MAX_NUM_VPU_CORE)
  208. return RETCODE_INVALID_PARAM;
  209. EnterLock(coreIdx);
  210. if (ProductVpuIsInit(coreIdx) == 0) {
  211. LeaveLock(coreIdx);
  212. return RETCODE_NOT_INITIALIZED;
  213. }
  214. if (GetPendingInst(coreIdx)) {
  215. LeaveLock(coreIdx);
  216. return RETCODE_FRAME_NOT_COMPLETE;
  217. }
  218. if (productId != NULL) {
  219. *productId = ProductVpuGetId(coreIdx);
  220. }
  221. ret = ProductVpuGetVersion(coreIdx, versionInfo, revision);
  222. LeaveLock(coreIdx);
  223. return ret;
  224. }
  225. RetCode VPU_GetProductInfo(Uint32 coreIdx, VpuAttr *productInfo)
  226. {
  227. RetCode ret;
  228. if (coreIdx >= MAX_NUM_VPU_CORE)
  229. return RETCODE_INVALID_PARAM;
  230. EnterLock(coreIdx);
  231. if (ProductVpuIsInit(coreIdx) == 0) {
  232. LeaveLock(coreIdx);
  233. return RETCODE_NOT_INITIALIZED;
  234. }
  235. if (GetPendingInst(coreIdx)) {
  236. LeaveLock(coreIdx);
  237. return RETCODE_FRAME_NOT_COMPLETE;
  238. }
  239. productInfo->productId = ProductVpuGetId(coreIdx);
  240. ret = ProductVpuGetProductInfo(coreIdx, productInfo);
  241. LeaveLock(coreIdx);
  242. return ret;
  243. }
  244. RetCode VPU_DecOpen(DecHandle* pHandle, DecOpenParam* pop)
  245. {
  246. CodecInst * pCodecInst;
  247. DecInfo* pDecInfo;
  248. RetCode ret;
  249. ret = ProductCheckDecOpenParam(pop);
  250. if (ret != RETCODE_SUCCESS)
  251. return ret;
  252. EnterLock(pop->coreIdx);
  253. if (VPU_IsInit(pop->coreIdx) == 0) {
  254. LeaveLock(pop->coreIdx);
  255. return RETCODE_NOT_INITIALIZED;
  256. }
  257. ret = GetCodecInstance(pop->coreIdx, &pCodecInst);
  258. if (ret != RETCODE_SUCCESS)
  259. {
  260. *pHandle = 0;
  261. LeaveLock(pop->coreIdx);
  262. return ret;
  263. }
  264. pCodecInst->isDecoder = TRUE;
  265. *pHandle = pCodecInst;
  266. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  267. osal_memset(pDecInfo, 0x00, sizeof(DecInfo));
  268. osal_memcpy((void*)&pDecInfo->openParam, pop, sizeof(DecOpenParam));
  269. if (pop->bitstreamFormat == STD_MPEG4) {
  270. pCodecInst->codecMode = MP4_DEC;
  271. pCodecInst->codecModeAux = MP4_AUX_MPEG4;
  272. }
  273. else if (pop->bitstreamFormat == STD_AVC) {
  274. if (pCodecInst->productId == PRODUCT_ID_521 || pCodecInst->productId == PRODUCT_ID_511 || pCodecInst->productId == PRODUCT_ID_517) {
  275. pCodecInst->codecMode = W_AVC_DEC;
  276. }
  277. else {
  278. pCodecInst->codecMode = AVC_DEC;
  279. pCodecInst->codecModeAux = pop->avcExtension;
  280. }
  281. }
  282. else if (pop->bitstreamFormat == STD_VC1) {
  283. pCodecInst->codecMode = VC1_DEC;
  284. }
  285. else if (pop->bitstreamFormat == STD_MPEG2) {
  286. pCodecInst->codecMode = MP2_DEC;
  287. }
  288. else if (pop->bitstreamFormat == STD_H263) {
  289. pCodecInst->codecMode = MP4_DEC;
  290. pCodecInst->codecModeAux = MP4_AUX_MPEG4;
  291. }
  292. else if (pop->bitstreamFormat == STD_DIV3) {
  293. pCodecInst->codecMode = DV3_DEC;
  294. pCodecInst->codecModeAux = MP4_AUX_DIVX3;
  295. }
  296. else if (pop->bitstreamFormat == STD_RV) {
  297. pCodecInst->codecMode = RV_DEC;
  298. }
  299. else if (pop->bitstreamFormat == STD_AVS) {
  300. pCodecInst->codecMode = AVS_DEC;
  301. }
  302. else if (pop->bitstreamFormat == STD_THO) {
  303. pCodecInst->codecMode = VPX_DEC;
  304. pCodecInst->codecModeAux = VPX_AUX_THO;
  305. }
  306. else if (pop->bitstreamFormat == STD_VP3) {
  307. pCodecInst->codecMode = VPX_DEC;
  308. pCodecInst->codecModeAux = VPX_AUX_THO;
  309. }
  310. else if (pop->bitstreamFormat == STD_VP8) {
  311. pCodecInst->codecMode = VPX_DEC;
  312. pCodecInst->codecModeAux = VPX_AUX_VP8;
  313. }
  314. else if (pop->bitstreamFormat == STD_HEVC) {
  315. pCodecInst->codecMode = W_HEVC_DEC;
  316. }
  317. else if (pop->bitstreamFormat == STD_VP9) {
  318. pCodecInst->codecMode = W_VP9_DEC;
  319. }
  320. else if (pop->bitstreamFormat == STD_AVS2) {
  321. pCodecInst->codecMode = W_AVS2_DEC;
  322. }
  323. else if (pop->bitstreamFormat == STD_SVAC) {
  324. pCodecInst->codecMode = W_SVAC_DEC;
  325. }
  326. else if (pop->bitstreamFormat == STD_AV1) {
  327. pCodecInst->codecMode = W_AV1_DEC;
  328. }
  329. else {
  330. LeaveLock(pop->coreIdx);
  331. return RETCODE_INVALID_PARAM;
  332. }
  333. pDecInfo->wtlEnable = pop->wtlEnable;
  334. pDecInfo->wtlMode = pop->wtlMode;
  335. if (!pDecInfo->wtlEnable)
  336. pDecInfo->wtlMode = 0;
  337. pDecInfo->streamWrPtr = pop->bitstreamBuffer;
  338. pDecInfo->streamRdPtr = pop->bitstreamBuffer;
  339. pDecInfo->frameDelay = -1;
  340. pDecInfo->streamBufStartAddr = pop->bitstreamBuffer;
  341. pDecInfo->streamBufSize = pop->bitstreamBufferSize;
  342. pDecInfo->streamBufEndAddr = pop->bitstreamBuffer + pop->bitstreamBufferSize;
  343. pDecInfo->reorderEnable = VPU_REORDER_ENABLE;
  344. pDecInfo->mirrorDirection = MIRDIR_NONE;
  345. pDecInfo->prevFrameEndPos = pop->bitstreamBuffer;
  346. pDecInfo->tempIdSelectMode = pop->tempIdSelectMode;
  347. pDecInfo->targetSubLayerId = DECODE_ALL_TEMPORAL_LAYERS;
  348. pDecInfo->relTargetLayerId = 0;
  349. if ((ret=ProductVpuDecBuildUpOpenParam(pCodecInst, pop)) != RETCODE_SUCCESS) {
  350. *pHandle = 0;
  351. LeaveLock(pCodecInst->coreIdx);
  352. return ret;
  353. }
  354. pDecInfo->tiled2LinearEnable = pop->tiled2LinearEnable;
  355. pDecInfo->tiled2LinearMode = pop->tiled2LinearMode;
  356. if (!pDecInfo->tiled2LinearEnable)
  357. pDecInfo->tiled2LinearMode = 0; //coda980 only
  358. if (!pDecInfo->wtlEnable) //coda980, wave320, wave410 only
  359. pDecInfo->wtlMode = 0;
  360. osal_memset((void*)&pDecInfo->cacheConfig, 0x00, sizeof(MaverickCacheConfig));
  361. LeaveLock(pCodecInst->coreIdx);
  362. return RETCODE_SUCCESS;
  363. }
  364. RetCode VPU_DecClose(DecHandle handle)
  365. {
  366. CodecInst * pCodecInst;
  367. DecInfo * pDecInfo;
  368. RetCode ret;
  369. int i;
  370. ret = CheckDecInstanceValidity(handle);
  371. if (ret != RETCODE_SUCCESS) {
  372. return ret;
  373. }
  374. pCodecInst = handle;
  375. if (!pCodecInst) {
  376. return RETCODE_INVALID_HANDLE;
  377. }
  378. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  379. EnterLock(pCodecInst->coreIdx);
  380. if ((ret=ProductVpuDecFiniSeq(pCodecInst)) != RETCODE_SUCCESS) {
  381. if (pCodecInst->loggingEnable)
  382. vdi_log(pCodecInst->coreIdx, DEC_SEQ_END, 2);
  383. if (ret == RETCODE_VPU_STILL_RUNNING) {
  384. LeaveLock(pCodecInst->coreIdx);
  385. return ret;
  386. }
  387. }
  388. if (pCodecInst->loggingEnable)
  389. vdi_log(pCodecInst->coreIdx, DEC_SEQ_END, 0);
  390. if (pDecInfo->vbSlice.size)
  391. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbSlice, DEC_ETC, pCodecInst->instIndex);
  392. if (pDecInfo->vbWork.size) {
  393. if (pDecInfo->workBufferAllocExt == 0) {
  394. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbWork, DEC_WORK, pCodecInst->instIndex);
  395. }
  396. else {
  397. vdi_dettach_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbWork);
  398. }
  399. }
  400. if (pDecInfo->vbFrame.size) {
  401. if (pDecInfo->frameAllocExt == 0) {
  402. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFrame, DEC_ETC, pCodecInst->instIndex);
  403. }
  404. }
  405. for ( i=0 ; i<MAX_REG_FRAME; i++) {
  406. if (pDecInfo->vbMV[i].size)
  407. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbMV[i], DEC_MV, pCodecInst->instIndex);
  408. if (pDecInfo->vbFbcYTbl[i].size)
  409. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcYTbl[i], DEC_FBCY_TBL, pCodecInst->instIndex);
  410. if (pDecInfo->vbFbcCTbl[i].size)
  411. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcCTbl[i], DEC_FBCC_TBL, pCodecInst->instIndex);
  412. }
  413. if (pDecInfo->vbTemp.size)
  414. vdi_dettach_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbTemp);
  415. if (pDecInfo->vbPPU.size) {
  416. if (pDecInfo->ppuAllocExt == 0)
  417. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbPPU, DEC_ETC, pCodecInst->instIndex);
  418. }
  419. if (pDecInfo->vbWTL.size)
  420. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbWTL, DEC_FB_LINEAR, pCodecInst->instIndex);
  421. if (pDecInfo->vbUserData.size)
  422. vdi_dettach_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbUserData);
  423. if (pDecInfo->vbReport.size)
  424. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbReport, DEC_ETC, pCodecInst->instIndex);
  425. if (pDecInfo->vbTask.size)
  426. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbTask, DEC_TASK, pCodecInst->instIndex);
  427. if (GetPendingInst(pCodecInst->coreIdx) == pCodecInst)
  428. ClearPendingInst(pCodecInst->coreIdx);
  429. LeaveLock(pCodecInst->coreIdx);
  430. FreeCodecInstance(pCodecInst);
  431. return ret;
  432. }
  433. RetCode VPU_DecSetEscSeqInit(DecHandle handle, int escape)
  434. {
  435. CodecInst * pCodecInst;
  436. DecInfo * pDecInfo;
  437. RetCode ret;
  438. ret = CheckDecInstanceValidity(handle);
  439. if (ret != RETCODE_SUCCESS)
  440. return ret;
  441. pCodecInst = handle;
  442. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  443. if (pDecInfo->openParam.bitstreamMode != BS_MODE_INTERRUPT)
  444. return RETCODE_INVALID_PARAM;
  445. pDecInfo->seqInitEscape = escape;
  446. return RETCODE_SUCCESS;
  447. }
  448. RetCode VPU_DecGetInitialInfo(DecHandle handle, DecInitialInfo* info)
  449. {
  450. CodecInst* pCodecInst;
  451. DecInfo* pDecInfo;
  452. RetCode ret;
  453. Int32 flags;
  454. Uint32 interruptBit;
  455. VpuAttr* pAttr;
  456. if (PRODUCT_ID_W_SERIES(handle->productId)) {
  457. if (handle->productId == PRODUCT_ID_512 || handle->productId == PRODUCT_ID_515 || handle->productId == PRODUCT_ID_517 || handle->productId == PRODUCT_ID_521 || handle->productId == PRODUCT_ID_511) {
  458. interruptBit = INT_WAVE5_INIT_SEQ;
  459. }
  460. else
  461. return RETCODE_INVALID_PARAM;
  462. }
  463. else {
  464. /* CODA9xx */
  465. interruptBit = INT_BIT_SEQ_INIT;
  466. }
  467. ret = CheckDecInstanceValidity(handle);
  468. if (ret != RETCODE_SUCCESS)
  469. return ret;
  470. if (info == NULL)
  471. return RETCODE_INVALID_PARAM;
  472. pCodecInst = handle;
  473. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  474. ret = ProductVpuDecCheckCapability(pCodecInst);
  475. if (ret != RETCODE_SUCCESS)
  476. return ret;
  477. EnterLock(pCodecInst->coreIdx);
  478. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  479. if (GetPendingInst(pCodecInst->coreIdx)) {
  480. /* The other instance is running */
  481. LeaveLock(pCodecInst->coreIdx);
  482. return RETCODE_FRAME_NOT_COMPLETE;
  483. }
  484. if (DecBitstreamBufEmpty(pDecInfo)) {
  485. LeaveLock(pCodecInst->coreIdx);
  486. return RETCODE_WRONG_CALL_SEQUENCE;
  487. }
  488. ret = ProductVpuDecInitSeq(handle);
  489. if (ret != RETCODE_SUCCESS) {
  490. LeaveLock(pCodecInst->coreIdx);
  491. return ret;
  492. }
  493. if (pAttr->supportCommandQueue == TRUE) {
  494. LeaveLock(pCodecInst->coreIdx);
  495. }
  496. flags = ProductVpuWaitInterrupt(pCodecInst, __VPU_BUSY_TIMEOUT);
  497. if (pAttr->supportCommandQueue == TRUE) {
  498. EnterLock(pCodecInst->coreIdx);
  499. }
  500. if (flags == -1) {
  501. info->rdPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr);
  502. info->wrPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamWrPtrRegAddr);
  503. ret = RETCODE_VPU_RESPONSE_TIMEOUT;
  504. }
  505. else {
  506. if (flags&(1<<interruptBit))
  507. ProductVpuClearInterrupt(pCodecInst->coreIdx, (1<<interruptBit));
  508. if (flags != (1<<interruptBit))
  509. ret = RETCODE_FAILURE;
  510. else
  511. ret = ProductVpuDecGetSeqInfo(handle, info);
  512. }
  513. info->rdPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr);
  514. info->wrPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamWrPtrRegAddr);
  515. pDecInfo->initialInfo = *info;
  516. if (ret == RETCODE_SUCCESS) {
  517. pDecInfo->initialInfoObtained = 1;
  518. }
  519. SetPendingInst(pCodecInst->coreIdx, 0);
  520. LeaveLock(pCodecInst->coreIdx);
  521. return ret;
  522. }
  523. RetCode VPU_DecIssueSeqInit(DecHandle handle)
  524. {
  525. CodecInst* pCodecInst;
  526. RetCode ret;
  527. VpuAttr* pAttr;
  528. ret = CheckDecInstanceValidity(handle);
  529. if (ret != RETCODE_SUCCESS)
  530. return ret;
  531. pCodecInst = handle;
  532. EnterLock(pCodecInst->coreIdx);
  533. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  534. if (GetPendingInst(pCodecInst->coreIdx)) {
  535. LeaveLock(pCodecInst->coreIdx);
  536. return RETCODE_FRAME_NOT_COMPLETE;
  537. }
  538. ret = ProductVpuDecInitSeq(handle);
  539. if (ret == RETCODE_SUCCESS) {
  540. SetPendingInst(pCodecInst->coreIdx, pCodecInst);
  541. }
  542. if (pAttr->supportCommandQueue == TRUE) {
  543. SetPendingInst(pCodecInst->coreIdx, NULL);
  544. LeaveLock(pCodecInst->coreIdx);
  545. }
  546. return ret;
  547. }
  548. RetCode VPU_DecCompleteSeqInit(DecHandle handle, DecInitialInfo * info)
  549. {
  550. CodecInst* pCodecInst;
  551. DecInfo* pDecInfo;
  552. RetCode ret;
  553. VpuAttr* pAttr;
  554. ret = CheckDecInstanceValidity(handle);
  555. if (ret != RETCODE_SUCCESS) {
  556. return ret;
  557. }
  558. if (info == 0) {
  559. return RETCODE_INVALID_PARAM;
  560. }
  561. pCodecInst = handle;
  562. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  563. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  564. if (pAttr->supportCommandQueue == TRUE) {
  565. EnterLock(pCodecInst->coreIdx);
  566. }
  567. else {
  568. if (pCodecInst != GetPendingInst(pCodecInst->coreIdx)) {
  569. SetPendingInst(pCodecInst->coreIdx, 0);
  570. LeaveLock(pCodecInst->coreIdx);
  571. return RETCODE_WRONG_CALL_SEQUENCE;
  572. }
  573. }
  574. ret = ProductVpuDecGetSeqInfo(handle, info);
  575. if (ret == RETCODE_SUCCESS) {
  576. pDecInfo->initialInfoObtained = 1;
  577. }
  578. info->rdPtr = ProductVpuDecGetRdPtr(pCodecInst);
  579. info->wrPtr = pDecInfo->streamWrPtr;
  580. pDecInfo->prevFrameEndPos = info->rdPtr;
  581. pDecInfo->initialInfo = *info;
  582. SetPendingInst(pCodecInst->coreIdx, NULL);
  583. LeaveLock(pCodecInst->coreIdx);
  584. return ret;
  585. }
  586. static RetCode DecRegisterFrameBuffer(DecHandle handle, FrameBuffer *bufArray, int numFbsForDecoding, int numFbsForWTL, int stride, int height, int mapType)
  587. {
  588. CodecInst* pCodecInst;
  589. DecInfo* pDecInfo;
  590. Int32 i;
  591. RetCode ret;
  592. FrameBuffer* fb, nullFb;
  593. vpu_buffer_t* vb;
  594. FrameBufferFormat format = FORMAT_420;
  595. Int32 totalNumOfFbs;
  596. ret = CheckDecInstanceValidity(handle);
  597. if (ret != RETCODE_SUCCESS)
  598. return ret;
  599. if (numFbsForDecoding > MAX_FRAMEBUFFER_COUNT || numFbsForWTL > MAX_FRAMEBUFFER_COUNT) {
  600. return RETCODE_INVALID_PARAM;
  601. }
  602. osal_memset(&nullFb, 0x00, sizeof(FrameBuffer));
  603. pCodecInst = handle;
  604. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  605. pDecInfo->numFbsForDecoding = numFbsForDecoding;
  606. pDecInfo->numFbsForWTL = numFbsForWTL;
  607. pDecInfo->numFrameBuffers = numFbsForDecoding + numFbsForWTL;
  608. pDecInfo->stride = stride;
  609. if (pCodecInst->codecMode == VPX_DEC)
  610. pDecInfo->frameBufferHeight = VPU_ALIGN64(height);
  611. else if (pCodecInst->codecMode == W_VP9_DEC)
  612. pDecInfo->frameBufferHeight = VPU_ALIGN64(height);
  613. else
  614. pDecInfo->frameBufferHeight = height;
  615. pDecInfo->mapType = mapType;
  616. pDecInfo->mapCfg.productId = pCodecInst->productId;
  617. ret = ProductVpuDecCheckCapability(pCodecInst);
  618. if (ret != RETCODE_SUCCESS)
  619. return ret;
  620. if (!pDecInfo->initialInfoObtained)
  621. return RETCODE_WRONG_CALL_SEQUENCE;
  622. if ( (stride < pDecInfo->initialInfo.picWidth) || (stride % 8 != 0) || (height<pDecInfo->initialInfo.picHeight) ) {
  623. return RETCODE_INVALID_STRIDE;
  624. }
  625. EnterLock(pCodecInst->coreIdx);
  626. if (GetPendingInst(pCodecInst->coreIdx)) {
  627. LeaveLock(pCodecInst->coreIdx);
  628. return RETCODE_FRAME_NOT_COMPLETE;
  629. }
  630. /* clear frameBufPool */
  631. for (i=0; i<(int)(sizeof(pDecInfo->frameBufPool)/sizeof(FrameBuffer)); i++) {
  632. pDecInfo->frameBufPool[i] = nullFb;
  633. }
  634. /* LinearMap or TiledMap, compressed framebuffer inclusive. */
  635. if (pDecInfo->initialInfo.lumaBitdepth > 8 || pDecInfo->initialInfo.chromaBitdepth > 8)
  636. format = FORMAT_420_P10_16BIT_LSB;
  637. totalNumOfFbs = numFbsForDecoding + numFbsForWTL;
  638. if (pCodecInst->codecMode == W_SVAC_DEC && pDecInfo->initialInfo.spatialSvcEnable == TRUE)
  639. totalNumOfFbs = numFbsForDecoding + numFbsForDecoding + numFbsForWTL; // (EL + BL + linear)
  640. if (bufArray) {
  641. for(i=0; i<totalNumOfFbs; i++)
  642. pDecInfo->frameBufPool[i] = bufArray[i];
  643. }
  644. else {
  645. vb = &pDecInfo->vbFrame;
  646. fb = &pDecInfo->frameBufPool[0];
  647. ret = ProductVpuAllocateFramebuffer(
  648. (CodecInst*)handle, fb, (TiledMapType)mapType, numFbsForDecoding, stride, height, format,
  649. pDecInfo->openParam.cbcrInterleave,
  650. pDecInfo->openParam.nv21,
  651. pDecInfo->openParam.frameEndian, vb, 0, FB_TYPE_CODEC);
  652. if (ret != RETCODE_SUCCESS) {
  653. LeaveLock(pCodecInst->coreIdx);
  654. return ret;
  655. }
  656. }
  657. if (pCodecInst->productId != PRODUCT_ID_960) {
  658. pDecInfo->mapCfg.tiledBaseAddr = pDecInfo->frameBufPool[0].bufY;
  659. }
  660. /* LinearMap */
  661. if (pDecInfo->wtlEnable == TRUE || numFbsForWTL != 0) {
  662. pDecInfo->stride = stride;
  663. if (!bufArray) {
  664. TiledMapType map;
  665. map = pDecInfo->wtlMode==FF_FRAME ? LINEAR_FRAME_MAP : LINEAR_FIELD_MAP;
  666. vb = &pDecInfo->vbWTL;
  667. fb = &pDecInfo->frameBufPool[numFbsForDecoding];
  668. ret = ProductVpuAllocateFramebuffer(
  669. (CodecInst*)handle, fb, map, numFbsForWTL, stride, height,
  670. pDecInfo->wtlFormat,
  671. pDecInfo->openParam.cbcrInterleave,
  672. pDecInfo->openParam.nv21,
  673. pDecInfo->openParam.frameEndian, vb, 0, FB_TYPE_PPU);
  674. if (ret != RETCODE_SUCCESS) {
  675. LeaveLock(pCodecInst->coreIdx);
  676. return ret;
  677. }
  678. }
  679. }
  680. ret = ProductVpuRegisterFramebuffer(pCodecInst);
  681. LeaveLock(pCodecInst->coreIdx);
  682. return ret;
  683. }
  684. RetCode VPU_DecRegisterFrameBuffer(DecHandle handle, FrameBuffer *bufArray, int num, int stride, int height, int mapType)
  685. {
  686. DecInfo* pDecInfo = &handle->CodecInfo->decInfo;
  687. Uint32 numWTL = 0;
  688. if (pDecInfo->wtlEnable == TRUE) numWTL = num;
  689. return DecRegisterFrameBuffer(handle, bufArray, num, numWTL, stride, height, mapType);
  690. }
  691. RetCode VPU_DecRegisterFrameBufferEx(DecHandle handle, FrameBuffer *bufArray, int numOfDecFbs, int numOfDisplayFbs, int stride, int height, int mapType)
  692. {
  693. return DecRegisterFrameBuffer(handle, bufArray, numOfDecFbs, numOfDisplayFbs, stride, height, mapType);
  694. }
  695. RetCode VPU_DecGetFrameBuffer(DecHandle handle, int frameIdx, FrameBuffer* frameBuf)
  696. {
  697. CodecInst * pCodecInst;
  698. DecInfo * pDecInfo;
  699. RetCode ret;
  700. ret = CheckDecInstanceValidity(handle);
  701. if (ret != RETCODE_SUCCESS)
  702. return ret;
  703. if (frameBuf == 0)
  704. return RETCODE_INVALID_PARAM;
  705. pCodecInst = handle;
  706. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  707. if (frameIdx < 0 || frameIdx >= pDecInfo->numFrameBuffers)
  708. return RETCODE_INVALID_PARAM;
  709. *frameBuf = pDecInfo->frameBufPool[frameIdx];
  710. return RETCODE_SUCCESS;
  711. }
  712. RetCode VPU_DecUpdateFrameBuffer(
  713. DecHandle handle,
  714. FrameBuffer* fbcFb,
  715. FrameBuffer* linearFb,
  716. Int32 mvColIndex,
  717. Int32 picWidth,
  718. Int32 picHeight
  719. )
  720. {
  721. if (handle == NULL) {
  722. return RETCODE_INVALID_HANDLE;
  723. }
  724. return ProductVpuDecUpdateFrameBuffer((CodecInst*)handle, fbcFb, linearFb, mvColIndex, picWidth, picHeight);
  725. }
  726. RetCode VPU_DecGetBitstreamBuffer(DecHandle handle, PhysicalAddress* prdPtr, PhysicalAddress* pwrPtr, Uint32* size)
  727. {
  728. CodecInst* pCodecInst;
  729. DecInfo* pDecInfo;
  730. PhysicalAddress rdPtr;
  731. PhysicalAddress wrPtr;
  732. PhysicalAddress tempPtr;
  733. int room;
  734. Int32 coreIdx;
  735. VpuAttr* pAttr;
  736. coreIdx = handle->coreIdx;
  737. pAttr = &g_VpuCoreAttributes[coreIdx];
  738. pCodecInst = handle;
  739. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  740. if (pAttr->supportCommandQueue == TRUE) {
  741. if (pDecInfo->rdPtrValidFlag == TRUE) { // when RdPtr has been updated by calling SetRdPtr.
  742. rdPtr = pDecInfo->streamRdPtr;
  743. }
  744. else {
  745. EnterLock(pCodecInst->coreIdx);
  746. rdPtr = ProductVpuDecGetRdPtr(pCodecInst);
  747. LeaveLock(pCodecInst->coreIdx);
  748. }
  749. }
  750. else {
  751. if (GetPendingInst(coreIdx) == pCodecInst) {
  752. if (pCodecInst->codecMode == AVC_DEC && pCodecInst->codecModeAux == AVC_AUX_MVC) {
  753. rdPtr = pDecInfo->streamRdPtr;
  754. }
  755. else {
  756. rdPtr = VpuReadReg(coreIdx, pDecInfo->streamRdPtrRegAddr);
  757. }
  758. }
  759. else {
  760. rdPtr = pDecInfo->streamRdPtr;
  761. }
  762. }
  763. wrPtr = pDecInfo->streamWrPtr;
  764. pAttr = &g_VpuCoreAttributes[coreIdx];
  765. tempPtr = rdPtr;
  766. if (pDecInfo->openParam.bitstreamMode != BS_MODE_PIC_END) {
  767. if (wrPtr < tempPtr) {
  768. room = tempPtr - wrPtr - pAttr->bitstreamBufferMargin*2;
  769. }
  770. else {
  771. room = (pDecInfo->streamBufEndAddr - wrPtr) + (tempPtr - pDecInfo->streamBufStartAddr) - pAttr->bitstreamBufferMargin*2;
  772. }
  773. room--;
  774. }
  775. else {
  776. room = (pDecInfo->streamBufEndAddr - wrPtr);
  777. }
  778. if (prdPtr) *prdPtr = tempPtr;
  779. if (pwrPtr) *pwrPtr = wrPtr;
  780. if (size) *size = room;
  781. return RETCODE_SUCCESS;
  782. }
  783. RetCode VPU_DecUpdateBitstreamBuffer(DecHandle handle, int size)
  784. {
  785. CodecInst* pCodecInst;
  786. DecInfo* pDecInfo;
  787. PhysicalAddress wrPtr;
  788. PhysicalAddress rdPtr;
  789. RetCode ret;
  790. BOOL running;
  791. VpuAttr* pAttr;
  792. ret = CheckDecInstanceValidity(handle);
  793. if (ret != RETCODE_SUCCESS)
  794. return ret;
  795. pCodecInst = handle;
  796. if (!pCodecInst)
  797. return RETCODE_INVALID_HANDLE;
  798. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  799. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  800. wrPtr = pDecInfo->streamWrPtr;
  801. if (pAttr->supportCommandQueue == TRUE) {
  802. running = FALSE;
  803. }
  804. else {
  805. running = (BOOL)(GetPendingInst(pCodecInst->coreIdx) == pCodecInst);
  806. }
  807. if (size > 0) {
  808. Uint32 room = 0;
  809. if (running == TRUE)
  810. rdPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr);
  811. else
  812. rdPtr = pDecInfo->streamRdPtr;
  813. if (wrPtr < rdPtr) {
  814. if (rdPtr <= wrPtr + size) {
  815. return RETCODE_INVALID_PARAM;
  816. }
  817. }
  818. wrPtr += size;
  819. if (pDecInfo->openParam.bitstreamMode != BS_MODE_PIC_END) {
  820. if (wrPtr > pDecInfo->streamBufEndAddr) {
  821. room = wrPtr - pDecInfo->streamBufEndAddr;
  822. wrPtr = pDecInfo->streamBufStartAddr;
  823. wrPtr += room;
  824. }
  825. else if (wrPtr == pDecInfo->streamBufEndAddr) {
  826. wrPtr = pDecInfo->streamBufStartAddr;
  827. }
  828. }
  829. pDecInfo->streamWrPtr = wrPtr;
  830. pDecInfo->streamRdPtr = rdPtr;
  831. if (running == TRUE) {
  832. VpuWriteReg(pCodecInst->coreIdx, pDecInfo->streamWrPtrRegAddr, wrPtr);
  833. }
  834. }
  835. if (running == FALSE) {
  836. EnterLock(pCodecInst->coreIdx);
  837. }
  838. ret = ProductVpuDecSetBitstreamFlag(pCodecInst, running, size);
  839. if (running == FALSE) {
  840. LeaveLock(pCodecInst->coreIdx);
  841. }
  842. return ret;
  843. }
  844. RetCode VPU_HWReset(Uint32 coreIdx)
  845. {
  846. if (vdi_hw_reset(coreIdx) < 0 )
  847. return RETCODE_FAILURE;
  848. if (GetPendingInst(coreIdx))
  849. {
  850. SetPendingInst(coreIdx, 0);
  851. LeaveLock(coreIdx); //if vpu is in a lock state. release the state;
  852. }
  853. return RETCODE_SUCCESS;
  854. }
  855. /**
  856. * VPU_SWReset
  857. * IN
  858. * forcedReset : 1 if there is no need to waiting for BUS transaction,
  859. * 0 for otherwise
  860. * OUT
  861. * RetCode : RETCODE_FAILURE if failed to reset,
  862. * RETCODE_SUCCESS for otherwise
  863. */
  864. RetCode VPU_SWReset(Uint32 coreIdx, SWResetMode resetMode, void *pendingInst)
  865. {
  866. CodecInst *pCodecInst = (CodecInst *)pendingInst;
  867. RetCode ret = RETCODE_SUCCESS;
  868. VpuAttr* attr = &g_VpuCoreAttributes[coreIdx];
  869. if (attr->supportCommandQueue == TRUE) {
  870. if (pCodecInst && pCodecInst->loggingEnable) {
  871. vdi_log(pCodecInst->coreIdx, 0x10000, 1);
  872. }
  873. EnterLock(coreIdx);
  874. ret = ProductVpuReset(coreIdx, resetMode);
  875. LeaveLock(coreIdx);
  876. if (pCodecInst && pCodecInst->loggingEnable) {
  877. vdi_log(pCodecInst->coreIdx, 0x10000, 0);
  878. }
  879. }
  880. else {
  881. if (pCodecInst) {
  882. if (pCodecInst->loggingEnable) {
  883. vdi_log(pCodecInst->coreIdx, (pCodecInst->productId == PRODUCT_ID_960 || pCodecInst->productId == PRODUCT_ID_980)?0x10:0x10000, 1);
  884. }
  885. }
  886. else {
  887. EnterLock(coreIdx);
  888. }
  889. ret = ProductVpuReset(coreIdx, resetMode);
  890. if (pCodecInst) {
  891. if (pCodecInst->loggingEnable) {
  892. vdi_log(pCodecInst->coreIdx, (pCodecInst->productId == PRODUCT_ID_960 || pCodecInst->productId == PRODUCT_ID_980)?0x10:0x10000, 0);
  893. }
  894. SetPendingInst(pCodecInst->coreIdx, 0);
  895. LeaveLock(coreIdx);
  896. }
  897. else {
  898. LeaveLock(coreIdx);
  899. }
  900. }
  901. return ret;
  902. }
  903. //---- VPU_SLEEP/WAKE
  904. RetCode VPU_SleepWake(Uint32 coreIdx, int iSleepWake)
  905. {
  906. RetCode ret;
  907. EnterLock(coreIdx);
  908. ret = ProductVpuSleepWake(coreIdx, iSleepWake, s_pusBitCode[coreIdx], s_bitCodeSize[coreIdx]);
  909. LeaveLock(coreIdx);
  910. return ret;
  911. }
  912. RetCode VPU_DecStartOneFrame(DecHandle handle, DecParam *param)
  913. {
  914. CodecInst* pCodecInst;
  915. DecInfo* pDecInfo;
  916. Uint32 val = 0;
  917. RetCode ret = RETCODE_SUCCESS;
  918. VpuAttr* pAttr = NULL;
  919. ret = CheckDecInstanceValidity(handle);
  920. if (ret != RETCODE_SUCCESS) {
  921. return ret;
  922. }
  923. pCodecInst = (CodecInst*)handle;
  924. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  925. if (pDecInfo->stride == 0) { // This means frame buffers have not been registered.
  926. return RETCODE_WRONG_CALL_SEQUENCE;
  927. }
  928. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  929. EnterLock(pCodecInst->coreIdx);
  930. if (GetPendingInst(pCodecInst->coreIdx)) {
  931. LeaveLock(pCodecInst->coreIdx);
  932. return RETCODE_FRAME_NOT_COMPLETE;
  933. }
  934. if (pAttr->supportCommandQueue == FALSE) {
  935. EnterDispFlagLock(pCodecInst->coreIdx);
  936. val = pDecInfo->frameDisplayFlag;
  937. val |= pDecInfo->setDisplayIndexes;
  938. val &= ~(Uint32)(pDecInfo->clearDisplayIndexes);
  939. VpuWriteReg(pCodecInst->coreIdx, pDecInfo->frameDisplayFlagRegAddr, val);
  940. pDecInfo->clearDisplayIndexes = 0;
  941. pDecInfo->setDisplayIndexes = 0;
  942. LeaveDispFlagLock(pCodecInst->coreIdx);
  943. }
  944. pDecInfo->frameStartPos = pDecInfo->streamRdPtr;
  945. ret = ProductVpuDecode(pCodecInst, param);
  946. if (pAttr->supportCommandQueue == TRUE) {
  947. SetPendingInst(pCodecInst->coreIdx, NULL);
  948. LeaveLock(pCodecInst->coreIdx);
  949. }
  950. else {
  951. SetPendingInst(pCodecInst->coreIdx, pCodecInst);
  952. }
  953. return ret;
  954. }
  955. RetCode VPU_DecGetOutputInfo(DecHandle handle, DecOutputInfo* info)
  956. {
  957. CodecInst* pCodecInst;
  958. DecInfo* pDecInfo;
  959. RetCode ret;
  960. VpuRect rectInfo;
  961. Uint32 val;
  962. Int32 decodedIndex;
  963. Int32 displayIndex;
  964. Uint32 maxDecIndex;
  965. VpuAttr* pAttr;
  966. ret = CheckDecInstanceValidity(handle);
  967. if (ret != RETCODE_SUCCESS) {
  968. return ret;
  969. }
  970. if (info == 0) {
  971. return RETCODE_INVALID_PARAM;
  972. }
  973. pCodecInst = handle;
  974. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  975. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  976. if (pAttr->supportCommandQueue == TRUE) {
  977. EnterLock(pCodecInst->coreIdx);
  978. }
  979. else {
  980. if (pCodecInst != GetPendingInst(pCodecInst->coreIdx)) {
  981. SetPendingInst(pCodecInst->coreIdx, 0);
  982. LeaveLock(pCodecInst->coreIdx);
  983. return RETCODE_WRONG_CALL_SEQUENCE;
  984. }
  985. }
  986. osal_memset((void*)info, 0x00, sizeof(DecOutputInfo));
  987. ret = ProductVpuDecGetResult(pCodecInst, info);
  988. if (ret != RETCODE_SUCCESS) {
  989. info->rdPtr = pDecInfo->streamRdPtr;
  990. info->wrPtr = pDecInfo->streamWrPtr;
  991. SetPendingInst(pCodecInst->coreIdx, 0);
  992. LeaveLock(pCodecInst->coreIdx);
  993. return ret;
  994. }
  995. decodedIndex = info->indexFrameDecoded;
  996. // Calculate display frame region
  997. val = 0;
  998. if (decodedIndex >= 0 && decodedIndex < MAX_GDI_IDX) {
  999. //default value
  1000. rectInfo.left = 0;
  1001. rectInfo.right = info->decPicWidth;
  1002. rectInfo.top = 0;
  1003. rectInfo.bottom = info->decPicHeight;
  1004. if (pCodecInst->codecMode == W_HEVC_DEC || pCodecInst->codecMode == AVC_DEC || pCodecInst->codecMode == AVS_DEC)
  1005. rectInfo = pDecInfo->initialInfo.picCropRect;
  1006. if (pCodecInst->codecMode == W_HEVC_DEC)
  1007. pDecInfo->decOutInfo[decodedIndex].decodedPOC = info->decodedPOC;
  1008. if (pCodecInst->codecMode == W_AVS2_DEC)
  1009. pDecInfo->decOutInfo[decodedIndex].avs2Info.decodedPOI = info->avs2Info.decodedPOI;
  1010. info->rcDecoded.left = pDecInfo->decOutInfo[decodedIndex].rcDecoded.left = rectInfo.left;
  1011. info->rcDecoded.right = pDecInfo->decOutInfo[decodedIndex].rcDecoded.right = rectInfo.right;
  1012. info->rcDecoded.top = pDecInfo->decOutInfo[decodedIndex].rcDecoded.top = rectInfo.top;
  1013. info->rcDecoded.bottom = pDecInfo->decOutInfo[decodedIndex].rcDecoded.bottom = rectInfo.bottom;
  1014. }
  1015. else
  1016. {
  1017. info->rcDecoded.left = 0;
  1018. info->rcDecoded.right = info->decPicWidth;
  1019. info->rcDecoded.top = 0;
  1020. info->rcDecoded.bottom = info->decPicHeight;
  1021. }
  1022. displayIndex = info->indexFrameDisplay;
  1023. if (info->indexFrameDisplay >= 0 && info->indexFrameDisplay < MAX_GDI_IDX)
  1024. {
  1025. if (pCodecInst->codecMode == VC1_DEC) // vc1 rotates decoded frame buffer region. the other std rotated whole frame buffer region.
  1026. {
  1027. if (pDecInfo->rotationEnable && (pDecInfo->rotationAngle==90 || pDecInfo->rotationAngle==270))
  1028. {
  1029. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1030. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1031. info->rcDisplay.top = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1032. info->rcDisplay.bottom = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1033. }
  1034. else
  1035. {
  1036. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1037. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1038. info->rcDisplay.top = pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1039. info->rcDisplay.bottom = pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1040. }
  1041. }
  1042. else
  1043. {
  1044. if (pDecInfo->rotationEnable)
  1045. {
  1046. switch(pDecInfo->rotationAngle)
  1047. {
  1048. case 90:
  1049. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1050. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1051. info->rcDisplay.top = info->decPicWidth - pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1052. info->rcDisplay.bottom = info->decPicWidth - pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1053. break;
  1054. case 270:
  1055. info->rcDisplay.left = info->decPicHeight - pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1056. info->rcDisplay.right = info->decPicHeight - pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1057. info->rcDisplay.top = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1058. info->rcDisplay.bottom = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1059. break;
  1060. case 180:
  1061. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1062. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1063. info->rcDisplay.top = info->decPicHeight - pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1064. info->rcDisplay.bottom = info->decPicHeight - pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1065. break;
  1066. default:
  1067. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1068. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1069. info->rcDisplay.top = pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1070. info->rcDisplay.bottom = pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1071. break;
  1072. }
  1073. }
  1074. else
  1075. {
  1076. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1077. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1078. info->rcDisplay.top = pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1079. info->rcDisplay.bottom = pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1080. }
  1081. if (pDecInfo->mirrorEnable) {
  1082. Uint32 temp;
  1083. Uint32 width = (pDecInfo->rotationAngle == 90 || pDecInfo->rotationAngle == 270) ? info->decPicHeight: info->decPicWidth;
  1084. Uint32 height = (pDecInfo->rotationAngle == 90 || pDecInfo->rotationAngle == 270) ? info->decPicWidth : info->decPicHeight;
  1085. if (pDecInfo->mirrorDirection & MIRDIR_VER) {
  1086. temp = info->rcDisplay.top;
  1087. info->rcDisplay.top = height - info->rcDisplay.bottom;
  1088. info->rcDisplay.bottom = height - temp;
  1089. }
  1090. if (pDecInfo->mirrorDirection & MIRDIR_HOR) {
  1091. temp = info->rcDisplay.left;
  1092. info->rcDisplay.left = width - info->rcDisplay.right;
  1093. info->rcDisplay.right = width - temp;
  1094. }
  1095. }
  1096. switch (pCodecInst->codecMode) {
  1097. case W_HEVC_DEC:
  1098. info->displayPOC = pDecInfo->decOutInfo[displayIndex].decodedPOC;
  1099. break;
  1100. case W_AVS2_DEC:
  1101. info->avs2Info.displayPOI = pDecInfo->decOutInfo[displayIndex].avs2Info.decodedPOI;
  1102. break;
  1103. case W_AVC_DEC:
  1104. if (TRUE == PRODUCT_ID_W_SERIES(pCodecInst->productId)) {
  1105. info->displayPOC = pDecInfo->decOutInfo[displayIndex].decodedPOC;
  1106. }
  1107. break;
  1108. default:
  1109. break;
  1110. }
  1111. }
  1112. if (info->indexFrameDisplay == info->indexFrameDecoded)
  1113. {
  1114. info->dispPicWidth = info->decPicWidth;
  1115. info->dispPicHeight = info->decPicHeight;
  1116. }
  1117. else
  1118. {
  1119. /*
  1120. When indexFrameDecoded < 0, and indexFrameDisplay >= 0
  1121. info->decPicWidth and info->decPicHeight are still valid
  1122. But those of pDecInfo->decOutInfo[displayIndex] are invalid in VP9
  1123. */
  1124. info->dispPicWidth = pDecInfo->decOutInfo[displayIndex].decPicWidth;
  1125. info->dispPicHeight = pDecInfo->decOutInfo[displayIndex].decPicHeight;
  1126. }
  1127. if (pDecInfo->scalerEnable == TRUE) {
  1128. if ((pDecInfo->scaleWidth != 0) && (pDecInfo->scaleHeight != 0)) {
  1129. info->dispPicWidth = pDecInfo->scaleWidth;
  1130. info->dispPicHeight = pDecInfo->scaleHeight;
  1131. info->rcDisplay.right = pDecInfo->scaleWidth;
  1132. info->rcDisplay.bottom = pDecInfo->scaleHeight;
  1133. }
  1134. }
  1135. }
  1136. else
  1137. {
  1138. info->rcDisplay.left = 0;
  1139. info->rcDisplay.right = 0;
  1140. info->rcDisplay.top = 0;
  1141. info->rcDisplay.bottom = 0;
  1142. if (pDecInfo->rotationEnable || pDecInfo->mirrorEnable || pDecInfo->tiled2LinearEnable || pDecInfo->deringEnable) {
  1143. info->dispPicWidth = info->decPicWidth;
  1144. info->dispPicHeight = info->decPicHeight;
  1145. }
  1146. else {
  1147. info->dispPicWidth = 0;
  1148. info->dispPicHeight = 0;
  1149. }
  1150. }
  1151. if ( (pCodecInst->codecMode == VC1_DEC ) && info->indexFrameDisplay != -3) {
  1152. if (pDecInfo->vc1BframeDisplayValid == 0) {
  1153. if (info->picType == 2)
  1154. info->indexFrameDisplay = -3;
  1155. else
  1156. pDecInfo->vc1BframeDisplayValid = 1;
  1157. }
  1158. }
  1159. pDecInfo->streamRdPtr = ProductVpuDecGetRdPtr(pCodecInst);
  1160. pDecInfo->frameDisplayFlag = VpuReadReg(pCodecInst->coreIdx, pDecInfo->frameDisplayFlagRegAddr);
  1161. if (pCodecInst->codecMode == W_VP9_DEC) {
  1162. pDecInfo->frameDisplayFlag &= 0xFFFF;
  1163. }
  1164. pDecInfo->frameEndPos = pDecInfo->streamRdPtr;
  1165. if (pDecInfo->frameEndPos < pDecInfo->frameStartPos)
  1166. info->consumedByte = pDecInfo->frameEndPos + pDecInfo->streamBufSize - pDecInfo->frameStartPos;
  1167. else
  1168. info->consumedByte = pDecInfo->frameEndPos - pDecInfo->frameStartPos;
  1169. if (pDecInfo->deringEnable || pDecInfo->mirrorEnable || pDecInfo->rotationEnable || pDecInfo->tiled2LinearEnable) {
  1170. info->dispFrame = pDecInfo->rotatorOutput;
  1171. info->dispFrame.stride = pDecInfo->rotatorStride;
  1172. }
  1173. else {
  1174. Int32 SvacSvcFlag = (pCodecInst->codecMode == W_SVAC_DEC && pDecInfo->initialInfo.spatialSvcEnable == TRUE);
  1175. val = (pDecInfo->openParam.wtlEnable == TRUE ? pDecInfo->numFbsForDecoding: 0); //fbOffset
  1176. if (SvacSvcFlag && pDecInfo->openParam.wtlEnable == TRUE)
  1177. val = pDecInfo->numFbsForDecoding*2;
  1178. maxDecIndex = (pDecInfo->numFbsForDecoding > pDecInfo->numFbsForWTL) ? (SvacSvcFlag ? pDecInfo->numFbsForDecoding*2 : pDecInfo->numFbsForDecoding) : pDecInfo->numFbsForWTL;
  1179. if (0 <= info->indexFrameDisplay && info->indexFrameDisplay < (int)maxDecIndex)
  1180. info->dispFrame = pDecInfo->frameBufPool[val+info->indexFrameDisplay];
  1181. }
  1182. info->rdPtr = pDecInfo->streamRdPtr;
  1183. info->wrPtr = pDecInfo->streamWrPtr;
  1184. info->frameDisplayFlag = pDecInfo->frameDisplayFlag;
  1185. info->sequenceNo = pDecInfo->initialInfo.sequenceNo;
  1186. if (decodedIndex >= 0 && decodedIndex < MAX_GDI_IDX) {
  1187. pDecInfo->decOutInfo[decodedIndex] = *info;
  1188. }
  1189. if (displayIndex >= 0 && displayIndex < MAX_GDI_IDX) {
  1190. info->numOfTotMBs = info->numOfTotMBs;
  1191. info->numOfErrMBs = info->numOfErrMBs;
  1192. info->numOfTotMBsInDisplay = pDecInfo->decOutInfo[displayIndex].numOfTotMBs;
  1193. info->numOfErrMBsInDisplay = pDecInfo->decOutInfo[displayIndex].numOfErrMBs;
  1194. info->dispFrame.sequenceNo = info->sequenceNo;
  1195. }
  1196. else {
  1197. info->numOfTotMBsInDisplay = 0;
  1198. info->numOfErrMBsInDisplay = 0;
  1199. }
  1200. if (info->sequenceChanged != 0) {
  1201. if (!(pCodecInst->productId == PRODUCT_ID_960 || pCodecInst->productId == PRODUCT_ID_980)) {
  1202. /* Update new sequence information */
  1203. osal_memcpy((void*)&pDecInfo->initialInfo, (void*)&pDecInfo->newSeqInfo, sizeof(DecInitialInfo));
  1204. }
  1205. if ((info->sequenceChanged & SEQ_CHANGE_INTER_RES_CHANGE) != SEQ_CHANGE_INTER_RES_CHANGE) {
  1206. pDecInfo->initialInfo.sequenceNo++;
  1207. }
  1208. }
  1209. SetPendingInst(pCodecInst->coreIdx, 0);
  1210. LeaveLock(pCodecInst->coreIdx);
  1211. return RETCODE_SUCCESS;
  1212. }
  1213. RetCode VPU_DecFrameBufferFlush(DecHandle handle, DecOutputInfo* pRemainings, Uint32* retNum)
  1214. {
  1215. CodecInst* pCodecInst;
  1216. DecInfo* pDecInfo;
  1217. DecOutputInfo* pOut;
  1218. RetCode ret;
  1219. FramebufferIndex retIndex[MAX_GDI_IDX];
  1220. Uint32 retRemainings = 0;
  1221. Int32 i, index, val;
  1222. VpuAttr* pAttr = NULL;
  1223. ret = CheckDecInstanceValidity(handle);
  1224. if (ret != RETCODE_SUCCESS)
  1225. return ret;
  1226. pCodecInst = handle;
  1227. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  1228. EnterLock(pCodecInst->coreIdx);
  1229. if (GetPendingInst(pCodecInst->coreIdx)) {
  1230. LeaveLock(pCodecInst->coreIdx);
  1231. return RETCODE_FRAME_NOT_COMPLETE;
  1232. }
  1233. osal_memset((void*)retIndex, 0xff, sizeof(retIndex));
  1234. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  1235. if (pAttr->supportCommandQueue == FALSE) {
  1236. EnterDispFlagLock(pCodecInst->coreIdx);
  1237. val = pDecInfo->frameDisplayFlag;
  1238. val |= pDecInfo->setDisplayIndexes;
  1239. val &= ~(Uint32)(pDecInfo->clearDisplayIndexes);
  1240. VpuWriteReg(pCodecInst->coreIdx, pDecInfo->frameDisplayFlagRegAddr, val);
  1241. pDecInfo->clearDisplayIndexes = 0;
  1242. pDecInfo->setDisplayIndexes = 0;
  1243. LeaveDispFlagLock(pCodecInst->coreIdx);
  1244. }
  1245. if ((ret=ProductVpuDecFlush(pCodecInst, retIndex, MAX_GDI_IDX)) != RETCODE_SUCCESS) {
  1246. LeaveLock(pCodecInst->coreIdx);
  1247. return ret;
  1248. }
  1249. if (pRemainings != NULL) {
  1250. for (i=0; i<MAX_GDI_IDX; i++) {
  1251. index = (pDecInfo->wtlEnable == TRUE) ? retIndex[i].tiledIndex : retIndex[i].linearIndex;
  1252. if (index < 0)
  1253. break;
  1254. pRemainings[i] = pDecInfo->decOutInfo[index];
  1255. pOut = &pRemainings[i];
  1256. pOut->indexFrameDisplay = pOut->indexFrameDecoded;
  1257. pOut->indexFrameDisplayForTiled = pOut->indexFrameDecodedForTiled;
  1258. if (pDecInfo->wtlEnable == TRUE)
  1259. pOut->dispFrame = pDecInfo->frameBufPool[pDecInfo->numFbsForDecoding+retIndex[i].linearIndex];
  1260. else
  1261. pOut->dispFrame = pDecInfo->frameBufPool[index];
  1262. pOut->dispFrame.sequenceNo = pOut->sequenceNo;
  1263. if (pCodecInst->codecMode == W_VP9_DEC || pCodecInst->codecMode == W_AVS2_DEC) {
  1264. Uint32 regVal;
  1265. if ((pDecInfo->scaleWidth == 0) || (pDecInfo->scaleHeight == 0)) {
  1266. regVal = VpuReadReg(pCodecInst->coreIdx, W5_RET_DEC_DISPLAY_SIZE);
  1267. pOut->dispPicWidth = regVal>>16;
  1268. pOut->dispPicHeight = regVal&0xffff;
  1269. }
  1270. else {
  1271. pOut->dispPicWidth = pDecInfo->scaleWidth;
  1272. pOut->dispPicHeight = pDecInfo->scaleHeight;
  1273. }
  1274. }
  1275. else {
  1276. pOut->dispPicWidth = pOut->decPicWidth;
  1277. pOut->dispPicHeight = pOut->decPicHeight;
  1278. }
  1279. if (pDecInfo->rotationEnable)
  1280. {
  1281. switch(pDecInfo->rotationAngle)
  1282. {
  1283. case 90:
  1284. pOut->rcDisplay.left = pDecInfo->decOutInfo[index].rcDecoded.top;
  1285. pOut->rcDisplay.right = pDecInfo->decOutInfo[index].rcDecoded.bottom;
  1286. pOut->rcDisplay.top = pOut->decPicWidth - pDecInfo->decOutInfo[index].rcDecoded.right;
  1287. pOut->rcDisplay.bottom = pOut->decPicWidth - pDecInfo->decOutInfo[index].rcDecoded.left;
  1288. break;
  1289. case 270:
  1290. pOut->rcDisplay.left = pOut->decPicHeight - pDecInfo->decOutInfo[index].rcDecoded.bottom;
  1291. pOut->rcDisplay.right = pOut->decPicHeight - pDecInfo->decOutInfo[index].rcDecoded.top;
  1292. pOut->rcDisplay.top = pDecInfo->decOutInfo[index].rcDecoded.left;
  1293. pOut->rcDisplay.bottom = pDecInfo->decOutInfo[index].rcDecoded.right;
  1294. break;
  1295. case 180:
  1296. pOut->rcDisplay.left = pDecInfo->decOutInfo[index].rcDecoded.left;
  1297. pOut->rcDisplay.right = pDecInfo->decOutInfo[index].rcDecoded.right;
  1298. pOut->rcDisplay.top = pOut->decPicHeight - pDecInfo->decOutInfo[index].rcDecoded.bottom;
  1299. pOut->rcDisplay.bottom = pOut->decPicHeight - pDecInfo->decOutInfo[index].rcDecoded.top;
  1300. break;
  1301. default:
  1302. pOut->rcDisplay.left = pDecInfo->decOutInfo[index].rcDecoded.left;
  1303. pOut->rcDisplay.right = pDecInfo->decOutInfo[index].rcDecoded.right;
  1304. pOut->rcDisplay.top = pDecInfo->decOutInfo[index].rcDecoded.top;
  1305. pOut->rcDisplay.bottom = pDecInfo->decOutInfo[index].rcDecoded.bottom;
  1306. break;
  1307. }
  1308. }
  1309. else
  1310. {
  1311. pOut->rcDisplay.left = pDecInfo->decOutInfo[index].rcDecoded.left;
  1312. pOut->rcDisplay.right = pDecInfo->decOutInfo[index].rcDecoded.right;
  1313. pOut->rcDisplay.top = pDecInfo->decOutInfo[index].rcDecoded.top;
  1314. pOut->rcDisplay.bottom = pDecInfo->decOutInfo[index].rcDecoded.bottom;
  1315. }
  1316. retRemainings++;
  1317. }
  1318. }
  1319. if (retNum) *retNum = retRemainings;
  1320. if (pCodecInst->loggingEnable)
  1321. vdi_log(pCodecInst->coreIdx, DEC_BUF_FLUSH, 0);
  1322. LeaveLock(pCodecInst->coreIdx);
  1323. return ret;
  1324. }
  1325. RetCode VPU_DecSetRdPtr(DecHandle handle, PhysicalAddress addr, int updateWrPtr)
  1326. {
  1327. CodecInst* pCodecInst;
  1328. CodecInst* pPendingInst;
  1329. DecInfo* pDecInfo;
  1330. RetCode ret;
  1331. ret = CheckDecInstanceValidity(handle);
  1332. if (ret != RETCODE_SUCCESS) {
  1333. return ret;
  1334. }
  1335. pCodecInst = (CodecInst*)handle;
  1336. ret = ProductVpuDecCheckCapability(pCodecInst);
  1337. if (ret != RETCODE_SUCCESS) {
  1338. return ret;
  1339. }
  1340. pCodecInst = handle;
  1341. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  1342. pPendingInst = GetPendingInst(pCodecInst->coreIdx);
  1343. if (pCodecInst == pPendingInst) {
  1344. VpuWriteReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr, addr);
  1345. }
  1346. else {
  1347. EnterLock(pCodecInst->coreIdx);
  1348. VpuWriteReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr, addr);
  1349. LeaveLock(pCodecInst->coreIdx);
  1350. }
  1351. pDecInfo->streamRdPtr = addr;
  1352. pDecInfo->prevFrameEndPos = addr;
  1353. if (updateWrPtr == TRUE) {
  1354. pDecInfo->streamWrPtr = addr;
  1355. }
  1356. pDecInfo->rdPtrValidFlag = 1;
  1357. return RETCODE_SUCCESS;
  1358. }
  1359. RetCode VPU_EncSetWrPtr(EncHandle handle, PhysicalAddress addr, int updateRdPtr)
  1360. {
  1361. CodecInst* pCodecInst;
  1362. CodecInst* pPendingInst;
  1363. EncInfo * pEncInfo;
  1364. RetCode ret;
  1365. ret = CheckEncInstanceValidity(handle);
  1366. if (ret != RETCODE_SUCCESS)
  1367. return ret;
  1368. pCodecInst = (CodecInst*)handle;
  1369. if (pCodecInst->productId == PRODUCT_ID_960 || pCodecInst->productId == PRODUCT_ID_980) {
  1370. return RETCODE_NOT_SUPPORTED_FEATURE;
  1371. }
  1372. pEncInfo = &handle->CodecInfo->encInfo;
  1373. pPendingInst = GetPendingInst(pCodecInst->coreIdx);
  1374. if (pCodecInst == pPendingInst) {
  1375. VpuWriteReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr, addr);
  1376. }
  1377. else {
  1378. EnterLock(pCodecInst->coreIdx);
  1379. VpuWriteReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr, addr);
  1380. LeaveLock(pCodecInst->coreIdx);
  1381. }
  1382. pEncInfo->streamWrPtr = addr;
  1383. if (updateRdPtr)
  1384. pEncInfo->streamRdPtr = addr;
  1385. return RETCODE_SUCCESS;
  1386. }
  1387. RetCode VPU_DecClrDispFlag(DecHandle handle, int index)
  1388. {
  1389. CodecInst* pCodecInst;
  1390. DecInfo* pDecInfo;
  1391. RetCode ret = RETCODE_SUCCESS;
  1392. Int32 endIndex, SvacSvcFlag;
  1393. VpuAttr* pAttr = NULL;
  1394. FrameBuffer* pBuffer = NULL;
  1395. BOOL supportCommandQueue;
  1396. ret = CheckDecInstanceValidity(handle);
  1397. if (ret != RETCODE_SUCCESS)
  1398. return ret;
  1399. pCodecInst = handle;
  1400. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  1401. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  1402. SvacSvcFlag = (pCodecInst->codecMode == W_SVAC_DEC && pDecInfo->initialInfo.spatialSvcEnable == TRUE);
  1403. endIndex = (pDecInfo->openParam.wtlEnable == TRUE) ? pDecInfo->numFbsForWTL : (SvacSvcFlag == TRUE ? pDecInfo->numFbsForDecoding*2 : pDecInfo->numFbsForDecoding);
  1404. if ((index < 0) || (index > (endIndex - 1))) {
  1405. return RETCODE_INVALID_PARAM;
  1406. }
  1407. pBuffer = &pDecInfo->frameBufPool[pDecInfo->numFbsForDecoding + index];
  1408. vdi_flush_ddr(pCodecInst->coreIdx, pBuffer->bufY, pBuffer->size, 1);
  1409. supportCommandQueue = (pAttr->supportCommandQueue == TRUE);
  1410. if (supportCommandQueue == TRUE) {
  1411. EnterLock(pCodecInst->coreIdx);
  1412. ret = ProductClrDispFlag(pCodecInst, index);
  1413. LeaveLock(pCodecInst->coreIdx);
  1414. }
  1415. else {
  1416. EnterDispFlagLock(pCodecInst->coreIdx);
  1417. pDecInfo->clearDisplayIndexes |= (1<<index);
  1418. LeaveDispFlagLock(pCodecInst->coreIdx);
  1419. }
  1420. return ret;
  1421. }
  1422. RetCode VPU_DecGiveCommand(DecHandle handle, CodecCommand cmd, void* param)
  1423. {
  1424. CodecInst* pCodecInst;
  1425. DecInfo* pDecInfo;
  1426. RetCode ret;
  1427. ret = CheckDecInstanceValidity(handle);
  1428. if (ret != RETCODE_SUCCESS)
  1429. return ret;
  1430. pCodecInst = handle;
  1431. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  1432. switch (cmd)
  1433. {
  1434. case ENABLE_ROTATION :
  1435. {
  1436. if (pDecInfo->rotatorStride == 0) {
  1437. return RETCODE_ROTATOR_STRIDE_NOT_SET;
  1438. }
  1439. pDecInfo->rotationEnable = 1;
  1440. break;
  1441. }
  1442. case DISABLE_ROTATION :
  1443. {
  1444. pDecInfo->rotationEnable = 0;
  1445. break;
  1446. }
  1447. case ENABLE_MIRRORING :
  1448. {
  1449. if (pDecInfo->rotatorStride == 0) {
  1450. return RETCODE_ROTATOR_STRIDE_NOT_SET;
  1451. }
  1452. pDecInfo->mirrorEnable = 1;
  1453. break;
  1454. }
  1455. case DISABLE_MIRRORING :
  1456. {
  1457. pDecInfo->mirrorEnable = 0;
  1458. break;
  1459. }
  1460. case SET_MIRROR_DIRECTION :
  1461. {
  1462. MirrorDirection mirDir;
  1463. if (param == 0) {
  1464. return RETCODE_INVALID_PARAM;
  1465. }
  1466. mirDir = *(MirrorDirection *)param;
  1467. if ( !(mirDir == MIRDIR_NONE) && !(mirDir==MIRDIR_HOR) && !(mirDir==MIRDIR_VER) && !(mirDir==MIRDIR_HOR_VER)) {
  1468. return RETCODE_INVALID_PARAM;
  1469. }
  1470. pDecInfo->mirrorDirection = mirDir;
  1471. break;
  1472. }
  1473. case SET_ROTATION_ANGLE :
  1474. {
  1475. int angle;
  1476. if (param == 0) {
  1477. return RETCODE_INVALID_PARAM;
  1478. }
  1479. angle = *(int *)param;
  1480. if (angle != 0 && angle != 90 &&
  1481. angle != 180 && angle != 270) {
  1482. return RETCODE_INVALID_PARAM;
  1483. }
  1484. if (pDecInfo->rotatorStride != 0) {
  1485. if (angle == 90 || angle ==270) {
  1486. if (pDecInfo->initialInfo.picHeight > pDecInfo->rotatorStride) {
  1487. return RETCODE_INVALID_PARAM;
  1488. }
  1489. } else {
  1490. if (pDecInfo->initialInfo.picWidth > pDecInfo->rotatorStride) {
  1491. return RETCODE_INVALID_PARAM;
  1492. }
  1493. }
  1494. }
  1495. pDecInfo->rotationAngle = angle;
  1496. break;
  1497. }
  1498. case SET_ROTATOR_OUTPUT :
  1499. {
  1500. FrameBuffer *frame;
  1501. if (param == 0) {
  1502. return RETCODE_INVALID_PARAM;
  1503. }
  1504. frame = (FrameBuffer *)param;
  1505. pDecInfo->rotatorOutput = *frame;
  1506. pDecInfo->rotatorOutputValid = 1;
  1507. break;
  1508. }
  1509. case SET_ROTATOR_STRIDE :
  1510. {
  1511. int stride;
  1512. if (param == 0) {
  1513. return RETCODE_INVALID_PARAM;
  1514. }
  1515. stride = *(int *)param;
  1516. if (stride % 8 != 0 || stride == 0) {
  1517. return RETCODE_INVALID_STRIDE;
  1518. }
  1519. if (pDecInfo->rotationAngle == 90 || pDecInfo->rotationAngle == 270) {
  1520. if (pDecInfo->initialInfo.picHeight > stride) {
  1521. return RETCODE_INVALID_STRIDE;
  1522. }
  1523. } else {
  1524. if (pDecInfo->initialInfo.picWidth > stride) {
  1525. return RETCODE_INVALID_STRIDE;
  1526. }
  1527. }
  1528. pDecInfo->rotatorStride = stride;
  1529. break;
  1530. }
  1531. case DEC_SET_SPS_RBSP:
  1532. {
  1533. if (pCodecInst->codecMode != AVC_DEC) {
  1534. return RETCODE_INVALID_COMMAND;
  1535. }
  1536. if (param == 0) {
  1537. return RETCODE_INVALID_PARAM;
  1538. }
  1539. return SetParaSet(handle, 0, (DecParamSet *)param);
  1540. }
  1541. case DEC_SET_PPS_RBSP:
  1542. {
  1543. if (pCodecInst->codecMode != AVC_DEC) {
  1544. return RETCODE_INVALID_COMMAND;
  1545. }
  1546. if (param == 0) {
  1547. return RETCODE_INVALID_PARAM;
  1548. }
  1549. return SetParaSet(handle, 1, (DecParamSet *)param);
  1550. }
  1551. case ENABLE_DERING :
  1552. {
  1553. if (pDecInfo->rotatorStride == 0) {
  1554. return RETCODE_ROTATOR_STRIDE_NOT_SET;
  1555. }
  1556. pDecInfo->deringEnable = 1;
  1557. break;
  1558. }
  1559. case DISABLE_DERING :
  1560. {
  1561. pDecInfo->deringEnable = 0;
  1562. break;
  1563. }
  1564. case SET_SEC_AXI:
  1565. {
  1566. SecAxiUse secAxiUse;
  1567. if (param == 0) {
  1568. return RETCODE_INVALID_PARAM;
  1569. }
  1570. secAxiUse = *(SecAxiUse *)param;
  1571. if (handle->productId == PRODUCT_ID_512 || handle->productId == PRODUCT_ID_515 ||
  1572. handle->productId == PRODUCT_ID_521 || handle->productId == PRODUCT_ID_511 || handle->productId == PRODUCT_ID_517) {
  1573. pDecInfo->secAxiInfo.u.wave.useIpEnable = secAxiUse.u.wave.useIpEnable;
  1574. pDecInfo->secAxiInfo.u.wave.useLfRowEnable = secAxiUse.u.wave.useLfRowEnable;
  1575. pDecInfo->secAxiInfo.u.wave.useBitEnable = secAxiUse.u.wave.useBitEnable;
  1576. pDecInfo->secAxiInfo.u.wave.useSclEnable = secAxiUse.u.wave.useSclEnable;
  1577. }
  1578. else {
  1579. pDecInfo->secAxiInfo.u.coda9.useBitEnable = secAxiUse.u.coda9.useBitEnable;
  1580. pDecInfo->secAxiInfo.u.coda9.useIpEnable = secAxiUse.u.coda9.useIpEnable;
  1581. pDecInfo->secAxiInfo.u.coda9.useDbkYEnable = secAxiUse.u.coda9.useDbkYEnable;
  1582. pDecInfo->secAxiInfo.u.coda9.useDbkCEnable = secAxiUse.u.coda9.useDbkCEnable;
  1583. pDecInfo->secAxiInfo.u.coda9.useOvlEnable = secAxiUse.u.coda9.useOvlEnable;
  1584. pDecInfo->secAxiInfo.u.coda9.useBtpEnable = secAxiUse.u.coda9.useBtpEnable;
  1585. }
  1586. break;
  1587. }
  1588. case ENABLE_REP_USERDATA:
  1589. {
  1590. if (!pDecInfo->userDataBufAddr) {
  1591. return RETCODE_USERDATA_BUF_NOT_SET;
  1592. }
  1593. if (pDecInfo->userDataBufSize == 0) {
  1594. return RETCODE_USERDATA_BUF_NOT_SET;
  1595. }
  1596. switch (pCodecInst->productId) {
  1597. case PRODUCT_ID_512:
  1598. case PRODUCT_ID_515:
  1599. case PRODUCT_ID_521:
  1600. case PRODUCT_ID_511:
  1601. case PRODUCT_ID_517:
  1602. if (!param)
  1603. return RETCODE_INVALID_PARAM;
  1604. pDecInfo->userDataEnable = *(Uint32*)param;
  1605. break;
  1606. case PRODUCT_ID_960:
  1607. case PRODUCT_ID_980:
  1608. pDecInfo->userDataEnable = TRUE;
  1609. break;
  1610. default:
  1611. VLOG(INFO, "%s(ENABLE_REP_DATA) invalid productId(%d)\n", __FUNCTION__, pCodecInst->productId);
  1612. return RETCODE_INVALID_PARAM;
  1613. }
  1614. break;
  1615. }
  1616. case DISABLE_REP_USERDATA:
  1617. {
  1618. pDecInfo->userDataEnable = 0;
  1619. break;
  1620. }
  1621. case SET_ADDR_REP_USERDATA:
  1622. {
  1623. PhysicalAddress userDataBufAddr;
  1624. if (param == 0) {
  1625. return RETCODE_INVALID_PARAM;
  1626. }
  1627. userDataBufAddr = *(PhysicalAddress *)param;
  1628. if (userDataBufAddr % 8 != 0 || userDataBufAddr == 0) {
  1629. return RETCODE_INVALID_PARAM;
  1630. }
  1631. pDecInfo->userDataBufAddr = userDataBufAddr;
  1632. break;
  1633. }
  1634. case SET_VIRT_ADDR_REP_USERDATA:
  1635. {
  1636. unsigned long userDataVirtAddr;
  1637. if (param == 0) {
  1638. return RETCODE_INVALID_PARAM;
  1639. }
  1640. if (!pDecInfo->userDataBufAddr) {
  1641. return RETCODE_USERDATA_BUF_NOT_SET;
  1642. }
  1643. if (pDecInfo->userDataBufSize == 0) {
  1644. return RETCODE_USERDATA_BUF_NOT_SET;
  1645. }
  1646. userDataVirtAddr = *(unsigned long *)param;
  1647. if (!userDataVirtAddr) {
  1648. return RETCODE_INVALID_PARAM;
  1649. }
  1650. pDecInfo->vbUserData.phys_addr = pDecInfo->userDataBufAddr;
  1651. pDecInfo->vbUserData.size = pDecInfo->userDataBufSize;
  1652. pDecInfo->vbUserData.virt_addr = (unsigned long)userDataVirtAddr;
  1653. if (vdi_attach_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbUserData) != 0) {
  1654. return RETCODE_INSUFFICIENT_RESOURCE;
  1655. }
  1656. break;
  1657. }
  1658. case SET_SIZE_REP_USERDATA:
  1659. {
  1660. PhysicalAddress userDataBufSize;
  1661. if (param == 0) {
  1662. return RETCODE_INVALID_PARAM;
  1663. }
  1664. userDataBufSize = *(PhysicalAddress *)param;
  1665. pDecInfo->userDataBufSize = userDataBufSize;
  1666. break;
  1667. }
  1668. case SET_USERDATA_REPORT_MODE:
  1669. {
  1670. int userDataMode;
  1671. userDataMode = *(int *)param;
  1672. if (userDataMode != 1 && userDataMode != 0) {
  1673. return RETCODE_INVALID_PARAM;
  1674. }
  1675. pDecInfo->userDataReportMode = userDataMode;
  1676. break;
  1677. }
  1678. case SET_CACHE_CONFIG:
  1679. {
  1680. MaverickCacheConfig *mcCacheConfig;
  1681. if (param == 0) {
  1682. return RETCODE_INVALID_PARAM;
  1683. }
  1684. mcCacheConfig = (MaverickCacheConfig *)param;
  1685. pDecInfo->cacheConfig = *mcCacheConfig;
  1686. }
  1687. break;
  1688. case SET_LOW_DELAY_CONFIG:
  1689. {
  1690. LowDelayInfo *lowDelayInfo;
  1691. if (param == 0) {
  1692. return RETCODE_INVALID_PARAM;
  1693. }
  1694. if (pCodecInst->productId != PRODUCT_ID_980) {
  1695. return RETCODE_NOT_SUPPORTED_FEATURE;
  1696. }
  1697. lowDelayInfo = (LowDelayInfo *)param;
  1698. if (lowDelayInfo->lowDelayEn) {
  1699. if ( (pCodecInst->codecMode != AVC_DEC) ||
  1700. pDecInfo->rotationEnable ||
  1701. pDecInfo->mirrorEnable ||
  1702. pDecInfo->tiled2LinearEnable ||
  1703. pDecInfo->deringEnable) {
  1704. return RETCODE_INVALID_PARAM;
  1705. }
  1706. }
  1707. pDecInfo->lowDelayInfo.lowDelayEn = lowDelayInfo->lowDelayEn;
  1708. pDecInfo->lowDelayInfo.numRows = lowDelayInfo->numRows;
  1709. }
  1710. break;
  1711. case DEC_SET_FRAME_DELAY:
  1712. {
  1713. pDecInfo->frameDelay = *(int *)param;
  1714. break;
  1715. }
  1716. case DEC_ENABLE_REORDER:
  1717. {
  1718. if((handle->productId == PRODUCT_ID_980) || (handle->productId == PRODUCT_ID_960) || (handle->productId == PRODUCT_ID_950))
  1719. {
  1720. if (pDecInfo->initialInfoObtained) {
  1721. return RETCODE_WRONG_CALL_SEQUENCE;
  1722. }
  1723. }
  1724. pDecInfo->reorderEnable = 1;
  1725. break;
  1726. }
  1727. case DEC_DISABLE_REORDER:
  1728. {
  1729. if((handle->productId == PRODUCT_ID_980) || (handle->productId == PRODUCT_ID_960) || (handle->productId == PRODUCT_ID_950))
  1730. {
  1731. if (pDecInfo->initialInfoObtained) {
  1732. return RETCODE_WRONG_CALL_SEQUENCE;
  1733. }
  1734. if(pCodecInst->codecMode != AVC_DEC && pCodecInst->codecMode != VC1_DEC && pCodecInst->codecMode != AVS_DEC) {
  1735. return RETCODE_INVALID_COMMAND;
  1736. }
  1737. }
  1738. pDecInfo->reorderEnable = 0;
  1739. break;
  1740. }
  1741. case DEC_SET_AVC_ERROR_CONCEAL_MODE:
  1742. {
  1743. if(pCodecInst->codecMode != AVC_DEC) {
  1744. return RETCODE_INVALID_COMMAND;
  1745. }
  1746. pDecInfo->avcErrorConcealMode = *(int *)param;
  1747. break;
  1748. }
  1749. case DEC_FREE_FRAME_BUFFER:
  1750. {
  1751. int i;
  1752. if (pDecInfo->vbSlice.size)
  1753. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbSlice, DEC_ETC, pCodecInst->instIndex);
  1754. if (pDecInfo->vbFrame.size){
  1755. if (pDecInfo->frameAllocExt == 0)
  1756. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFrame, DEC_ETC, pCodecInst->instIndex);
  1757. }
  1758. for (i=0 ; i<MAX_REG_FRAME; i++) {
  1759. if (pDecInfo->vbFbcYTbl[i].size)
  1760. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcYTbl[i], DEC_FBCY_TBL, pCodecInst->instIndex);
  1761. if (pDecInfo->vbFbcCTbl[i].size)
  1762. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcCTbl[i], DEC_FBCC_TBL, pCodecInst->instIndex);
  1763. if (pDecInfo->vbMV[i].size)
  1764. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbMV[i], DEC_MV, pCodecInst->instIndex);
  1765. }
  1766. if (pDecInfo->vbPPU.size) {
  1767. if (pDecInfo->ppuAllocExt == 0)
  1768. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbPPU, DEC_ETC, pCodecInst->instIndex);
  1769. }
  1770. if (pDecInfo->wtlEnable) {
  1771. if (pDecInfo->vbWTL.size)
  1772. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbWTL, DEC_FB_LINEAR, pCodecInst->instIndex);
  1773. }
  1774. break;
  1775. }
  1776. case DEC_GET_FRAMEBUF_INFO:
  1777. {
  1778. DecGetFramebufInfo* fbInfo = (DecGetFramebufInfo*)param;
  1779. Uint32 i;
  1780. fbInfo->vbFrame = pDecInfo->vbFrame;
  1781. fbInfo->vbWTL = pDecInfo->vbWTL;
  1782. for (i=0 ; i<MAX_REG_FRAME; i++)
  1783. {
  1784. fbInfo->vbFbcYTbl[i] = pDecInfo->vbFbcYTbl[i];
  1785. fbInfo->vbFbcCTbl[i] = pDecInfo->vbFbcCTbl[i];
  1786. fbInfo->vbMvCol[i] = pDecInfo->vbMV[i];
  1787. }
  1788. for (i=0; i<MAX_GDI_IDX*2; i++) {
  1789. fbInfo->framebufPool[i] = pDecInfo->frameBufPool[i];
  1790. }
  1791. fbInfo->vbTask = pDecInfo->vbTask;
  1792. }
  1793. break;
  1794. case DEC_RESET_FRAMEBUF_INFO:
  1795. {
  1796. int i;
  1797. pDecInfo->vbFrame.base = 0;
  1798. pDecInfo->vbFrame.phys_addr = 0;
  1799. pDecInfo->vbFrame.virt_addr = 0;
  1800. pDecInfo->vbFrame.size = 0;
  1801. pDecInfo->vbWTL.base = 0;
  1802. pDecInfo->vbWTL.phys_addr = 0;
  1803. pDecInfo->vbWTL.virt_addr = 0;
  1804. pDecInfo->vbWTL.size = 0;
  1805. for (i=0 ; i<MAX_REG_FRAME; i++)
  1806. {
  1807. pDecInfo->vbFbcYTbl[i].base = 0;
  1808. pDecInfo->vbFbcYTbl[i].phys_addr = 0;
  1809. pDecInfo->vbFbcYTbl[i].virt_addr = 0;
  1810. pDecInfo->vbFbcYTbl[i].size = 0;
  1811. pDecInfo->vbFbcCTbl[i].base = 0;
  1812. pDecInfo->vbFbcCTbl[i].phys_addr = 0;
  1813. pDecInfo->vbFbcCTbl[i].virt_addr = 0;
  1814. pDecInfo->vbFbcCTbl[i].size = 0;
  1815. pDecInfo->vbMV[i].base = 0;
  1816. pDecInfo->vbMV[i].phys_addr = 0;
  1817. pDecInfo->vbMV[i].virt_addr = 0;
  1818. pDecInfo->vbMV[i].size = 0;
  1819. }
  1820. pDecInfo->frameDisplayFlag = 0;
  1821. pDecInfo->setDisplayIndexes = 0;
  1822. pDecInfo->clearDisplayIndexes = 0;
  1823. break;
  1824. }
  1825. case DEC_GET_QUEUE_STATUS:
  1826. {
  1827. QueueStatusInfo* queueInfo = (QueueStatusInfo*)param;
  1828. queueInfo->instanceQueueCount = pDecInfo->instanceQueueCount;
  1829. queueInfo->reportQueueCount = pDecInfo->reportQueueCount;
  1830. break;
  1831. }
  1832. case ENABLE_DEC_THUMBNAIL_MODE:
  1833. {
  1834. pDecInfo->thumbnailMode = 1;
  1835. break;
  1836. }
  1837. case DEC_GET_SEQ_INFO:
  1838. {
  1839. DecInitialInfo* seqInfo = (DecInitialInfo*)param;
  1840. *seqInfo = pDecInfo->initialInfo;
  1841. break;
  1842. }
  1843. case DEC_GET_FIELD_PIC_TYPE:
  1844. {
  1845. return RETCODE_FAILURE;
  1846. }
  1847. case DEC_GET_DISPLAY_OUTPUT_INFO:
  1848. {
  1849. DecOutputInfo *pDecOutInfo = (DecOutputInfo *)param;
  1850. *pDecOutInfo = pDecInfo->decOutInfo[pDecOutInfo->indexFrameDisplay];
  1851. break;
  1852. }
  1853. case GET_TILEDMAP_CONFIG:
  1854. {
  1855. TiledMapConfig *pMapCfg = (TiledMapConfig *)param;
  1856. if (!pMapCfg) {
  1857. return RETCODE_INVALID_PARAM;
  1858. }
  1859. if (!pDecInfo->stride) {
  1860. return RETCODE_WRONG_CALL_SEQUENCE;
  1861. }
  1862. *pMapCfg = pDecInfo->mapCfg;
  1863. break;
  1864. }
  1865. case SET_DRAM_CONFIG:
  1866. {
  1867. DRAMConfig *cfg = (DRAMConfig *)param;
  1868. if (!cfg) {
  1869. return RETCODE_INVALID_PARAM;
  1870. }
  1871. pDecInfo->dramCfg = *cfg;
  1872. break;
  1873. }
  1874. case GET_DRAM_CONFIG:
  1875. {
  1876. DRAMConfig *cfg = (DRAMConfig *)param;
  1877. if (!cfg) {
  1878. return RETCODE_INVALID_PARAM;
  1879. }
  1880. *cfg = pDecInfo->dramCfg;
  1881. break;
  1882. }
  1883. case GET_LOW_DELAY_OUTPUT:
  1884. {
  1885. DecOutputInfo *lowDelayOutput;
  1886. if (param == 0) {
  1887. return RETCODE_INVALID_PARAM;
  1888. }
  1889. if (!pDecInfo->lowDelayInfo.lowDelayEn || pCodecInst->codecMode != AVC_DEC) {
  1890. return RETCODE_INVALID_COMMAND;
  1891. }
  1892. if (pCodecInst != GetPendingInst(pCodecInst->coreIdx)) {
  1893. return RETCODE_WRONG_CALL_SEQUENCE;
  1894. }
  1895. lowDelayOutput = (DecOutputInfo *)param;
  1896. GetLowDelayOutput(pCodecInst, lowDelayOutput);
  1897. }
  1898. break;
  1899. case ENABLE_LOGGING:
  1900. {
  1901. pCodecInst->loggingEnable = 1;
  1902. }
  1903. break;
  1904. case DISABLE_LOGGING:
  1905. {
  1906. pCodecInst->loggingEnable = 0;
  1907. }
  1908. break;
  1909. case DEC_SET_SEQ_CHANGE_MASK:
  1910. if (PRODUCT_ID_NOT_W_SERIES(pCodecInst->productId))
  1911. return RETCODE_INVALID_PARAM;
  1912. pDecInfo->seqChangeMask = *(int*)param;
  1913. break;
  1914. case DEC_SET_WTL_FRAME_FORMAT:
  1915. pDecInfo->wtlFormat = *(FrameBufferFormat*)param;
  1916. break;
  1917. case DEC_SET_DISPLAY_FLAG:
  1918. {
  1919. Int32 index;
  1920. VpuAttr* pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  1921. BOOL supportCommandQueue = FALSE;
  1922. if (param == 0) {
  1923. return RETCODE_INVALID_PARAM;
  1924. }
  1925. index = *(Int32 *)param;
  1926. supportCommandQueue = (pAttr->supportCommandQueue == TRUE);
  1927. if (supportCommandQueue == TRUE) {
  1928. EnterLock(pCodecInst->coreIdx);
  1929. ProductSetDispFlag(pCodecInst, index);
  1930. LeaveLock(pCodecInst->coreIdx);
  1931. }
  1932. else {
  1933. EnterDispFlagLock(pCodecInst->coreIdx);
  1934. pDecInfo->setDisplayIndexes |= (1<<index);
  1935. LeaveDispFlagLock(pCodecInst->coreIdx);
  1936. }
  1937. }
  1938. break;
  1939. case DEC_GET_SCALER_INFO:
  1940. {
  1941. ScalerInfo* scalerInfo = (ScalerInfo*)param;
  1942. if (scalerInfo == NULL) {
  1943. return RETCODE_INVALID_PARAM;
  1944. }
  1945. scalerInfo->enScaler = pDecInfo->scalerEnable;
  1946. scalerInfo->scaleWidth = pDecInfo->scaleWidth;
  1947. scalerInfo->scaleHeight = pDecInfo->scaleHeight;
  1948. }
  1949. break;
  1950. case DEC_SET_SCALER_INFO:
  1951. {
  1952. ScalerInfo* scalerInfo = (ScalerInfo*)param;
  1953. if (!pDecInfo->initialInfoObtained) {
  1954. return RETCODE_WRONG_CALL_SEQUENCE;
  1955. }
  1956. if (scalerInfo == NULL) {
  1957. return RETCODE_INVALID_PARAM;
  1958. }
  1959. pDecInfo->scalerEnable = scalerInfo->enScaler;
  1960. if (scalerInfo->enScaler == TRUE) {
  1961. VpuAttr* pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  1962. Uint32 scalerStep = (pAttr->support2AlignScaler == TRUE) ? 2 : 8;
  1963. // minW = Ceil8(picWidth/8), minH = Ceil8(picHeight/8)
  1964. Uint32 minScaleWidth = VPU_ALIGN8(pDecInfo->initialInfo.picWidth>>3);
  1965. Uint32 minScaleHeight = VPU_ALIGN8(pDecInfo->initialInfo.picHeight>>3);
  1966. if (minScaleWidth == 0) minScaleWidth = 8;
  1967. if (minScaleHeight == 0) minScaleHeight = 8;
  1968. if (scalerInfo->scaleWidth < minScaleWidth || scalerInfo->scaleHeight < minScaleHeight) {
  1969. return RETCODE_INVALID_PARAM;
  1970. }
  1971. if (scalerInfo->scaleWidth > 0 || scalerInfo->scaleHeight > 0) {
  1972. if ((scalerInfo->scaleWidth % scalerStep) || scalerInfo->scaleWidth > (Uint32)(VPU_ALIGN8(pDecInfo->initialInfo.picWidth))) {
  1973. return RETCODE_INVALID_PARAM;
  1974. }
  1975. if ((scalerInfo->scaleHeight % scalerStep) || scalerInfo->scaleHeight > (Uint32)(VPU_ALIGN8(pDecInfo->initialInfo.picHeight))) {
  1976. return RETCODE_INVALID_PARAM;
  1977. }
  1978. pDecInfo->scaleWidth = scalerInfo->scaleWidth;
  1979. pDecInfo->scaleHeight = scalerInfo->scaleHeight;
  1980. pDecInfo->scalerEnable = scalerInfo->enScaler;
  1981. }
  1982. }
  1983. break;
  1984. }
  1985. case DEC_SET_TARGET_TEMPORAL_ID:
  1986. if (param == NULL) {
  1987. return RETCODE_INVALID_PARAM;
  1988. }
  1989. if (pDecInfo->tempIdSelectMode == FALSE)
  1990. pDecInfo->targetSubLayerId = *(Uint32*)param;
  1991. else
  1992. pDecInfo->relTargetLayerId = *(Uint32*)param;
  1993. break;
  1994. case DEC_SET_TEMPORAL_ID_MODE:
  1995. if (param == NULL) {
  1996. return RETCODE_INVALID_PARAM;
  1997. }
  1998. pDecInfo->tempIdSelectMode = *(Uint32*)param;
  1999. break;
  2000. case DEC_SET_BWB_CUR_FRAME_IDX:
  2001. pDecInfo->chBwbFrameIdx = *(Uint32*)param;
  2002. break;
  2003. case DEC_SET_FBC_CUR_FRAME_IDX:
  2004. pDecInfo->chFbcFrameIdx = *(Uint32*)param;
  2005. break;
  2006. case DEC_SET_INTER_RES_INFO_ON:
  2007. pDecInfo->interResChange = 1;
  2008. break;
  2009. case DEC_SET_INTER_RES_INFO_OFF:
  2010. pDecInfo->interResChange = 0;
  2011. break;
  2012. case DEC_FREE_FBC_TABLE_BUFFER:
  2013. {
  2014. Uint32 fbcCurFrameIdx = *(Uint32*)param;
  2015. if(pDecInfo->vbFbcYTbl[fbcCurFrameIdx].size > 0) {
  2016. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcYTbl[fbcCurFrameIdx], DEC_FBCY_TBL, pCodecInst->instIndex);
  2017. pDecInfo->vbFbcYTbl[fbcCurFrameIdx].size = 0;
  2018. }
  2019. if(pDecInfo->vbFbcCTbl[fbcCurFrameIdx].size > 0) {
  2020. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcCTbl[fbcCurFrameIdx], DEC_FBCC_TBL, pCodecInst->instIndex);
  2021. pDecInfo->vbFbcCTbl[fbcCurFrameIdx].size = 0;
  2022. }
  2023. }
  2024. break;
  2025. case DEC_FREE_MV_BUFFER:
  2026. {
  2027. Uint32 fbcCurFrameIdx = *(Uint32*)param;
  2028. if(pDecInfo->vbMV[fbcCurFrameIdx].size > 0) {
  2029. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbMV[fbcCurFrameIdx], DEC_MV, pCodecInst->instIndex);
  2030. pDecInfo->vbMV[fbcCurFrameIdx].size = 0;
  2031. }
  2032. }
  2033. break;
  2034. case DEC_ALLOC_MV_BUFFER:
  2035. {
  2036. Uint32 fbcCurFrameIdx = *(Uint32*)param;
  2037. Uint32 size;
  2038. size = WAVE5_DEC_VP9_MVCOL_BUF_SIZE(pDecInfo->initialInfo.picWidth, pDecInfo->initialInfo.picHeight);
  2039. pDecInfo->vbMV[fbcCurFrameIdx].phys_addr = 0;
  2040. pDecInfo->vbMV[fbcCurFrameIdx].size = ((size+4095)&~4095)+4096; /* 4096 is a margin */
  2041. if (vdi_allocate_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbMV[fbcCurFrameIdx], DEC_MV, pCodecInst->instIndex) < 0)
  2042. return RETCODE_INSUFFICIENT_RESOURCE;
  2043. }
  2044. break;
  2045. case DEC_ALLOC_FBC_Y_TABLE_BUFFER:
  2046. {
  2047. Uint32 fbcCurFrameIdx = *(Uint32*)param;
  2048. Uint32 size;
  2049. size = WAVE5_FBC_LUMA_TABLE_SIZE(VPU_ALIGN64(pDecInfo->initialInfo.picWidth), VPU_ALIGN64(pDecInfo->initialInfo.picHeight));
  2050. size = VPU_ALIGN16(size);
  2051. pDecInfo->vbFbcYTbl[fbcCurFrameIdx].phys_addr = 0;
  2052. pDecInfo->vbFbcYTbl[fbcCurFrameIdx].size = ((size+4095)&~4095)+4096;
  2053. if (vdi_allocate_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcYTbl[fbcCurFrameIdx], DEC_FBCY_TBL, pCodecInst->instIndex) < 0)
  2054. return RETCODE_INSUFFICIENT_RESOURCE;
  2055. }
  2056. break;
  2057. case DEC_ALLOC_FBC_C_TABLE_BUFFER:
  2058. {
  2059. Uint32 fbcCurFrameIdx = *(Uint32*)param;
  2060. Uint32 size;
  2061. size = WAVE5_FBC_CHROMA_TABLE_SIZE(VPU_ALIGN64(pDecInfo->initialInfo.picWidth), VPU_ALIGN64(pDecInfo->initialInfo.picHeight));
  2062. size = VPU_ALIGN16(size);
  2063. pDecInfo->vbFbcCTbl[fbcCurFrameIdx].phys_addr = 0;
  2064. pDecInfo->vbFbcCTbl[fbcCurFrameIdx].size = ((size+4095)&~4095)+4096;
  2065. if (vdi_allocate_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcCTbl[fbcCurFrameIdx], DEC_FBCC_TBL, pCodecInst->instIndex) < 0)
  2066. return RETCODE_INSUFFICIENT_RESOURCE;
  2067. }
  2068. break;
  2069. case GET_BANDWIDTH_REPORT:
  2070. ret = ProductVpuGetBandwidth(pCodecInst, (VPUBWData*)param);
  2071. break;
  2072. case SET_CYCLE_PER_TICK:
  2073. {
  2074. pDecInfo->cyclePerTick = *(Uint32 *)param;
  2075. }
  2076. break;
  2077. case GET_DEBUG_INFORM:
  2078. ret = ProductVpuGetDebugInfo(pCodecInst, (VPUDebugInfo*)param);
  2079. break;
  2080. default:
  2081. return RETCODE_INVALID_COMMAND;
  2082. }
  2083. return ret;
  2084. }
  2085. RetCode VPU_DecAllocateFrameBuffer(DecHandle handle, FrameBufferAllocInfo info, FrameBuffer *frameBuffer)
  2086. {
  2087. CodecInst* pCodecInst;
  2088. DecInfo* pDecInfo;
  2089. RetCode ret;
  2090. Uint32 gdiIndex;
  2091. ret = CheckDecInstanceValidity(handle);
  2092. if (ret != RETCODE_SUCCESS)
  2093. return ret;
  2094. pCodecInst = handle;
  2095. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  2096. if (!frameBuffer) {
  2097. return RETCODE_INVALID_PARAM;
  2098. }
  2099. if (info.type == FB_TYPE_PPU) {
  2100. if (pDecInfo->numFrameBuffers == 0)
  2101. return RETCODE_WRONG_CALL_SEQUENCE;
  2102. if (frameBuffer[0].updateFbInfo == TRUE) {
  2103. pDecInfo->ppuAllocExt = TRUE;
  2104. }
  2105. pDecInfo->ppuAllocExt = frameBuffer[0].updateFbInfo;
  2106. gdiIndex = pDecInfo->numFbsForDecoding;
  2107. ret = ProductVpuAllocateFramebuffer(
  2108. pCodecInst, frameBuffer, (TiledMapType)info.mapType, (Int32)info.num,
  2109. info.stride, info.height, info.format, info.cbcrInterleave, info.nv21, info.endian, &pDecInfo->vbPPU, gdiIndex, FB_TYPE_PPU);
  2110. }
  2111. else if (info.type == FB_TYPE_CODEC) {
  2112. gdiIndex = 0;
  2113. if (frameBuffer[0].updateFbInfo == TRUE) {
  2114. pDecInfo->frameAllocExt = TRUE;
  2115. }
  2116. ret = ProductVpuAllocateFramebuffer(
  2117. pCodecInst, frameBuffer, (TiledMapType)info.mapType, (Int32)info.num,
  2118. info.stride, info.height, info.format, info.cbcrInterleave, info.nv21, info.endian, &pDecInfo->vbFrame, gdiIndex, (FramebufferAllocType)info.type);
  2119. pDecInfo->mapCfg.tiledBaseAddr = pDecInfo->vbFrame.phys_addr;
  2120. }
  2121. return ret;
  2122. }
  2123. RetCode VPU_EncOpen(EncHandle* pHandle, EncOpenParam * pop)
  2124. {
  2125. CodecInst* pCodecInst;
  2126. EncInfo* pEncInfo;
  2127. RetCode ret;
  2128. if ((ret=ProductCheckEncOpenParam(pop)) != RETCODE_SUCCESS)
  2129. return ret;
  2130. EnterLock(pop->coreIdx);
  2131. if (VPU_IsInit(pop->coreIdx) == 0) {
  2132. LeaveLock(pop->coreIdx);
  2133. return RETCODE_NOT_INITIALIZED;
  2134. }
  2135. ret = GetCodecInstance(pop->coreIdx, &pCodecInst);
  2136. if (ret == RETCODE_FAILURE) {
  2137. *pHandle = 0;
  2138. LeaveLock(pop->coreIdx);
  2139. return RETCODE_FAILURE;
  2140. }
  2141. pCodecInst->isDecoder = FALSE;
  2142. *pHandle = pCodecInst;
  2143. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2144. osal_memset(pEncInfo, 0x00, sizeof(EncInfo));
  2145. pEncInfo->openParam = *pop;
  2146. if ((ret=ProductVpuEncBuildUpOpenParam(pCodecInst, pop)) != RETCODE_SUCCESS) {
  2147. *pHandle = 0;
  2148. }
  2149. LeaveLock(pCodecInst->coreIdx);
  2150. return ret;
  2151. }
  2152. RetCode VPU_EncClose(EncHandle handle)
  2153. {
  2154. CodecInst* pCodecInst;
  2155. EncInfo* pEncInfo;
  2156. RetCode ret;
  2157. ret = CheckEncInstanceValidity(handle);
  2158. if (ret != RETCODE_SUCCESS) {
  2159. return ret;
  2160. }
  2161. pCodecInst = handle;
  2162. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2163. EnterLock(pCodecInst->coreIdx);
  2164. if (pEncInfo->initialInfoObtained) {
  2165. VpuWriteReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr, pEncInfo->streamWrPtr);
  2166. VpuWriteReg(pCodecInst->coreIdx, pEncInfo->streamRdPtrRegAddr, pEncInfo->streamRdPtr);
  2167. if ((ret=ProductVpuEncFiniSeq(pCodecInst)) != RETCODE_SUCCESS) {
  2168. if (pCodecInst->loggingEnable)
  2169. vdi_log(pCodecInst->coreIdx, ENC_SEQ_END, 2);
  2170. if (ret == RETCODE_VPU_STILL_RUNNING) {
  2171. LeaveLock(pCodecInst->coreIdx);
  2172. return ret;
  2173. }
  2174. }
  2175. if (pCodecInst->loggingEnable)
  2176. vdi_log(pCodecInst->coreIdx, ENC_SEQ_END, 0);
  2177. pEncInfo->streamWrPtr = VpuReadReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr);
  2178. }
  2179. if (pEncInfo->vbScratch.size) {
  2180. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbScratch, ENC_ETC, pCodecInst->instIndex);
  2181. }
  2182. if (pEncInfo->vbWork.size) {
  2183. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbWork, ENC_WORK, pCodecInst->instIndex);
  2184. }
  2185. if (pEncInfo->vbFrame.size) {
  2186. if (pEncInfo->frameAllocExt == 0)
  2187. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbFrame, ENC_ETC, pCodecInst->instIndex);
  2188. }
  2189. if (pCodecInst->codecMode == W_HEVC_ENC || pCodecInst->codecMode == W_SVAC_ENC || pCodecInst->codecMode == W_AVC_ENC) {
  2190. if (pEncInfo->vbSubSamBuf.size)
  2191. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbSubSamBuf, ENC_SUBSAMBUF, pCodecInst->instIndex);
  2192. if (pEncInfo->vbMV.size)
  2193. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbMV, ENC_MV, pCodecInst->instIndex);
  2194. if (pEncInfo->vbFbcYTbl.size)
  2195. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbFbcYTbl, ENC_FBCY_TBL, pCodecInst->instIndex);
  2196. if (pEncInfo->vbFbcCTbl.size)
  2197. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbFbcCTbl, ENC_FBCC_TBL, pCodecInst->instIndex);
  2198. if (pEncInfo->vbTemp.size)
  2199. vdi_dettach_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbTemp);
  2200. }
  2201. if (pEncInfo->vbPPU.size) {
  2202. if (pEncInfo->ppuAllocExt == 0)
  2203. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbPPU, ENC_ETC, pCodecInst->instIndex);
  2204. }
  2205. if (pEncInfo->vbSubSampFrame.size)
  2206. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbSubSampFrame, ENC_ETC, pCodecInst->instIndex);
  2207. if (pEncInfo->vbMvcSubSampFrame.size)
  2208. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbMvcSubSampFrame, ENC_ETC, pCodecInst->instIndex);
  2209. if (pEncInfo->vbTask.size)
  2210. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbTask, ENC_TASK, pCodecInst->instIndex);
  2211. LeaveLock(pCodecInst->coreIdx);
  2212. FreeCodecInstance(pCodecInst);
  2213. return ret;
  2214. }
  2215. RetCode VPU_EncGetInitialInfo(EncHandle handle, EncInitialInfo * info)
  2216. {
  2217. CodecInst* pCodecInst;
  2218. EncInfo* pEncInfo;
  2219. RetCode ret;
  2220. ret = CheckEncInstanceValidity(handle);
  2221. if (ret != RETCODE_SUCCESS)
  2222. return ret;
  2223. if (info == 0) {
  2224. return RETCODE_INVALID_PARAM;
  2225. }
  2226. pCodecInst = handle;
  2227. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2228. EnterLock(pCodecInst->coreIdx);
  2229. if (GetPendingInst(pCodecInst->coreIdx)) {
  2230. LeaveLock(pCodecInst->coreIdx);
  2231. return RETCODE_FRAME_NOT_COMPLETE;
  2232. }
  2233. if ((ret=ProductVpuEncSetup(pCodecInst)) != RETCODE_SUCCESS) {
  2234. LeaveLock(pCodecInst->coreIdx);
  2235. return ret;
  2236. }
  2237. if (pCodecInst->codecMode == AVC_ENC && pCodecInst->codecModeAux == AVC_AUX_MVC)
  2238. info->minFrameBufferCount = 3; // reconstructed frame + 2 reference frame
  2239. else if(pCodecInst->codecMode == W_HEVC_ENC || pCodecInst->codecMode == W_SVAC_ENC || pCodecInst->codecMode == W_AVC_ENC) {
  2240. info->minFrameBufferCount = pEncInfo->initialInfo.minFrameBufferCount;
  2241. info->minSrcFrameCount = pEncInfo->initialInfo.minSrcFrameCount;
  2242. }
  2243. else
  2244. info->minFrameBufferCount = 2; // reconstructed frame + reference frame
  2245. pEncInfo->initialInfo = *info;
  2246. pEncInfo->initialInfoObtained = TRUE;
  2247. LeaveLock(pCodecInst->coreIdx);
  2248. return RETCODE_SUCCESS;
  2249. }
  2250. RetCode VPU_EncRegisterFrameBuffer(EncHandle handle, FrameBuffer* bufArray, int num, int stride, int height, TiledMapType mapType)
  2251. {
  2252. CodecInst* pCodecInst;
  2253. EncInfo* pEncInfo;
  2254. Int32 i;
  2255. RetCode ret;
  2256. EncOpenParam* openParam;
  2257. FrameBuffer* fb;
  2258. ret = CheckEncInstanceValidity(handle);
  2259. // FIXME temp
  2260. if (ret != RETCODE_SUCCESS)
  2261. return ret;
  2262. pCodecInst = handle;
  2263. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2264. openParam = &pEncInfo->openParam;
  2265. if (pEncInfo->stride)
  2266. return RETCODE_CALLED_BEFORE;
  2267. if (!pEncInfo->initialInfoObtained)
  2268. return RETCODE_WRONG_CALL_SEQUENCE;
  2269. if (num < pEncInfo->initialInfo.minFrameBufferCount)
  2270. return RETCODE_INSUFFICIENT_FRAME_BUFFERS;
  2271. if (stride == 0 || (stride % 8 != 0) || stride < 0)
  2272. return RETCODE_INVALID_STRIDE;
  2273. if (height == 0 || height < 0)
  2274. return RETCODE_INVALID_PARAM;
  2275. if ( pEncInfo->productCode == WAVE521C_DUAL_CODE) {
  2276. if (openParam->bitstreamFormat == STD_HEVC) {
  2277. if (stride % 16 != 0)
  2278. return RETCODE_INVALID_STRIDE;
  2279. }
  2280. }
  2281. else {
  2282. if (openParam->bitstreamFormat == STD_HEVC) {
  2283. if (stride % 32 != 0)
  2284. return RETCODE_INVALID_STRIDE;
  2285. }
  2286. }
  2287. EnterLock(pCodecInst->coreIdx);
  2288. if (GetPendingInst(pCodecInst->coreIdx)) {
  2289. LeaveLock(pCodecInst->coreIdx);
  2290. return RETCODE_FRAME_NOT_COMPLETE;
  2291. }
  2292. pEncInfo->numFrameBuffers = num;
  2293. pEncInfo->stride = stride;
  2294. pEncInfo->frameBufferHeight = height;
  2295. pEncInfo->mapType = mapType;
  2296. pEncInfo->mapCfg.productId = pCodecInst->productId;
  2297. if (bufArray) {
  2298. for(i=0; i<num; i++) {
  2299. pEncInfo->frameBufPool[i] = bufArray[i];
  2300. }
  2301. if (openParam->EncStdParam.waveParam.svcEnable == TRUE) {
  2302. for(i=num; i<num*2; i++) {
  2303. pEncInfo->frameBufPool[i] = bufArray[i];
  2304. }
  2305. }
  2306. }
  2307. if (pEncInfo->frameAllocExt == FALSE) {
  2308. fb = pEncInfo->frameBufPool;
  2309. if (bufArray) {
  2310. if (bufArray[0].bufCb == (PhysicalAddress)-1 && bufArray[0].bufCr == (PhysicalAddress)-1) {
  2311. Uint32 size;
  2312. pEncInfo->frameAllocExt = TRUE;
  2313. size = ProductCalculateFrameBufSize(pCodecInst, pCodecInst->productId, stride, height,
  2314. (TiledMapType)mapType, (FrameBufferFormat)openParam->srcFormat,
  2315. (BOOL)openParam->cbcrInterleave, NULL);
  2316. if (mapType == LINEAR_FRAME_MAP) {
  2317. pEncInfo->vbFrame.phys_addr = bufArray[0].bufY;
  2318. pEncInfo->vbFrame.size = size * num;
  2319. }
  2320. }
  2321. }
  2322. ret = ProductVpuAllocateFramebuffer(
  2323. pCodecInst, fb, (TiledMapType)mapType, num, stride, height, (FrameBufferFormat)openParam->srcFormat,
  2324. openParam->cbcrInterleave, FALSE, openParam->frameEndian, &pEncInfo->vbFrame, 0, FB_TYPE_CODEC);
  2325. if (ret != RETCODE_SUCCESS) {
  2326. SetPendingInst(pCodecInst->coreIdx, 0);
  2327. LeaveLock(pCodecInst->coreIdx);
  2328. return ret;
  2329. }
  2330. }
  2331. ret = ProductVpuRegisterFramebuffer(pCodecInst);
  2332. SetPendingInst(pCodecInst->coreIdx, 0);
  2333. LeaveLock(pCodecInst->coreIdx);
  2334. return ret;
  2335. }
  2336. RetCode VPU_EncGetBitstreamBuffer( EncHandle handle,
  2337. PhysicalAddress * prdPrt,
  2338. PhysicalAddress * pwrPtr,
  2339. int * size)
  2340. {
  2341. CodecInst * pCodecInst;
  2342. EncInfo * pEncInfo;
  2343. PhysicalAddress rdPtr;
  2344. PhysicalAddress wrPtr;
  2345. Uint32 room;
  2346. RetCode ret;
  2347. ret = CheckEncInstanceValidity(handle);
  2348. if (ret != RETCODE_SUCCESS)
  2349. return ret;
  2350. if ( prdPrt == 0 || pwrPtr == 0 || size == 0) {
  2351. return RETCODE_INVALID_PARAM;
  2352. }
  2353. pCodecInst = handle;
  2354. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2355. rdPtr = pEncInfo->streamRdPtr;
  2356. if (GetPendingInst(pCodecInst->coreIdx) == pCodecInst)
  2357. wrPtr = VpuReadReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr);
  2358. else {
  2359. if (handle->productId == PRODUCT_ID_521) {
  2360. EnterLock(pCodecInst->coreIdx);
  2361. ProductVpuEncGetRdWrPtr(pCodecInst, &rdPtr, &wrPtr);
  2362. LeaveLock(pCodecInst->coreIdx);
  2363. }
  2364. else
  2365. wrPtr = pEncInfo->streamWrPtr;
  2366. }
  2367. if(pEncInfo->ringBufferEnable == 1 || pEncInfo->lineBufIntEn == 1) {
  2368. if (wrPtr >= rdPtr) {
  2369. room = wrPtr - rdPtr;
  2370. }
  2371. else {
  2372. room = (pEncInfo->streamBufEndAddr - rdPtr) + (wrPtr - pEncInfo->streamBufStartAddr);
  2373. }
  2374. }
  2375. else {
  2376. if(wrPtr >= rdPtr)
  2377. room = wrPtr - rdPtr;
  2378. else
  2379. return RETCODE_INVALID_PARAM;
  2380. }
  2381. *prdPrt = rdPtr;
  2382. *pwrPtr = wrPtr;
  2383. *size = room;
  2384. return RETCODE_SUCCESS;
  2385. }
  2386. RetCode VPU_EncUpdateBitstreamBuffer(
  2387. EncHandle handle,
  2388. int size)
  2389. {
  2390. CodecInst * pCodecInst;
  2391. EncInfo * pEncInfo;
  2392. PhysicalAddress wrPtr;
  2393. PhysicalAddress rdPtr;
  2394. RetCode ret;
  2395. int room = 0;
  2396. ret = CheckEncInstanceValidity(handle);
  2397. if (ret != RETCODE_SUCCESS)
  2398. return ret;
  2399. pCodecInst = handle;
  2400. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2401. rdPtr = pEncInfo->streamRdPtr;
  2402. if (GetPendingInst(pCodecInst->coreIdx) == pCodecInst)
  2403. wrPtr = VpuReadReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr);
  2404. else
  2405. wrPtr = pEncInfo->streamWrPtr;
  2406. if ( rdPtr < wrPtr ) {
  2407. if ( rdPtr + size > wrPtr ) {
  2408. return RETCODE_INVALID_PARAM;
  2409. }
  2410. }
  2411. if (PRODUCT_ID_NOT_W_SERIES(pCodecInst->productId)) {
  2412. //************** for CODA *********************/
  2413. if (pEncInfo->ringBufferEnable == TRUE || pEncInfo->lineBufIntEn == TRUE) {
  2414. rdPtr += size;
  2415. if (rdPtr > pEncInfo->streamBufEndAddr) {
  2416. if (pEncInfo->lineBufIntEn == TRUE) {
  2417. return RETCODE_INVALID_PARAM;
  2418. }
  2419. room = rdPtr - pEncInfo->streamBufEndAddr;
  2420. rdPtr = pEncInfo->streamBufStartAddr;
  2421. rdPtr += room;
  2422. }
  2423. if (rdPtr == pEncInfo->streamBufEndAddr)
  2424. rdPtr = pEncInfo->streamBufStartAddr;
  2425. }
  2426. else {
  2427. rdPtr = pEncInfo->streamBufStartAddr;
  2428. }
  2429. }
  2430. else {
  2431. //************** for WAVE5 *********************/
  2432. if (size > 0) {
  2433. if (pEncInfo->ringBufferEnable == TRUE) {
  2434. rdPtr += size;
  2435. if (pEncInfo->ringBufferWrapEnable == TRUE) {
  2436. //======== [case1]. ring=1 & wrap=1 ===================
  2437. if (rdPtr > pEncInfo->streamBufEndAddr) {
  2438. if (pEncInfo->lineBufIntEn == TRUE) {
  2439. return RETCODE_INVALID_PARAM;
  2440. }
  2441. room = rdPtr - pEncInfo->streamBufEndAddr;
  2442. rdPtr = pEncInfo->streamBufStartAddr;
  2443. rdPtr += room;
  2444. }
  2445. pEncInfo->streamRdPtr = rdPtr;
  2446. EnterLock(pCodecInst->coreIdx);
  2447. ProductVpuEncUpdateBitstreamBuffer(pCodecInst, size);
  2448. LeaveLock(pCodecInst->coreIdx);
  2449. if (rdPtr == pEncInfo->streamBufEndAddr) {
  2450. //set EndAddr to FW and set StartAddr to API
  2451. rdPtr = pEncInfo->streamBufStartAddr; // wrap-around
  2452. }
  2453. }
  2454. else {
  2455. //========= [case2]. ring=1 & wrap=0 ===================
  2456. pEncInfo->streamRdPtr = rdPtr;
  2457. EnterLock(pCodecInst->coreIdx);
  2458. ProductVpuEncUpdateBitstreamBuffer(pCodecInst, size);
  2459. LeaveLock(pCodecInst->coreIdx);
  2460. if (rdPtr == pEncInfo->streamBufEndAddr) {
  2461. //set EndAddr to FW and set StartAddr to API
  2462. rdPtr = pEncInfo->streamBufStartAddr; // start? end? [FIX ME]
  2463. }
  2464. }
  2465. }
  2466. else {
  2467. //========= [case3]. Line buffer mode ===================
  2468. if (VPU_ALIGN16(wrPtr) >= pEncInfo->streamRdPtr + pEncInfo->streamBufSize) { // linebuffer full detected. already host read whole bistream in bitstreamBuffer.
  2469. EnterLock(pCodecInst->coreIdx);
  2470. ProductVpuEncUpdateBitstreamBuffer(pCodecInst, size);
  2471. LeaveLock(pCodecInst->coreIdx);
  2472. }
  2473. }
  2474. }
  2475. else {
  2476. //************ update new CPB buffer addr/size ***************/
  2477. if (size == UPDATE_NEW_BS_BUF) {
  2478. pEncInfo->streamRdPtr = pEncInfo->streamBufStartAddr;
  2479. pEncInfo->streamBufTobeReadStartAddr = pEncInfo->streamBufStartAddr;
  2480. pEncInfo->streamBufTobeReadSize = pEncInfo->streamBufSize;
  2481. pEncInfo->streamBufTobeReadEndAddr = pEncInfo->streamBufStartAddr + pEncInfo->streamBufSize;
  2482. EnterLock(pCodecInst->coreIdx);
  2483. ProductVpuEncUpdateBitstreamBuffer(pCodecInst, size);
  2484. LeaveLock(pCodecInst->coreIdx);
  2485. rdPtr = pEncInfo->streamBufStartAddr;
  2486. }
  2487. }
  2488. }
  2489. pEncInfo->streamRdPtr = rdPtr;
  2490. pEncInfo->streamWrPtr = wrPtr;
  2491. if (GetPendingInst(pCodecInst->coreIdx) == pCodecInst)
  2492. VpuWriteReg(pCodecInst->coreIdx, pEncInfo->streamRdPtrRegAddr, rdPtr);
  2493. if (pEncInfo->ringBufferEnable == FALSE && pEncInfo->lineBufIntEn == TRUE) {
  2494. pEncInfo->streamRdPtr = pEncInfo->streamBufStartAddr;
  2495. }
  2496. return RETCODE_SUCCESS;
  2497. }
  2498. RetCode VPU_EncStartOneFrame(
  2499. EncHandle handle,
  2500. EncParam * param
  2501. )
  2502. {
  2503. CodecInst* pCodecInst;
  2504. EncInfo* pEncInfo;
  2505. RetCode ret;
  2506. VpuAttr* pAttr = NULL;
  2507. vpu_instance_pool_t* vip;
  2508. ret = CheckEncInstanceValidity(handle);
  2509. if (ret != RETCODE_SUCCESS)
  2510. return ret;
  2511. pCodecInst = handle;
  2512. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2513. vip = (vpu_instance_pool_t *)vdi_get_instance_pool(pCodecInst->coreIdx);
  2514. if (!vip) {
  2515. return RETCODE_INVALID_HANDLE;
  2516. }
  2517. if (pEncInfo->stride == 0) { // This means frame buffers have not been registered.
  2518. return RETCODE_WRONG_CALL_SEQUENCE;
  2519. }
  2520. ret = CheckEncParam(handle, param);
  2521. if (ret != RETCODE_SUCCESS) {
  2522. return ret;
  2523. }
  2524. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  2525. EnterLock(pCodecInst->coreIdx);
  2526. pEncInfo->ptsMap[param->srcIdx] = (pEncInfo->openParam.enablePTS == TRUE) ? GetTimestamp(handle) : param->pts;
  2527. if (GetPendingInst(pCodecInst->coreIdx)) {
  2528. LeaveLock(pCodecInst->coreIdx);
  2529. return RETCODE_FRAME_NOT_COMPLETE;
  2530. }
  2531. ret = ProductVpuEncode(pCodecInst, param);
  2532. if (pAttr->supportCommandQueue == TRUE) {
  2533. SetPendingInst(pCodecInst->coreIdx, NULL);
  2534. LeaveLock(pCodecInst->coreIdx);
  2535. }
  2536. else {
  2537. SetPendingInst(pCodecInst->coreIdx, pCodecInst);
  2538. }
  2539. return ret;
  2540. }
  2541. RetCode VPU_EncGetOutputInfo(
  2542. EncHandle handle,
  2543. EncOutputInfo* info
  2544. )
  2545. {
  2546. CodecInst* pCodecInst;
  2547. EncInfo* pEncInfo;
  2548. RetCode ret;
  2549. VpuAttr* pAttr;
  2550. ret = CheckEncInstanceValidity(handle);
  2551. if (ret != RETCODE_SUCCESS) {
  2552. return ret;
  2553. }
  2554. if (info == 0) {
  2555. return RETCODE_INVALID_PARAM;
  2556. }
  2557. pCodecInst = handle;
  2558. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2559. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  2560. if (pAttr->supportCommandQueue == TRUE) {
  2561. EnterLock(pCodecInst->coreIdx);
  2562. }
  2563. else {
  2564. if (pCodecInst != GetPendingInst(pCodecInst->coreIdx)) {
  2565. SetPendingInst(pCodecInst->coreIdx, 0);
  2566. LeaveLock(pCodecInst->coreIdx);
  2567. return RETCODE_WRONG_CALL_SEQUENCE;
  2568. }
  2569. }
  2570. ret = ProductVpuEncGetResult(pCodecInst, info);
  2571. if (ret == RETCODE_SUCCESS) {
  2572. if (info->encSrcIdx >= 0 && info->reconFrameIndex >= 0 )
  2573. info->pts = pEncInfo->ptsMap[info->encSrcIdx];
  2574. }
  2575. else {
  2576. info->pts = 0LL;
  2577. }
  2578. SetPendingInst(pCodecInst->coreIdx, 0);
  2579. LeaveLock(pCodecInst->coreIdx);
  2580. return ret;
  2581. }
  2582. RetCode VPU_EncGiveCommand(
  2583. EncHandle handle,
  2584. CodecCommand cmd,
  2585. void* param
  2586. )
  2587. {
  2588. CodecInst* pCodecInst;
  2589. EncInfo* pEncInfo;
  2590. RetCode ret;
  2591. ret = CheckEncInstanceValidity(handle);
  2592. if (ret != RETCODE_SUCCESS) {
  2593. return ret;
  2594. }
  2595. pCodecInst = handle;
  2596. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2597. switch (cmd)
  2598. {
  2599. case ENABLE_ROTATION :
  2600. {
  2601. pEncInfo->rotationEnable = 1;
  2602. }
  2603. break;
  2604. case DISABLE_ROTATION :
  2605. {
  2606. pEncInfo->rotationEnable = 0;
  2607. }
  2608. break;
  2609. case ENABLE_MIRRORING :
  2610. {
  2611. pEncInfo->mirrorEnable = 1;
  2612. }
  2613. break;
  2614. case DISABLE_MIRRORING :
  2615. {
  2616. pEncInfo->mirrorEnable = 0;
  2617. }
  2618. break;
  2619. case SET_MIRROR_DIRECTION :
  2620. {
  2621. MirrorDirection mirDir;
  2622. if (param == 0) {
  2623. return RETCODE_INVALID_PARAM;
  2624. }
  2625. mirDir = *(MirrorDirection *)param;
  2626. if ( !(mirDir == MIRDIR_NONE) && !(mirDir==MIRDIR_HOR) && !(mirDir==MIRDIR_VER) && !(mirDir==MIRDIR_HOR_VER)) {
  2627. return RETCODE_INVALID_PARAM;
  2628. }
  2629. pEncInfo->mirrorDirection = mirDir;
  2630. }
  2631. break;
  2632. case SET_ROTATION_ANGLE :
  2633. {
  2634. int angle;
  2635. if (param == 0) {
  2636. return RETCODE_INVALID_PARAM;
  2637. }
  2638. angle = *(int *)param;
  2639. if (angle != 0 && angle != 90 &&
  2640. angle != 180 && angle != 270) {
  2641. return RETCODE_INVALID_PARAM;
  2642. }
  2643. if (pEncInfo->initialInfoObtained && (angle == 90 || angle ==270)) {
  2644. return RETCODE_INVALID_PARAM;
  2645. }
  2646. pEncInfo->rotationAngle = angle;
  2647. }
  2648. break;
  2649. case SET_CACHE_CONFIG:
  2650. {
  2651. MaverickCacheConfig *mcCacheConfig;
  2652. if (param == 0) {
  2653. return RETCODE_INVALID_PARAM;
  2654. }
  2655. mcCacheConfig = (MaverickCacheConfig *)param;
  2656. pEncInfo->cacheConfig = *mcCacheConfig;
  2657. }
  2658. break;
  2659. case ENC_PUT_VIDEO_HEADER:
  2660. {
  2661. EncHeaderParam *encHeaderParam;
  2662. if (param == 0) {
  2663. return RETCODE_INVALID_PARAM;
  2664. }
  2665. encHeaderParam = (EncHeaderParam *)param;
  2666. if (pCodecInst->codecMode == MP4_ENC ) {
  2667. if (!( VOL_HEADER<=encHeaderParam->headerType && encHeaderParam->headerType <= VIS_HEADER)) {
  2668. return RETCODE_INVALID_PARAM;
  2669. }
  2670. }
  2671. else if (pCodecInst->codecMode == AVC_ENC) {
  2672. if (!( SPS_RBSP<=encHeaderParam->headerType && encHeaderParam->headerType <= PPS_RBSP_MVC)) {
  2673. return RETCODE_INVALID_PARAM;
  2674. }
  2675. }
  2676. else if (pCodecInst->codecMode == W_HEVC_ENC || pCodecInst->codecMode == W_SVAC_ENC || pCodecInst->codecMode == W_AVC_ENC) {
  2677. if (!( CODEOPT_ENC_VPS<=encHeaderParam->headerType && encHeaderParam->headerType <= (CODEOPT_ENC_VPS|CODEOPT_ENC_SPS|CODEOPT_ENC_PPS))) {
  2678. return RETCODE_INVALID_PARAM;
  2679. }
  2680. if (pEncInfo->ringBufferEnable == 0 ) {
  2681. if (encHeaderParam->buf % 16 || encHeaderParam->size == 0)
  2682. return RETCODE_INVALID_PARAM;
  2683. }
  2684. if (encHeaderParam->headerType & CODEOPT_ENC_VCL) // ENC_PUT_VIDEO_HEADER encode only non-vcl header.
  2685. return RETCODE_INVALID_PARAM;
  2686. }
  2687. else
  2688. return RETCODE_INVALID_PARAM;
  2689. if (pEncInfo->ringBufferEnable == 0 ) {
  2690. if (encHeaderParam->buf % 8 || encHeaderParam->size == 0) {
  2691. return RETCODE_INVALID_PARAM;
  2692. }
  2693. }
  2694. if (pCodecInst->codecMode == W_HEVC_ENC || pCodecInst->codecMode == W_SVAC_ENC || pCodecInst->codecMode == W_AVC_ENC) {
  2695. if (handle->productId == PRODUCT_ID_521)
  2696. return Wave5VpuEncGetHeader(handle, encHeaderParam);
  2697. else
  2698. return RETCODE_INVALID_PARAM;
  2699. }
  2700. else {
  2701. return GetEncHeader(handle, encHeaderParam);
  2702. }
  2703. }
  2704. case ENC_SET_PARAM:
  2705. {
  2706. if (param == 0) {
  2707. return RETCODE_INVALID_PARAM;
  2708. }
  2709. pEncInfo->openParam = *(EncOpenParam *)param;
  2710. if (pCodecInst->codecMode != AVC_ENC)
  2711. return RETCODE_INVALID_COMMAND;
  2712. ret = EncParaSet(handle, SPS_RBSP);
  2713. if (ret != RETCODE_SUCCESS)
  2714. return ret;
  2715. ret = EncParaSet(handle, PPS_RBSP);
  2716. if (ret != RETCODE_SUCCESS)
  2717. return ret;
  2718. return ret;
  2719. }
  2720. case ENC_SET_GOP_NUMBER:
  2721. {
  2722. int *pGopNumber =(int *)param;
  2723. if (pCodecInst->codecMode != MP4_ENC && pCodecInst->codecMode != AVC_ENC) {
  2724. return RETCODE_INVALID_COMMAND;
  2725. }
  2726. if (*pGopNumber < 0)
  2727. return RETCODE_INVALID_PARAM;
  2728. pEncInfo->openParam.gopSize = *pGopNumber;
  2729. SetGopNumber(handle, (Uint32 *)pGopNumber);
  2730. }
  2731. break;
  2732. case ENC_SET_INTRA_QP:
  2733. {
  2734. int *pIntraQp =(int *)param;
  2735. if (pCodecInst->codecMode != MP4_ENC && pCodecInst->codecMode != AVC_ENC) {
  2736. return RETCODE_INVALID_COMMAND;
  2737. }
  2738. if (pCodecInst->codecMode == MP4_ENC)
  2739. {
  2740. if(*pIntraQp<1 || *pIntraQp>31)
  2741. return RETCODE_INVALID_PARAM;
  2742. }
  2743. if (pCodecInst->codecMode == AVC_ENC)
  2744. {
  2745. if(*pIntraQp<0 || *pIntraQp>51)
  2746. return RETCODE_INVALID_PARAM;
  2747. }
  2748. SetIntraQp(handle, (Uint32 *)pIntraQp);
  2749. }
  2750. break;
  2751. case ENC_SET_BITRATE:
  2752. {
  2753. int *pBitrate = (int *)param;
  2754. if (pCodecInst->codecMode != MP4_ENC && pCodecInst->codecMode != AVC_ENC) {
  2755. return RETCODE_INVALID_COMMAND;
  2756. }
  2757. {
  2758. if (*pBitrate < 0 || *pBitrate> 32767) {
  2759. return RETCODE_INVALID_PARAM;
  2760. }
  2761. }
  2762. SetBitrate(handle, (Uint32 *)pBitrate);
  2763. }
  2764. break;
  2765. case ENC_SET_FRAME_RATE:
  2766. {
  2767. int *pFramerate = (int *)param;
  2768. if (pCodecInst->codecMode != MP4_ENC && pCodecInst->codecMode != AVC_ENC) {
  2769. return RETCODE_INVALID_COMMAND;
  2770. }
  2771. if (*pFramerate <= 0) {
  2772. return RETCODE_INVALID_PARAM;
  2773. }
  2774. SetFramerate(handle, (Uint32 *)pFramerate);
  2775. }
  2776. break;
  2777. case ENC_SET_INTRA_MB_REFRESH_NUMBER:
  2778. {
  2779. int *pIntraRefreshNum =(int *)param;
  2780. SetIntraRefreshNum(handle, (Uint32 *)pIntraRefreshNum);
  2781. }
  2782. break;
  2783. case ENC_SET_SLICE_INFO:
  2784. {
  2785. EncSliceMode *pSliceMode = (EncSliceMode *)param;
  2786. if(pSliceMode->sliceMode<0 || pSliceMode->sliceMode>1)
  2787. {
  2788. return RETCODE_INVALID_PARAM;
  2789. }
  2790. if(pSliceMode->sliceSizeMode<0 || pSliceMode->sliceSizeMode>1)
  2791. {
  2792. return RETCODE_INVALID_PARAM;
  2793. }
  2794. SetSliceMode(handle, (EncSliceMode *)pSliceMode);
  2795. }
  2796. break;
  2797. case ENC_ENABLE_HEC:
  2798. {
  2799. if (pCodecInst->codecMode != MP4_ENC) {
  2800. return RETCODE_INVALID_COMMAND;
  2801. }
  2802. SetHecMode(handle, 1);
  2803. }
  2804. break;
  2805. case ENC_DISABLE_HEC:
  2806. {
  2807. if (pCodecInst->codecMode != MP4_ENC) {
  2808. return RETCODE_INVALID_COMMAND;
  2809. }
  2810. SetHecMode(handle, 0);
  2811. }
  2812. break;
  2813. case SET_SEC_AXI:
  2814. {
  2815. SecAxiUse secAxiUse;
  2816. if (param == 0) {
  2817. return RETCODE_INVALID_PARAM;
  2818. }
  2819. secAxiUse = *(SecAxiUse *)param;
  2820. if (handle->productId == PRODUCT_ID_521) {
  2821. pEncInfo->secAxiInfo.u.wave.useEncRdoEnable = secAxiUse.u.wave.useEncRdoEnable;
  2822. pEncInfo->secAxiInfo.u.wave.useEncLfEnable = secAxiUse.u.wave.useEncLfEnable;
  2823. }
  2824. else { // coda9 or coda7q or ...
  2825. pEncInfo->secAxiInfo.u.coda9.useBitEnable = secAxiUse.u.coda9.useBitEnable;
  2826. pEncInfo->secAxiInfo.u.coda9.useIpEnable = secAxiUse.u.coda9.useIpEnable;
  2827. pEncInfo->secAxiInfo.u.coda9.useDbkYEnable = secAxiUse.u.coda9.useDbkYEnable;
  2828. pEncInfo->secAxiInfo.u.coda9.useDbkCEnable = secAxiUse.u.coda9.useDbkCEnable;
  2829. pEncInfo->secAxiInfo.u.coda9.useOvlEnable = secAxiUse.u.coda9.useOvlEnable;
  2830. pEncInfo->secAxiInfo.u.coda9.useBtpEnable = secAxiUse.u.coda9.useBtpEnable;
  2831. }
  2832. }
  2833. break;
  2834. case GET_TILEDMAP_CONFIG:
  2835. {
  2836. TiledMapConfig *pMapCfg = (TiledMapConfig *)param;
  2837. if (!pMapCfg) {
  2838. return RETCODE_INVALID_PARAM;
  2839. }
  2840. *pMapCfg = pEncInfo->mapCfg;
  2841. break;
  2842. }
  2843. case SET_DRAM_CONFIG:
  2844. {
  2845. DRAMConfig *cfg = (DRAMConfig *)param;
  2846. if (!cfg) {
  2847. return RETCODE_INVALID_PARAM;
  2848. }
  2849. pEncInfo->dramCfg = *cfg;
  2850. break;
  2851. }
  2852. case GET_DRAM_CONFIG:
  2853. {
  2854. DRAMConfig *cfg = (DRAMConfig *)param;
  2855. if (!cfg) {
  2856. return RETCODE_INVALID_PARAM;
  2857. }
  2858. *cfg = pEncInfo->dramCfg;
  2859. break;
  2860. }
  2861. case ENABLE_LOGGING:
  2862. {
  2863. pCodecInst->loggingEnable = 1;
  2864. }
  2865. break;
  2866. case DISABLE_LOGGING:
  2867. {
  2868. pCodecInst->loggingEnable = 0;
  2869. }
  2870. break;
  2871. case ENC_SET_PARA_CHANGE:
  2872. {
  2873. EncChangeParam* option = (EncChangeParam*)param;
  2874. if (handle->productId == PRODUCT_ID_521)
  2875. return Wave5VpuEncParaChange(handle, option);
  2876. else
  2877. return RETCODE_INVALID_PARAM;
  2878. }
  2879. case GET_BANDWIDTH_REPORT :
  2880. return ProductVpuGetBandwidth(pCodecInst, (VPUBWData*)param);
  2881. case ENC_GET_QUEUE_STATUS:
  2882. {
  2883. QueueStatusInfo* queueInfo = (QueueStatusInfo*)param;
  2884. queueInfo->instanceQueueCount = pEncInfo->instanceQueueCount;
  2885. queueInfo->reportQueueCount = pEncInfo->reportQueueCount;
  2886. break;
  2887. }
  2888. case ENC_WRPTR_SEL:
  2889. {
  2890. pEncInfo->encWrPtrSel = *(int *)param;
  2891. }
  2892. break;
  2893. case SET_CYCLE_PER_TICK:
  2894. {
  2895. pEncInfo->cyclePerTick = *(Uint32 *)param;
  2896. }
  2897. break;
  2898. case ENC_GET_SRC_BUF_FLAG:
  2899. return ProductVpuGetSrcBufFlag(pCodecInst, (Uint32*)param);
  2900. case GET_DEBUG_INFORM:
  2901. return ProductVpuGetDebugInfo(pCodecInst, (VPUDebugInfo*)param);
  2902. #ifdef SUPPORT_LOOK_AHEAD_RC
  2903. case ENC_SET_LARC_DATA:
  2904. {
  2905. EncLarcInfo* larcInfo = (EncLarcInfo*)param;
  2906. if (handle->productId == PRODUCT_ID_521)
  2907. return Wave5VpuEncSetLarcData(handle, *larcInfo);
  2908. else
  2909. return RETCODE_INVALID_PARAM;
  2910. }
  2911. break;
  2912. #endif
  2913. default:
  2914. return RETCODE_INVALID_COMMAND;
  2915. }
  2916. return RETCODE_SUCCESS;
  2917. }
  2918. RetCode VPU_EncAllocateFrameBuffer(EncHandle handle, FrameBufferAllocInfo info, FrameBuffer *frameBuffer)
  2919. {
  2920. CodecInst* pCodecInst;
  2921. EncInfo* pEncInfo;
  2922. RetCode ret;
  2923. int gdiIndex;
  2924. ret = CheckEncInstanceValidity(handle);
  2925. if (ret != RETCODE_SUCCESS)
  2926. return ret;
  2927. pCodecInst = handle;
  2928. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2929. if (!frameBuffer) {
  2930. return RETCODE_INVALID_PARAM;
  2931. }
  2932. if (info.num == 0 || info.num < 0) {
  2933. return RETCODE_INVALID_PARAM;
  2934. }
  2935. if (info.stride == 0 || info.stride < 0) {
  2936. return RETCODE_INVALID_PARAM;
  2937. }
  2938. if (info.height == 0 || info.height < 0) {
  2939. return RETCODE_INVALID_PARAM;
  2940. }
  2941. if (info.type == FB_TYPE_PPU) {
  2942. if (pEncInfo->numFrameBuffers == 0) {
  2943. return RETCODE_WRONG_CALL_SEQUENCE;
  2944. }
  2945. pEncInfo->ppuAllocExt = frameBuffer[0].updateFbInfo;
  2946. gdiIndex = pEncInfo->numFrameBuffers;
  2947. ret = ProductVpuAllocateFramebuffer(pCodecInst, frameBuffer, (TiledMapType)info.mapType, (Int32)info.num,
  2948. info.stride, info.height, info.format, info.cbcrInterleave, info.nv21,
  2949. info.endian, &pEncInfo->vbPPU, gdiIndex, (FramebufferAllocType)info.type);
  2950. }
  2951. else if (info.type == FB_TYPE_CODEC) {
  2952. gdiIndex = 0;
  2953. pEncInfo->frameAllocExt = frameBuffer[0].updateFbInfo;
  2954. ret = ProductVpuAllocateFramebuffer(
  2955. pCodecInst, frameBuffer, (TiledMapType)info.mapType, (Int32)info.num,
  2956. info.stride, info.height, info.format, info.cbcrInterleave, FALSE, info.endian, &pEncInfo->vbFrame, gdiIndex, (FramebufferAllocType)info.type);
  2957. }
  2958. else {
  2959. ret = RETCODE_INVALID_PARAM;
  2960. }
  2961. return ret;
  2962. }
  2963. RetCode VPU_EncIssueSeqInit(EncHandle handle)
  2964. {
  2965. CodecInst* pCodecInst;
  2966. RetCode ret;
  2967. VpuAttr* pAttr;
  2968. ret = CheckEncInstanceValidity(handle);
  2969. if (ret != RETCODE_SUCCESS)
  2970. return ret;
  2971. pCodecInst = handle;
  2972. EnterLock(pCodecInst->coreIdx);
  2973. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  2974. if (GetPendingInst(pCodecInst->coreIdx)) {
  2975. LeaveLock(pCodecInst->coreIdx);
  2976. return RETCODE_FRAME_NOT_COMPLETE;
  2977. }
  2978. ret = ProductVpuEncInitSeq(handle);
  2979. if (ret == RETCODE_SUCCESS) {
  2980. SetPendingInst(pCodecInst->coreIdx, pCodecInst);
  2981. }
  2982. if (pAttr->supportCommandQueue == TRUE) {
  2983. SetPendingInst(pCodecInst->coreIdx, NULL);
  2984. LeaveLock(pCodecInst->coreIdx);
  2985. }
  2986. return ret;
  2987. }
  2988. RetCode VPU_EncCompleteSeqInit(EncHandle handle, EncInitialInfo * info)
  2989. {
  2990. CodecInst* pCodecInst;
  2991. EncInfo* pEncInfo;
  2992. RetCode ret;
  2993. VpuAttr* pAttr;
  2994. ret = CheckEncInstanceValidity(handle);
  2995. if (ret != RETCODE_SUCCESS) {
  2996. return ret;
  2997. }
  2998. if (info == 0) {
  2999. return RETCODE_INVALID_PARAM;
  3000. }
  3001. pCodecInst = handle;
  3002. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  3003. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  3004. if (pAttr->supportCommandQueue == TRUE) {
  3005. EnterLock(pCodecInst->coreIdx);
  3006. }
  3007. else {
  3008. if (pCodecInst != GetPendingInst(pCodecInst->coreIdx)) {
  3009. SetPendingInst(pCodecInst->coreIdx, 0);
  3010. LeaveLock(pCodecInst->coreIdx);
  3011. return RETCODE_WRONG_CALL_SEQUENCE;
  3012. }
  3013. }
  3014. ret = ProductVpuEncGetSeqInfo(handle, info);
  3015. if (ret == RETCODE_SUCCESS) {
  3016. pEncInfo->initialInfoObtained = 1;
  3017. }
  3018. //info->rdPtr = VpuReadReg(pCodecInst->coreIdx, pEncInfo->streamRdPtrRegAddr);
  3019. //info->wrPtr = VpuReadReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr);
  3020. //pEncInfo->prevFrameEndPos = info->rdPtr;
  3021. pEncInfo->initialInfo = *info;
  3022. SetPendingInst(pCodecInst->coreIdx, NULL);
  3023. LeaveLock(pCodecInst->coreIdx);
  3024. return ret;
  3025. }