vpuapi.c 116 KB

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  1. // SPDX-License-Identifier: LGPL-2.1 OR BSD-3-Clause
  2. //--=========================================================================--
  3. // This file is a part of VPU Reference API project
  4. //-----------------------------------------------------------------------------
  5. //
  6. // This confidential and proprietary software may be used only
  7. // as authorized by a licensing agreement from Chips&Media Inc.
  8. // In the event of publication, the following notice is applicable:
  9. //
  10. // (C) COPYRIGHT 2006 - 2013 CHIPS&MEDIA INC.
  11. // ALL RIGHTS RESERVED
  12. //
  13. // The entire notice above must be reproduced on all authorized
  14. // copies.
  15. //
  16. //--=========================================================================--
  17. #include "vpuapifunc.h"
  18. #include "product.h"
  19. #include "wave/common/common_regdefine.h"
  20. #include "wave/wave5/wave5.h"
  21. #ifdef BIT_CODE_FILE_PATH
  22. #include BIT_CODE_FILE_PATH
  23. #endif
  24. #define INVALID_CORE_INDEX_RETURN_ERROR(_coreIdx) \
  25. if (_coreIdx >= MAX_NUM_VPU_CORE) \
  26. return -1;
  27. static const Uint16* s_pusBitCode[MAX_NUM_VPU_CORE] = {NULL,};
  28. static int s_bitCodeSize[MAX_NUM_VPU_CORE] = {0,};
  29. Uint32 __VPU_BUSY_TIMEOUT = VPU_BUSY_CHECK_TIMEOUT;
  30. static RetCode CheckInstanceValidity(CodecInst * pCodecInst)
  31. {
  32. int i;
  33. vpu_instance_pool_t *vip;
  34. vip = (vpu_instance_pool_t *)vdi_get_instance_pool(pCodecInst->coreIdx);
  35. if (!vip)
  36. return RETCODE_INSUFFICIENT_RESOURCE;
  37. for (i = 0; i < MAX_NUM_INSTANCE; i++) {
  38. if ((CodecInst *)vip->codecInstPool[i] == pCodecInst)
  39. return RETCODE_SUCCESS;
  40. }
  41. return RETCODE_INVALID_HANDLE;
  42. }
  43. static RetCode CheckDecInstanceValidity(CodecInst* pCodecInst)
  44. {
  45. RetCode ret;
  46. if (pCodecInst == NULL)
  47. return RETCODE_INVALID_HANDLE;
  48. ret = CheckInstanceValidity(pCodecInst);
  49. if (ret != RETCODE_SUCCESS) {
  50. return RETCODE_INVALID_HANDLE;
  51. }
  52. if (!pCodecInst->inUse) {
  53. return RETCODE_INVALID_HANDLE;
  54. }
  55. return ProductVpuDecCheckCapability(pCodecInst);
  56. }
  57. Int32 VPU_IsBusy(Uint32 coreIdx)
  58. {
  59. Uint32 ret = 0;
  60. INVALID_CORE_INDEX_RETURN_ERROR(coreIdx);
  61. SetClockGate(coreIdx, 1);
  62. ret = ProductVpuIsBusy(coreIdx);
  63. SetClockGate(coreIdx, 0);
  64. return ret != 0;
  65. }
  66. Int32 VPU_IsInit(Uint32 coreIdx)
  67. {
  68. Int32 pc;
  69. INVALID_CORE_INDEX_RETURN_ERROR(coreIdx);
  70. SetClockGate(coreIdx, 1);
  71. pc = ProductVpuIsInit(coreIdx);
  72. SetClockGate(coreIdx, 0);
  73. return pc;
  74. }
  75. Int32 VPU_WaitInterrupt(Uint32 coreIdx, int timeout)
  76. {
  77. Int32 ret;
  78. CodecInst* instance;
  79. INVALID_CORE_INDEX_RETURN_ERROR(coreIdx);
  80. if ((instance=GetPendingInst(coreIdx)) != NULL) {
  81. ret = ProductVpuWaitInterrupt(instance, timeout);
  82. }
  83. else {
  84. ret = -1;
  85. }
  86. return ret;
  87. }
  88. Int32 VPU_WaitInterruptEx(VpuHandle handle, int timeout)
  89. {
  90. Int32 ret;
  91. CodecInst *pCodecInst;
  92. pCodecInst = handle;
  93. INVALID_CORE_INDEX_RETURN_ERROR(pCodecInst->coreIdx);
  94. ret = ProductVpuWaitInterrupt(pCodecInst, timeout);
  95. return ret;
  96. }
  97. void VPU_ClearInterrupt(Uint32 coreIdx)
  98. {
  99. /* clear all interrupt flags */
  100. ProductVpuClearInterrupt(coreIdx, 0xffff);
  101. }
  102. void VPU_ClearInterruptEx(VpuHandle handle, Int32 intrFlag)
  103. {
  104. CodecInst *pCodecInst;
  105. pCodecInst = handle;
  106. ProductVpuClearInterrupt(pCodecInst->coreIdx, intrFlag);
  107. }
  108. int VPU_GetMvColBufSize(CodStd codStd, int width, int height, int num)
  109. {
  110. int size_mvcolbuf = ProductCalculateAuxBufferSize(AUX_BUF_TYPE_MVCOL, codStd, width, height);
  111. if (codStd == STD_AVC || codStd == STD_HEVC || codStd == STD_VP9 )
  112. size_mvcolbuf *= num;
  113. return size_mvcolbuf;
  114. }
  115. RetCode VPU_GetFBCOffsetTableSize(CodStd codStd, int width, int height, int* ysize, int* csize)
  116. {
  117. if (ysize == NULL || csize == NULL)
  118. return RETCODE_INVALID_PARAM;
  119. *ysize = ProductCalculateAuxBufferSize(AUX_BUF_TYPE_FBC_Y_OFFSET, codStd, width, height);
  120. *csize = ProductCalculateAuxBufferSize(AUX_BUF_TYPE_FBC_C_OFFSET, codStd, width, height);
  121. return RETCODE_SUCCESS;
  122. }
  123. int VPU_GetFrameBufSize(int coreIdx, int stride, int height, int mapType, int format, int interleave, DRAMConfig *pDramCfg)
  124. {
  125. int productId;
  126. UNREFERENCED_PARAMETER(interleave); /*!<< for backward compatiblity */
  127. if (coreIdx < 0 || coreIdx >= MAX_NUM_VPU_CORE)
  128. return -1;
  129. productId = ProductVpuGetId(coreIdx);
  130. return ProductCalculateFrameBufSize(productId, stride, height, (TiledMapType)mapType, (FrameBufferFormat)format, (BOOL)interleave, pDramCfg);
  131. }
  132. int VPU_GetProductId(int coreIdx)
  133. {
  134. Int32 productId;
  135. INVALID_CORE_INDEX_RETURN_ERROR(coreIdx);
  136. if ((productId=ProductVpuGetId(coreIdx)) != PRODUCT_ID_NONE) {
  137. return productId;
  138. }
  139. if (vdi_init(coreIdx) < 0)
  140. return -1;
  141. EnterLock(coreIdx);
  142. if (ProductVpuScan(coreIdx) == FALSE)
  143. productId = -1;
  144. else
  145. productId = ProductVpuGetId(coreIdx);
  146. LeaveLock((coreIdx));
  147. vdi_release(coreIdx);
  148. return productId;
  149. }
  150. int VPU_GetOpenInstanceNum(Uint32 coreIdx)
  151. {
  152. INVALID_CORE_INDEX_RETURN_ERROR(coreIdx);
  153. return vdi_get_instance_num(coreIdx);
  154. }
  155. static RetCode InitializeVPU(Uint32 coreIdx, const Uint16* code, Uint32 size)
  156. {
  157. RetCode ret;
  158. if (vdi_init(coreIdx) < 0)
  159. return RETCODE_FAILURE;
  160. EnterLock(coreIdx);
  161. if (vdi_get_instance_num(coreIdx) > 0) {
  162. if (ProductVpuScan(coreIdx) == 0) {
  163. LeaveLock(coreIdx);
  164. return RETCODE_NOT_FOUND_VPU_DEVICE;
  165. }
  166. }
  167. if (VPU_IsInit(coreIdx) != 0) {
  168. SetClockGate(coreIdx, 1);
  169. ProductVpuReInit(coreIdx, (void *)code, size);
  170. LeaveLock(coreIdx);
  171. return RETCODE_CALLED_BEFORE;
  172. }
  173. InitCodecInstancePool(coreIdx);
  174. SetClockGate(coreIdx, 1);
  175. ret = ProductVpuReset(coreIdx, SW_RESET_ON_BOOT);
  176. if (ret != RETCODE_SUCCESS) {
  177. LeaveLock(coreIdx);
  178. return ret;
  179. }
  180. ret = ProductVpuInit(coreIdx, (void*)code, size);
  181. if (ret != RETCODE_SUCCESS) {
  182. LeaveLock(coreIdx);
  183. return ret;
  184. }
  185. LeaveLock(coreIdx);
  186. return RETCODE_SUCCESS;
  187. }
  188. RetCode VPU_Init(Uint32 coreIdx)
  189. {
  190. #ifdef BIT_CODE_FILE_PATH
  191. s_pusBitCode[coreIdx] = bit_code;
  192. s_bitCodeSize[coreIdx] = sizeof(bit_code)/sizeof(bit_code[0]);
  193. #endif
  194. if (coreIdx >= MAX_NUM_VPU_CORE)
  195. return RETCODE_INVALID_PARAM;
  196. if (s_bitCodeSize[coreIdx] == 0)
  197. return RETCODE_NOT_FOUND_BITCODE_PATH;
  198. return InitializeVPU(coreIdx, s_pusBitCode[coreIdx], s_bitCodeSize[coreIdx]);
  199. }
  200. RetCode VPU_InitWithBitcode(Uint32 coreIdx, const Uint16* code, Uint32 size)
  201. {
  202. if (coreIdx >= MAX_NUM_VPU_CORE)
  203. return RETCODE_INVALID_PARAM;
  204. if (code == NULL || size == 0)
  205. return RETCODE_INVALID_PARAM;
  206. s_pusBitCode[coreIdx] = NULL;
  207. s_pusBitCode[coreIdx] = (Uint16 *)osal_malloc(size*sizeof(Uint16));
  208. if (!s_pusBitCode[coreIdx])
  209. return RETCODE_INSUFFICIENT_RESOURCE;
  210. osal_memcpy((void *)s_pusBitCode[coreIdx], (const void *)code, size*sizeof(Uint16));
  211. s_bitCodeSize[coreIdx] = size;
  212. return InitializeVPU(coreIdx, code, size);
  213. }
  214. RetCode VPU_DeInit(Uint32 coreIdx)
  215. {
  216. int ret;
  217. if (coreIdx >= MAX_NUM_VPU_CORE)
  218. return RETCODE_INVALID_PARAM;
  219. #ifdef BIT_CODE_FILE_PATH
  220. #else
  221. if (s_pusBitCode[coreIdx]) {
  222. osal_free((void *)s_pusBitCode[coreIdx]);
  223. }
  224. #endif
  225. s_pusBitCode[coreIdx] = NULL;
  226. s_bitCodeSize[coreIdx] = 0;
  227. ret = vdi_release(coreIdx);
  228. if (ret != 0)
  229. return RETCODE_FAILURE;
  230. return RETCODE_SUCCESS;
  231. }
  232. RetCode VPU_GetVersionInfo(Uint32 coreIdx, Uint32 *versionInfo, Uint32 *revision, Uint32 *productId)
  233. {
  234. RetCode ret;
  235. if (coreIdx >= MAX_NUM_VPU_CORE)
  236. return RETCODE_INVALID_PARAM;
  237. EnterLock(coreIdx);
  238. if (ProductVpuIsInit(coreIdx) == 0) {
  239. LeaveLock(coreIdx);
  240. return RETCODE_NOT_INITIALIZED;
  241. }
  242. if (GetPendingInst(coreIdx)) {
  243. LeaveLock(coreIdx);
  244. return RETCODE_FRAME_NOT_COMPLETE;
  245. }
  246. if (productId != NULL) {
  247. *productId = ProductVpuGetId(coreIdx);
  248. }
  249. ret = ProductVpuGetVersion(coreIdx, versionInfo, revision);
  250. LeaveLock(coreIdx);
  251. return ret;
  252. }
  253. RetCode VPU_DecOpen(DecHandle* pHandle, DecOpenParam* pop)
  254. {
  255. CodecInst * pCodecInst;
  256. DecInfo* pDecInfo;
  257. RetCode ret;
  258. ret = ProductCheckDecOpenParam(pop);
  259. if (ret != RETCODE_SUCCESS)
  260. return ret;
  261. EnterLock(pop->coreIdx);
  262. if (VPU_IsInit(pop->coreIdx) == 0) {
  263. LeaveLock(pop->coreIdx);
  264. return RETCODE_NOT_INITIALIZED;
  265. }
  266. ret = GetCodecInstance(pop->coreIdx, &pCodecInst);
  267. if (ret != RETCODE_SUCCESS)
  268. {
  269. *pHandle = 0;
  270. LeaveLock(pop->coreIdx);
  271. return ret;
  272. }
  273. pCodecInst->isDecoder = TRUE;
  274. *pHandle = pCodecInst;
  275. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  276. osal_memset(pDecInfo, 0x00, sizeof(DecInfo));
  277. osal_memcpy((void*)&pDecInfo->openParam, pop, sizeof(DecOpenParam));
  278. if (pop->bitstreamFormat == STD_MPEG4)
  279. {
  280. pCodecInst->codecMode = (pCodecInst->productId == PRODUCT_ID_7Q ? C7_MP4_DEC : MP4_DEC);
  281. pCodecInst->codecModeAux = MP4_AUX_MPEG4;
  282. }
  283. else if (pop->bitstreamFormat == STD_AVC)
  284. {
  285. pCodecInst->codecMode = (pCodecInst->productId == PRODUCT_ID_7Q ? C7_AVC_DEC : AVC_DEC);
  286. pCodecInst->codecModeAux = pop->avcExtension;
  287. }
  288. else if (pop->bitstreamFormat == STD_VC1)
  289. {
  290. pCodecInst->codecMode = (pCodecInst->productId == PRODUCT_ID_7Q ? C7_VC1_DEC : VC1_DEC);
  291. }
  292. else if (pop->bitstreamFormat == STD_MPEG2)
  293. {
  294. pCodecInst->codecMode = (pCodecInst->productId == PRODUCT_ID_7Q ? C7_MP2_DEC : MP2_DEC);
  295. }
  296. else if (pop->bitstreamFormat == STD_H263)
  297. {
  298. pCodecInst->codecMode = (pCodecInst->productId == PRODUCT_ID_7Q ? C7_MP4_DEC : MP4_DEC);
  299. pCodecInst->codecModeAux = MP4_AUX_MPEG4;
  300. }
  301. else if (pop->bitstreamFormat == STD_DIV3)
  302. {
  303. pCodecInst->codecMode = (pCodecInst->productId == PRODUCT_ID_7Q ? C7_DV3_DEC : DV3_DEC);
  304. pCodecInst->codecModeAux = MP4_AUX_DIVX3;
  305. pDecInfo->div3Width = pop->div3Width;
  306. pDecInfo->div3Height = pop->div3Height;
  307. }
  308. else if (pop->bitstreamFormat == STD_RV)
  309. {
  310. pCodecInst->codecMode = (pCodecInst->productId == PRODUCT_ID_7Q ? C7_RVX_DEC : RV_DEC);
  311. }
  312. else if (pop->bitstreamFormat == STD_AVS)
  313. {
  314. pCodecInst->codecMode = (pCodecInst->productId == PRODUCT_ID_7Q ? C7_AVS_DEC : AVS_DEC);
  315. }
  316. else if (pop->bitstreamFormat == STD_THO)
  317. {
  318. pCodecInst->codecMode = VPX_DEC;
  319. pCodecInst->codecModeAux = VPX_AUX_THO;
  320. }
  321. else if (pop->bitstreamFormat == STD_VP3)
  322. {
  323. pCodecInst->codecMode = VPX_DEC;
  324. pCodecInst->codecModeAux = VPX_AUX_THO;
  325. }
  326. else if (pop->bitstreamFormat == STD_VP8)
  327. {
  328. pCodecInst->codecMode = (pCodecInst->productId == PRODUCT_ID_7Q ? C7_VP8_DEC : VPX_DEC);
  329. pCodecInst->codecModeAux = VPX_AUX_VP8;
  330. }
  331. else if (pop->bitstreamFormat == STD_HEVC)
  332. {
  333. pCodecInst->codecMode = HEVC_DEC;
  334. }
  335. else if (pop->bitstreamFormat == STD_VP9)
  336. {
  337. pCodecInst->codecMode = C7_VP9_DEC;
  338. }
  339. else if (pop->bitstreamFormat == STD_AVS2)
  340. {
  341. pCodecInst->codecMode = C7_AVS2_DEC;
  342. }
  343. else
  344. {
  345. LeaveLock(pop->coreIdx);
  346. return RETCODE_INVALID_PARAM;
  347. }
  348. pDecInfo->wtlEnable = pop->wtlEnable;
  349. pDecInfo->wtlMode = pop->wtlMode;
  350. if (!pDecInfo->wtlEnable)
  351. pDecInfo->wtlMode = 0;
  352. pDecInfo->streamWrPtr = pop->bitstreamBuffer;
  353. pDecInfo->streamRdPtr = pop->bitstreamBuffer;
  354. pDecInfo->frameDelay = -1;
  355. pDecInfo->streamBufStartAddr = pop->bitstreamBuffer;
  356. pDecInfo->streamBufSize = pop->bitstreamBufferSize;
  357. pDecInfo->streamBufEndAddr = pop->bitstreamBuffer + pop->bitstreamBufferSize;
  358. pDecInfo->reorderEnable = VPU_REORDER_ENABLE;
  359. pDecInfo->mirrorDirection = MIRDIR_NONE;
  360. pDecInfo->prevFrameEndPos = pop->bitstreamBuffer;
  361. SetClockGate(pop->coreIdx, TRUE);
  362. if ((ret=ProductVpuDecBuildUpOpenParam(pCodecInst, pop)) != RETCODE_SUCCESS) {
  363. SetClockGate(pop->coreIdx, FALSE);
  364. *pHandle = 0;
  365. LeaveLock(pCodecInst->coreIdx);
  366. return ret;
  367. }
  368. SetClockGate(pop->coreIdx, FALSE);
  369. pDecInfo->tiled2LinearEnable = pop->tiled2LinearEnable;
  370. pDecInfo->tiled2LinearMode = pop->tiled2LinearMode;
  371. if (!pDecInfo->tiled2LinearEnable)
  372. pDecInfo->tiled2LinearMode = 0; //coda980 only
  373. if (!pDecInfo->wtlEnable) //coda980, wave320, wave410 only
  374. pDecInfo->wtlMode = 0;
  375. osal_memset((void*)&pDecInfo->cacheConfig, 0x00, sizeof(MaverickCacheConfig));
  376. LeaveLock(pCodecInst->coreIdx);
  377. return RETCODE_SUCCESS;
  378. }
  379. RetCode VPU_DecClose(DecHandle handle)
  380. {
  381. CodecInst * pCodecInst;
  382. DecInfo * pDecInfo;
  383. RetCode ret;
  384. int i;
  385. ret = CheckDecInstanceValidity(handle);
  386. if (ret != RETCODE_SUCCESS)
  387. return ret;
  388. pCodecInst = handle;
  389. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  390. EnterLock(pCodecInst->coreIdx);
  391. if ((ret=ProductVpuDecFiniSeq(pCodecInst)) != RETCODE_SUCCESS) {
  392. if (pCodecInst->loggingEnable)
  393. vdi_log(pCodecInst->coreIdx, DEC_SEQ_END, 0);
  394. if (ret == RETCODE_VPU_STILL_RUNNING) {
  395. LeaveLock(pCodecInst->coreIdx);
  396. return ret;
  397. }
  398. }
  399. if (pDecInfo->vbSlice.size)
  400. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbSlice);
  401. if (pDecInfo->vbWork.size) {
  402. if (pDecInfo->workBufferAllocExt == 0) {
  403. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbWork);
  404. }
  405. else {
  406. vdi_dettach_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbWork);
  407. }
  408. }
  409. if (pDecInfo->vbFrame.size) {
  410. if (pDecInfo->frameAllocExt == 0) {
  411. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFrame);
  412. }
  413. }
  414. for ( i=0 ; i<MAX_REG_FRAME; i++) {
  415. if (pDecInfo->vbMV[i].size)
  416. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbMV[i]);
  417. if (pDecInfo->vbFbcYTbl[i].size)
  418. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcYTbl[i]);
  419. if (pDecInfo->vbFbcCTbl[i].size)
  420. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcCTbl[i]);
  421. }
  422. if (pDecInfo->vbTemp.size)
  423. vdi_dettach_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbTemp);
  424. if (pDecInfo->vbPPU.size) {
  425. if (pDecInfo->ppuAllocExt == 0)
  426. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbPPU);
  427. }
  428. if (pDecInfo->vbWTL.size)
  429. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbWTL);
  430. if (pDecInfo->vbUserData.size)
  431. vdi_dettach_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbUserData);
  432. if (pDecInfo->vbReport.size)
  433. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbReport);
  434. if (GetPendingInst(pCodecInst->coreIdx) == pCodecInst)
  435. ClearPendingInst(pCodecInst->coreIdx);
  436. LeaveLock(pCodecInst->coreIdx);
  437. FreeCodecInstance(pCodecInst);
  438. return ret;
  439. }
  440. RetCode VPU_DecSetEscSeqInit(DecHandle handle, int escape)
  441. {
  442. CodecInst * pCodecInst;
  443. DecInfo * pDecInfo;
  444. RetCode ret;
  445. ret = CheckDecInstanceValidity(handle);
  446. if (ret != RETCODE_SUCCESS)
  447. return ret;
  448. pCodecInst = handle;
  449. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  450. if (pDecInfo->openParam.bitstreamMode != BS_MODE_INTERRUPT)
  451. return RETCODE_INVALID_PARAM;
  452. pDecInfo->seqInitEscape = escape;
  453. return RETCODE_SUCCESS;
  454. }
  455. RetCode VPU_DecGetInitialInfo(DecHandle handle, DecInitialInfo* info)
  456. {
  457. CodecInst* pCodecInst;
  458. DecInfo* pDecInfo;
  459. RetCode ret;
  460. Int32 flags;
  461. Uint32 interruptBit;
  462. VpuAttr* pAttr;
  463. if (PRODUCT_ID_W_SERIES(handle->productId)) {
  464. if (handle->productId == PRODUCT_ID_510 || handle->productId == PRODUCT_ID_512) {
  465. interruptBit = INT_WAVE5_INIT_SEQ;
  466. }
  467. else {
  468. interruptBit = INT_WAVE_DEC_PIC_HDR;
  469. }
  470. }
  471. else {
  472. /* CODA9xx */
  473. interruptBit = INT_BIT_SEQ_INIT;
  474. }
  475. ret = CheckDecInstanceValidity(handle);
  476. if (ret != RETCODE_SUCCESS)
  477. return ret;
  478. if (info == NULL)
  479. return RETCODE_INVALID_PARAM;
  480. pCodecInst = handle;
  481. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  482. ret = ProductVpuDecCheckCapability(pCodecInst);
  483. if (ret != RETCODE_SUCCESS)
  484. return ret;
  485. EnterLock(pCodecInst->coreIdx);
  486. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  487. if (GetPendingInst(pCodecInst->coreIdx)) {
  488. /* The other instance is running */
  489. LeaveLock(pCodecInst->coreIdx);
  490. return RETCODE_FRAME_NOT_COMPLETE;
  491. }
  492. if (DecBitstreamBufEmpty(pDecInfo)) {
  493. LeaveLock(pCodecInst->coreIdx);
  494. return RETCODE_WRONG_CALL_SEQUENCE;
  495. }
  496. ret = ProductVpuDecInitSeq(handle);
  497. if (ret != RETCODE_SUCCESS) {
  498. LeaveLock(pCodecInst->coreIdx);
  499. return ret;
  500. }
  501. if (pAttr->supportCommandQueue == TRUE) {
  502. if (pDecInfo->openParam.bitstreamFormat == STD_HEVC) {
  503. LeaveLock(pCodecInst->coreIdx);
  504. }
  505. }
  506. flags = ProductVpuWaitInterrupt(pCodecInst, __VPU_BUSY_TIMEOUT);
  507. if (pAttr->supportCommandQueue == TRUE) {
  508. if (pDecInfo->openParam.bitstreamFormat == STD_HEVC) {
  509. EnterLock(pCodecInst->coreIdx);
  510. }
  511. }
  512. if (flags == -1) {
  513. info->rdPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr);
  514. info->wrPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamWrPtrRegAddr);
  515. ret = RETCODE_VPU_RESPONSE_TIMEOUT;
  516. }
  517. else {
  518. if (flags&(1<<interruptBit))
  519. ProductVpuClearInterrupt(pCodecInst->coreIdx, (1<<interruptBit));
  520. if (flags != (1<<interruptBit))
  521. ret = RETCODE_FAILURE;
  522. else
  523. ret = ProductVpuDecGetSeqInfo(handle, info);
  524. }
  525. info->rdPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr);
  526. info->wrPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamWrPtrRegAddr);
  527. pDecInfo->initialInfo = *info;
  528. if (ret == RETCODE_SUCCESS) {
  529. pDecInfo->initialInfoObtained = 1;
  530. }
  531. SetPendingInst(pCodecInst->coreIdx, 0);
  532. LeaveLock(pCodecInst->coreIdx);
  533. return ret;
  534. }
  535. RetCode VPU_DecIssueSeqInit(DecHandle handle)
  536. {
  537. CodecInst* pCodecInst;
  538. RetCode ret;
  539. VpuAttr* pAttr;
  540. ret = CheckDecInstanceValidity(handle);
  541. if (ret != RETCODE_SUCCESS)
  542. return ret;
  543. pCodecInst = handle;
  544. EnterLock(pCodecInst->coreIdx);
  545. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  546. if (GetPendingInst(pCodecInst->coreIdx)) {
  547. LeaveLock(pCodecInst->coreIdx);
  548. return RETCODE_FRAME_NOT_COMPLETE;
  549. }
  550. ret = ProductVpuDecInitSeq(handle);
  551. if (ret == RETCODE_SUCCESS) {
  552. SetPendingInst(pCodecInst->coreIdx, pCodecInst);
  553. }
  554. if (pAttr->supportCommandQueue == TRUE) {
  555. SetPendingInst(pCodecInst->coreIdx, NULL);
  556. LeaveLock(pCodecInst->coreIdx);
  557. }
  558. return ret;
  559. }
  560. RetCode VPU_DecCompleteSeqInit(DecHandle handle, DecInitialInfo * info)
  561. {
  562. CodecInst* pCodecInst;
  563. DecInfo* pDecInfo;
  564. RetCode ret;
  565. VpuAttr* pAttr;
  566. ret = CheckDecInstanceValidity(handle);
  567. if (ret != RETCODE_SUCCESS) {
  568. return ret;
  569. }
  570. if (info == 0) {
  571. return RETCODE_INVALID_PARAM;
  572. }
  573. pCodecInst = handle;
  574. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  575. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  576. if (pAttr->supportCommandQueue == TRUE) {
  577. EnterLock(pCodecInst->coreIdx);
  578. }
  579. else {
  580. if (pCodecInst != GetPendingInst(pCodecInst->coreIdx)) {
  581. SetPendingInst(pCodecInst->coreIdx, 0);
  582. LeaveLock(pCodecInst->coreIdx);
  583. return RETCODE_WRONG_CALL_SEQUENCE;
  584. }
  585. }
  586. ret = ProductVpuDecGetSeqInfo(handle, info);
  587. if (ret == RETCODE_SUCCESS) {
  588. pDecInfo->initialInfoObtained = 1;
  589. }
  590. info->rdPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr);
  591. info->wrPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamWrPtrRegAddr);
  592. pDecInfo->prevFrameEndPos = info->rdPtr;
  593. pDecInfo->initialInfo = *info;
  594. SetPendingInst(pCodecInst->coreIdx, NULL);
  595. LeaveLock(pCodecInst->coreIdx);
  596. return ret;
  597. }
  598. static RetCode DecRegisterFrameBuffer(DecHandle handle, FrameBuffer *bufArray, int numFbsForDecoding, int numFbsForWTL, int stride, int height, int mapType)
  599. {
  600. CodecInst* pCodecInst;
  601. DecInfo* pDecInfo;
  602. Int32 i;
  603. Uint32 size, totalAllocSize;
  604. RetCode ret;
  605. FrameBuffer* fb, nullFb;
  606. vpu_buffer_t* vb;
  607. FrameBufferFormat format = FORMAT_420;
  608. Int32 totalNumOfFbs;
  609. ret = CheckDecInstanceValidity(handle);
  610. if (ret != RETCODE_SUCCESS)
  611. return ret;
  612. if (numFbsForDecoding > MAX_FRAMEBUFFER_COUNT || numFbsForWTL > MAX_FRAMEBUFFER_COUNT) {
  613. return RETCODE_INVALID_PARAM;
  614. }
  615. osal_memset(&nullFb, 0x00, sizeof(FrameBuffer));
  616. pCodecInst = handle;
  617. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  618. pDecInfo->numFbsForDecoding = numFbsForDecoding;
  619. pDecInfo->numFbsForWTL = numFbsForWTL;
  620. pDecInfo->numFrameBuffers = numFbsForDecoding + numFbsForWTL;
  621. pDecInfo->stride = stride;
  622. if (pCodecInst->codecMode == VPX_DEC || pCodecInst->codecMode == C7_VP8_DEC)
  623. pDecInfo->frameBufferHeight = VPU_ALIGN64(height);
  624. else if (pCodecInst->codecMode == C7_VP9_DEC)
  625. pDecInfo->frameBufferHeight = VPU_ALIGN64(height);
  626. else
  627. pDecInfo->frameBufferHeight = height;
  628. pDecInfo->mapType = mapType;
  629. pDecInfo->mapCfg.productId = pCodecInst->productId;
  630. ret = ProductVpuDecCheckCapability(pCodecInst);
  631. if (ret != RETCODE_SUCCESS)
  632. return ret;
  633. if (!pDecInfo->initialInfoObtained)
  634. return RETCODE_WRONG_CALL_SEQUENCE;
  635. if ( (stride < pDecInfo->initialInfo.picWidth) || (stride % 8 != 0) || (height<pDecInfo->initialInfo.picHeight) ) {
  636. return RETCODE_INVALID_STRIDE;
  637. }
  638. EnterLock(pCodecInst->coreIdx);
  639. if (GetPendingInst(pCodecInst->coreIdx)) {
  640. LeaveLock(pCodecInst->coreIdx);
  641. return RETCODE_FRAME_NOT_COMPLETE;
  642. }
  643. /* clear frameBufPool */
  644. for (i=0; i<(int)(sizeof(pDecInfo->frameBufPool)/sizeof(FrameBuffer)); i++) {
  645. pDecInfo->frameBufPool[i] = nullFb;
  646. }
  647. /* LinearMap or TiledMap, compressed framebuffer inclusive. */
  648. if (pDecInfo->initialInfo.lumaBitdepth > 8 || pDecInfo->initialInfo.chromaBitdepth > 8)
  649. format = FORMAT_420_P10_16BIT_LSB;
  650. totalNumOfFbs = numFbsForDecoding + numFbsForWTL;
  651. if (bufArray) {
  652. for(i=0; i<totalNumOfFbs; i++)
  653. pDecInfo->frameBufPool[i] = bufArray[i];
  654. }
  655. else {
  656. vb = &pDecInfo->vbFrame;
  657. fb = &pDecInfo->frameBufPool[0];
  658. ret = ProductVpuAllocateFramebuffer(
  659. (CodecInst*)handle, fb, (TiledMapType)mapType, numFbsForDecoding, stride, height, format,
  660. pDecInfo->openParam.cbcrInterleave,
  661. pDecInfo->openParam.nv21,
  662. pDecInfo->openParam.frameEndian, vb, 0, FB_TYPE_CODEC);
  663. if (ret != RETCODE_SUCCESS) {
  664. LeaveLock(pCodecInst->coreIdx);
  665. return ret;
  666. }
  667. }
  668. totalAllocSize = 0;
  669. if (pCodecInst->productId != PRODUCT_ID_960) {
  670. pDecInfo->mapCfg.tiledBaseAddr = pDecInfo->frameBufPool[0].bufY;
  671. }
  672. if (numFbsForDecoding == 1) {
  673. size = ProductCalculateFrameBufSize(handle->productId, stride, height, (TiledMapType)mapType, format,
  674. pDecInfo->openParam.cbcrInterleave, &pDecInfo->dramCfg);
  675. }
  676. else {
  677. size = pDecInfo->frameBufPool[1].bufY - pDecInfo->frameBufPool[0].bufY;
  678. }
  679. size *= numFbsForDecoding;
  680. totalAllocSize += size;
  681. /* LinearMap */
  682. if (pDecInfo->wtlEnable == TRUE || numFbsForWTL != 0) {
  683. pDecInfo->stride = stride;
  684. if (bufArray) {
  685. format = pDecInfo->frameBufPool[0].format;
  686. }
  687. else {
  688. TiledMapType map;
  689. map = pDecInfo->wtlMode==FF_FRAME ? LINEAR_FRAME_MAP : LINEAR_FIELD_MAP;
  690. format = pDecInfo->wtlFormat;
  691. vb = &pDecInfo->vbWTL;
  692. fb = &pDecInfo->frameBufPool[numFbsForDecoding];
  693. ret = ProductVpuAllocateFramebuffer(
  694. (CodecInst*)handle, fb, map, numFbsForWTL, stride, height,
  695. pDecInfo->wtlFormat,
  696. pDecInfo->openParam.cbcrInterleave,
  697. pDecInfo->openParam.nv21,
  698. pDecInfo->openParam.frameEndian, vb, 0, FB_TYPE_PPU);
  699. if (ret != RETCODE_SUCCESS) {
  700. LeaveLock(pCodecInst->coreIdx);
  701. return ret;
  702. }
  703. }
  704. if (numFbsForWTL == 1) {
  705. size = ProductCalculateFrameBufSize(handle->productId, stride, height, (TiledMapType)mapType, format,
  706. pDecInfo->openParam.cbcrInterleave, &pDecInfo->dramCfg);
  707. }
  708. else {
  709. size = pDecInfo->frameBufPool[numFbsForDecoding+1].bufY -
  710. pDecInfo->frameBufPool[numFbsForDecoding].bufY;
  711. }
  712. size *= numFbsForWTL;
  713. totalAllocSize += size;
  714. }
  715. ret = ProductVpuRegisterFramebuffer(pCodecInst);
  716. LeaveLock(pCodecInst->coreIdx);
  717. return ret;
  718. }
  719. RetCode VPU_DecRegisterFrameBuffer(DecHandle handle, FrameBuffer *bufArray, int num, int stride, int height, int mapType)
  720. {
  721. DecInfo* pDecInfo = &handle->CodecInfo->decInfo;
  722. Uint32 numWTL = 0;
  723. if (pDecInfo->wtlEnable == TRUE) numWTL = num;
  724. return DecRegisterFrameBuffer(handle, bufArray, num, numWTL, stride, height, mapType);
  725. }
  726. RetCode VPU_DecRegisterFrameBufferEx(DecHandle handle, FrameBuffer *bufArray, int numOfDecFbs, int numOfDisplayFbs, int stride, int height, int mapType)
  727. {
  728. return DecRegisterFrameBuffer(handle, bufArray, numOfDecFbs, numOfDisplayFbs, stride, height, mapType);
  729. }
  730. RetCode VPU_DecGetFrameBuffer(DecHandle handle, int frameIdx, FrameBuffer* frameBuf)
  731. {
  732. CodecInst * pCodecInst;
  733. DecInfo * pDecInfo;
  734. RetCode ret;
  735. ret = CheckDecInstanceValidity(handle);
  736. if (ret != RETCODE_SUCCESS)
  737. return ret;
  738. if (frameBuf == 0)
  739. return RETCODE_INVALID_PARAM;
  740. pCodecInst = handle;
  741. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  742. if (frameIdx < 0 || frameIdx >= pDecInfo->numFrameBuffers)
  743. return RETCODE_INVALID_PARAM;
  744. *frameBuf = pDecInfo->frameBufPool[frameIdx];
  745. return RETCODE_SUCCESS;
  746. }
  747. RetCode VPU_DecUpdateFrameBuffer(
  748. DecHandle handle,
  749. FrameBuffer* fbcFb,
  750. FrameBuffer* linearFb,
  751. Int32 mvColIndex,
  752. Int32 picWidth,
  753. Int32 picHeight
  754. )
  755. {
  756. if (handle == NULL) {
  757. return RETCODE_INVALID_HANDLE;
  758. }
  759. return ProductVpuDecUpdateFrameBuffer((CodecInst*)handle, fbcFb, linearFb, mvColIndex, picWidth, picHeight);
  760. }
  761. RetCode VPU_DecSetBitstreamBuffer(DecHandle handle, PhysicalAddress rdPtr, PhysicalAddress wrPtr)
  762. {
  763. CodecInst * pCodecInst;
  764. DecInfo * pDecInfo;
  765. RetCode ret;
  766. ret = CheckDecInstanceValidity(handle);
  767. if (ret != RETCODE_SUCCESS)
  768. return ret;
  769. pCodecInst = handle;
  770. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  771. SetClockGate(pCodecInst->coreIdx, 1);
  772. if (GetPendingInst(pCodecInst->coreIdx) == pCodecInst)
  773. VpuWriteReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr, rdPtr);
  774. else
  775. pDecInfo->streamRdPtr = rdPtr;
  776. SetClockGate(pCodecInst->coreIdx, 0);
  777. pDecInfo->streamWrPtr = wrPtr;
  778. return RETCODE_SUCCESS;
  779. }
  780. RetCode VPU_DecGetBitstreamBuffer(DecHandle handle, PhysicalAddress* prdPtr, PhysicalAddress* pwrPtr, Uint32* size)
  781. {
  782. CodecInst* pCodecInst;
  783. DecInfo* pDecInfo;
  784. PhysicalAddress rdPtr;
  785. PhysicalAddress wrPtr;
  786. PhysicalAddress tempPtr;
  787. int room;
  788. Int32 coreIdx;
  789. VpuAttr* pAttr;
  790. coreIdx = handle->coreIdx;
  791. pCodecInst = handle;
  792. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  793. SetClockGate(coreIdx, TRUE);
  794. if (GetPendingInst(coreIdx) == pCodecInst) {
  795. if (pCodecInst->codecMode == AVC_DEC && pCodecInst->codecModeAux == AVC_AUX_MVC) {
  796. rdPtr = pDecInfo->streamRdPtr;
  797. }
  798. else {
  799. rdPtr = VpuReadReg(coreIdx, pDecInfo->streamRdPtrRegAddr);
  800. }
  801. }
  802. else {
  803. rdPtr = pDecInfo->streamRdPtr;
  804. }
  805. SetClockGate(coreIdx, FALSE);
  806. wrPtr = pDecInfo->streamWrPtr;
  807. pAttr = &g_VpuCoreAttributes[coreIdx];
  808. if (pCodecInst->productId == PRODUCT_ID_4102 || pCodecInst->productId == PRODUCT_ID_420 || pCodecInst->productId == PRODUCT_ID_412 || pCodecInst->productId == PRODUCT_ID_420L ||
  809. (pCodecInst->productId == PRODUCT_ID_7Q && pCodecInst->codecMode == C7_HEVC_DEC)) {
  810. if (pDecInfo->openParam.bitstreamMode != BS_MODE_PIC_END) {
  811. tempPtr = pDecInfo->prevFrameEndPos;
  812. }
  813. else {
  814. tempPtr = rdPtr;
  815. }
  816. }
  817. else {
  818. tempPtr = rdPtr;
  819. }
  820. if (pDecInfo->openParam.bitstreamMode != BS_MODE_PIC_END) {
  821. if (wrPtr < tempPtr) {
  822. room = tempPtr - wrPtr - pAttr->bitstreamBufferMargin*2;
  823. }
  824. else {
  825. room = (pDecInfo->streamBufEndAddr - wrPtr) + (tempPtr - pDecInfo->streamBufStartAddr) - pAttr->bitstreamBufferMargin*2;
  826. }
  827. room--;
  828. }
  829. else {
  830. room = (pDecInfo->streamBufEndAddr - wrPtr);
  831. }
  832. if (prdPtr) *prdPtr = tempPtr;
  833. if (pwrPtr) *pwrPtr = wrPtr;
  834. if (size) *size = room;
  835. return RETCODE_SUCCESS;
  836. }
  837. RetCode VPU_DecUpdateBitstreamBuffer(DecHandle handle, int size)
  838. {
  839. CodecInst* pCodecInst;
  840. DecInfo* pDecInfo;
  841. PhysicalAddress wrPtr;
  842. PhysicalAddress rdPtr;
  843. RetCode ret;
  844. BOOL running;
  845. ret = CheckDecInstanceValidity(handle);
  846. if (ret != RETCODE_SUCCESS)
  847. return ret;
  848. pCodecInst = handle;
  849. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  850. wrPtr = pDecInfo->streamWrPtr;
  851. SetClockGate(pCodecInst->coreIdx, 1);
  852. running = (BOOL)(GetPendingInst(pCodecInst->coreIdx) == pCodecInst);
  853. if (size > 0) {
  854. Uint32 room = 0;
  855. if (running == TRUE)
  856. rdPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr);
  857. else
  858. rdPtr = pDecInfo->streamRdPtr;
  859. if (wrPtr < rdPtr) {
  860. if (rdPtr <= wrPtr + size) {
  861. SetClockGate(pCodecInst->coreIdx, 0);
  862. return RETCODE_INVALID_PARAM;
  863. }
  864. }
  865. wrPtr += size;
  866. if (wrPtr > pDecInfo->streamBufEndAddr) {
  867. room = wrPtr - pDecInfo->streamBufEndAddr;
  868. wrPtr = pDecInfo->streamBufStartAddr;
  869. wrPtr += room;
  870. }
  871. else if (wrPtr == pDecInfo->streamBufEndAddr) {
  872. wrPtr = pDecInfo->streamBufStartAddr;
  873. }
  874. pDecInfo->streamWrPtr = wrPtr;
  875. pDecInfo->streamRdPtr = rdPtr;
  876. if (running == TRUE) {
  877. VpuAttr* pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  878. if (pAttr->supportCommandQueue == FALSE) {
  879. VpuWriteReg(pCodecInst->coreIdx, pDecInfo->streamWrPtrRegAddr, wrPtr);
  880. }
  881. }
  882. }
  883. ret = ProductVpuDecSetBitstreamFlag(pCodecInst, running, size);
  884. SetClockGate(pCodecInst->coreIdx, 0);
  885. return ret;
  886. }
  887. RetCode VPU_HWReset(Uint32 coreIdx)
  888. {
  889. if (vdi_hw_reset(coreIdx) < 0 )
  890. return RETCODE_FAILURE;
  891. if (GetPendingInst(coreIdx))
  892. {
  893. SetPendingInst(coreIdx, 0);
  894. LeaveLock(coreIdx); //if vpu is in a lock state. release the state;
  895. }
  896. return RETCODE_SUCCESS;
  897. }
  898. /**
  899. * VPU_SWReset
  900. * IN
  901. * forcedReset : 1 if there is no need to waiting for BUS transaction,
  902. * 0 for otherwise
  903. * OUT
  904. * RetCode : RETCODE_FAILURE if failed to reset,
  905. * RETCODE_SUCCESS for otherwise
  906. */
  907. RetCode VPU_SWReset(Uint32 coreIdx, SWResetMode resetMode, void *pendingInst)
  908. {
  909. CodecInst *pCodecInst = (CodecInst *)pendingInst;
  910. RetCode ret = RETCODE_SUCCESS;
  911. SetClockGate(coreIdx, 1);
  912. if (pCodecInst) {
  913. SetPendingInst(pCodecInst->coreIdx, 0);
  914. LeaveLock(coreIdx);
  915. SetClockGate(coreIdx, 1);
  916. if (pCodecInst->loggingEnable) {
  917. vdi_log(pCodecInst->coreIdx, (pCodecInst->productId == PRODUCT_ID_960 || pCodecInst->productId == PRODUCT_ID_980)?0x10:0x10000, 1);
  918. }
  919. }
  920. ret = ProductVpuReset(coreIdx, resetMode);
  921. if (pCodecInst) {
  922. if (pCodecInst->loggingEnable) {
  923. vdi_log(pCodecInst->coreIdx, (pCodecInst->productId == PRODUCT_ID_960 || pCodecInst->productId == PRODUCT_ID_980)?0x10:0x10000, 0);
  924. }
  925. }
  926. SetClockGate(coreIdx, 0);
  927. return ret;
  928. }
  929. //---- VPU_SLEEP/WAKE
  930. RetCode VPU_SleepWake(Uint32 coreIdx, int iSleepWake)
  931. {
  932. RetCode ret;
  933. SetClockGate(coreIdx, TRUE);
  934. ret = ProductVpuSleepWake(coreIdx, iSleepWake, s_pusBitCode[coreIdx], s_bitCodeSize[coreIdx]);
  935. SetClockGate(coreIdx, FALSE);
  936. return ret;
  937. }
  938. RetCode VPU_DecStartOneFrame(DecHandle handle, DecParam *param)
  939. {
  940. CodecInst* pCodecInst;
  941. DecInfo* pDecInfo;
  942. Uint32 val = 0;
  943. RetCode ret = RETCODE_SUCCESS;
  944. VpuAttr* pAttr = NULL;
  945. ret = CheckDecInstanceValidity(handle);
  946. if (ret != RETCODE_SUCCESS) {
  947. return ret;
  948. }
  949. pCodecInst = (CodecInst*)handle;
  950. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  951. if (pDecInfo->stride == 0) { // This means frame buffers have not been registered.
  952. return RETCODE_WRONG_CALL_SEQUENCE;
  953. }
  954. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  955. EnterLock(pCodecInst->coreIdx);
  956. if (GetPendingInst(pCodecInst->coreIdx)) {
  957. LeaveLock(pCodecInst->coreIdx);
  958. return RETCODE_FRAME_NOT_COMPLETE;
  959. }
  960. if (pAttr->supportCommandQueue == FALSE) {
  961. EnterDispFlagLock(pCodecInst->coreIdx);
  962. val = pDecInfo->frameDisplayFlag;
  963. val |= pDecInfo->setDisplayIndexes;
  964. val &= ~(Uint32)(pDecInfo->clearDisplayIndexes);
  965. VpuWriteReg(pCodecInst->coreIdx, pDecInfo->frameDisplayFlagRegAddr, val);
  966. pDecInfo->clearDisplayIndexes = 0;
  967. pDecInfo->setDisplayIndexes = 0;
  968. LeaveDispFlagLock(pCodecInst->coreIdx);
  969. }
  970. pDecInfo->frameStartPos = pDecInfo->streamRdPtr;
  971. ret = ProductVpuDecode(pCodecInst, param);
  972. if (pAttr->supportCommandQueue == TRUE) {
  973. SetPendingInst(pCodecInst->coreIdx, NULL);
  974. LeaveLock(pCodecInst->coreIdx);
  975. }
  976. else {
  977. SetPendingInst(pCodecInst->coreIdx, pCodecInst);
  978. }
  979. return ret;
  980. }
  981. RetCode VPU_DecGetOutputInfo(DecHandle handle, DecOutputInfo* info)
  982. {
  983. CodecInst* pCodecInst;
  984. DecInfo* pDecInfo;
  985. RetCode ret;
  986. VpuRect rectInfo;
  987. Uint32 val;
  988. Int32 decodedIndex;
  989. Int32 displayIndex;
  990. Uint32 maxDecIndex;
  991. VpuAttr* pAttr;
  992. ret = CheckDecInstanceValidity(handle);
  993. if (ret != RETCODE_SUCCESS) {
  994. return ret;
  995. }
  996. if (info == 0) {
  997. return RETCODE_INVALID_PARAM;
  998. }
  999. pCodecInst = handle;
  1000. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  1001. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  1002. if (pAttr->supportCommandQueue == TRUE) {
  1003. EnterLock(pCodecInst->coreIdx);
  1004. }
  1005. else {
  1006. if (pCodecInst != GetPendingInst(pCodecInst->coreIdx)) {
  1007. SetPendingInst(pCodecInst->coreIdx, 0);
  1008. LeaveLock(pCodecInst->coreIdx);
  1009. return RETCODE_WRONG_CALL_SEQUENCE;
  1010. }
  1011. }
  1012. osal_memset((void*)info, 0x00, sizeof(DecOutputInfo));
  1013. ret = ProductVpuDecGetResult(pCodecInst, info);
  1014. if (ret != RETCODE_SUCCESS) {
  1015. info->rdPtr = pDecInfo->streamRdPtr;
  1016. info->wrPtr = pDecInfo->streamWrPtr;
  1017. SetPendingInst(pCodecInst->coreIdx, 0);
  1018. LeaveLock(pCodecInst->coreIdx);
  1019. return ret;
  1020. }
  1021. decodedIndex = info->indexFrameDecoded;
  1022. // Calculate display frame region
  1023. val = 0;
  1024. if (decodedIndex >= 0 && decodedIndex < MAX_GDI_IDX) {
  1025. //default value
  1026. rectInfo.left = 0;
  1027. rectInfo.right = info->decPicWidth;
  1028. rectInfo.top = 0;
  1029. rectInfo.bottom = info->decPicHeight;
  1030. if (pCodecInst->codecMode == HEVC_DEC || pCodecInst->codecMode == AVC_DEC || pCodecInst->codecMode == C7_AVC_DEC || pCodecInst->codecMode == AVS_DEC)
  1031. rectInfo = pDecInfo->initialInfo.picCropRect;
  1032. if (pCodecInst->codecMode == HEVC_DEC)
  1033. pDecInfo->decOutInfo[decodedIndex].h265Info.decodedPOC = info->h265Info.decodedPOC;
  1034. info->rcDecoded.left = pDecInfo->decOutInfo[decodedIndex].rcDecoded.left = rectInfo.left;
  1035. info->rcDecoded.right = pDecInfo->decOutInfo[decodedIndex].rcDecoded.right = rectInfo.right;
  1036. info->rcDecoded.top = pDecInfo->decOutInfo[decodedIndex].rcDecoded.top = rectInfo.top;
  1037. info->rcDecoded.bottom = pDecInfo->decOutInfo[decodedIndex].rcDecoded.bottom = rectInfo.bottom;
  1038. }
  1039. else
  1040. {
  1041. info->rcDecoded.left = 0;
  1042. info->rcDecoded.right = info->decPicWidth;
  1043. info->rcDecoded.top = 0;
  1044. info->rcDecoded.bottom = info->decPicHeight;
  1045. }
  1046. displayIndex = info->indexFrameDisplay;
  1047. if (info->indexFrameDisplay >= 0 && info->indexFrameDisplay < MAX_GDI_IDX)
  1048. {
  1049. if (pCodecInst->codecMode == VC1_DEC || pCodecInst->codecMode == C7_VC1_DEC) // vc1 rotates decoded frame buffer region. the other std rotated whole frame buffer region.
  1050. {
  1051. if (pDecInfo->rotationEnable && (pDecInfo->rotationAngle==90 || pDecInfo->rotationAngle==270))
  1052. {
  1053. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1054. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1055. info->rcDisplay.top = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1056. info->rcDisplay.bottom = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1057. }
  1058. else
  1059. {
  1060. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1061. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1062. info->rcDisplay.top = pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1063. info->rcDisplay.bottom = pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1064. }
  1065. }
  1066. else
  1067. {
  1068. if (pDecInfo->rotationEnable)
  1069. {
  1070. switch(pDecInfo->rotationAngle)
  1071. {
  1072. case 90:
  1073. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1074. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1075. info->rcDisplay.top = info->decPicWidth - pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1076. info->rcDisplay.bottom = info->decPicWidth - pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1077. break;
  1078. case 270:
  1079. info->rcDisplay.left = info->decPicHeight - pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1080. info->rcDisplay.right = info->decPicHeight - pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1081. info->rcDisplay.top = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1082. info->rcDisplay.bottom = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1083. break;
  1084. case 180:
  1085. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1086. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1087. info->rcDisplay.top = info->decPicHeight - pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1088. info->rcDisplay.bottom = info->decPicHeight - pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1089. break;
  1090. default:
  1091. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1092. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1093. info->rcDisplay.top = pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1094. info->rcDisplay.bottom = pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1095. break;
  1096. }
  1097. }
  1098. else
  1099. {
  1100. info->rcDisplay.left = pDecInfo->decOutInfo[displayIndex].rcDecoded.left;
  1101. info->rcDisplay.right = pDecInfo->decOutInfo[displayIndex].rcDecoded.right;
  1102. info->rcDisplay.top = pDecInfo->decOutInfo[displayIndex].rcDecoded.top;
  1103. info->rcDisplay.bottom = pDecInfo->decOutInfo[displayIndex].rcDecoded.bottom;
  1104. }
  1105. if (pDecInfo->mirrorEnable) {
  1106. Uint32 temp;
  1107. if (pDecInfo->mirrorDirection & MIRDIR_VER) {
  1108. temp = info->rcDisplay.top;
  1109. info->rcDisplay.top = info->decPicHeight - info->rcDisplay.bottom;
  1110. info->rcDisplay.bottom = info->decPicHeight - temp;
  1111. }
  1112. if (pDecInfo->mirrorDirection & MIRDIR_HOR) {
  1113. temp = info->rcDisplay.left;
  1114. info->rcDisplay.left = info->decPicWidth - info->rcDisplay.right;
  1115. info->rcDisplay.right = info->decPicWidth - temp;
  1116. }
  1117. }
  1118. switch (pCodecInst->codecMode) {
  1119. case HEVC_DEC:
  1120. info->h265Info.displayPOC = pDecInfo->decOutInfo[displayIndex].h265Info.decodedPOC;
  1121. break;
  1122. default:
  1123. break;
  1124. }
  1125. }
  1126. if (info->indexFrameDisplay == info->indexFrameDecoded)
  1127. {
  1128. info->dispPicWidth = info->decPicWidth;
  1129. info->dispPicHeight = info->decPicHeight;
  1130. }
  1131. else
  1132. {
  1133. /*
  1134. When indexFrameDecoded < 0, and indexFrameDisplay >= 0
  1135. info->decPicWidth and info->decPicHeight are still valid
  1136. But those of pDecInfo->decOutInfo[displayIndex] are invalid in VP9
  1137. */
  1138. info->dispPicWidth = pDecInfo->decOutInfo[displayIndex].decPicWidth;
  1139. info->dispPicHeight = pDecInfo->decOutInfo[displayIndex].decPicHeight;
  1140. }
  1141. }
  1142. else
  1143. {
  1144. info->rcDisplay.left = 0;
  1145. info->rcDisplay.right = 0;
  1146. info->rcDisplay.top = 0;
  1147. info->rcDisplay.bottom = 0;
  1148. if (pDecInfo->rotationEnable || pDecInfo->mirrorEnable || pDecInfo->tiled2LinearEnable || pDecInfo->deringEnable) {
  1149. info->dispPicWidth = info->decPicWidth;
  1150. info->dispPicHeight = info->decPicHeight;
  1151. }
  1152. else {
  1153. info->dispPicWidth = 0;
  1154. info->dispPicHeight = 0;
  1155. }
  1156. }
  1157. if ( (pCodecInst->codecMode == VC1_DEC || pCodecInst->codecMode == C7_VC1_DEC) && info->indexFrameDisplay != -3) {
  1158. if (pDecInfo->vc1BframeDisplayValid == 0) {
  1159. if (info->picType == 2)
  1160. info->indexFrameDisplay = -3;
  1161. else
  1162. pDecInfo->vc1BframeDisplayValid = 1;
  1163. }
  1164. }
  1165. pDecInfo->streamRdPtr = VpuReadReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr);
  1166. pDecInfo->frameDisplayFlag = VpuReadReg(pCodecInst->coreIdx, pDecInfo->frameDisplayFlagRegAddr);
  1167. if (pCodecInst->codecMode == C7_VP9_DEC) {
  1168. pDecInfo->frameDisplayFlag &= 0xFFFF;
  1169. }
  1170. pDecInfo->frameEndPos = pDecInfo->streamRdPtr;
  1171. if (pDecInfo->frameEndPos < pDecInfo->frameStartPos)
  1172. info->consumedByte = pDecInfo->frameEndPos + pDecInfo->streamBufSize - pDecInfo->frameStartPos;
  1173. else
  1174. info->consumedByte = pDecInfo->frameEndPos - pDecInfo->frameStartPos;
  1175. if (pDecInfo->deringEnable || pDecInfo->mirrorEnable || pDecInfo->rotationEnable || pDecInfo->tiled2LinearEnable) {
  1176. info->dispFrame = pDecInfo->rotatorOutput;
  1177. info->dispFrame.stride = pDecInfo->rotatorStride;
  1178. }
  1179. else {
  1180. if(pCodecInst->productId == PRODUCT_ID_7Q && pCodecInst->codecMode != C7_HEVC_DEC) {
  1181. if((pCodecInst->codecMode == C7_AVC_DEC && pDecInfo->initialInfo.interlace == 0)) // [TO BE OPT] use fbc enable information to adjust bfOffset
  1182. val = pDecInfo->numFbsForDecoding;
  1183. else
  1184. val = 0;
  1185. }
  1186. else {
  1187. val = (pDecInfo->openParam.wtlEnable == TRUE ? pDecInfo->numFbsForDecoding: 0); //fbOffset
  1188. }
  1189. maxDecIndex = (pDecInfo->numFbsForDecoding > pDecInfo->numFbsForWTL) ? pDecInfo->numFbsForDecoding : pDecInfo->numFbsForWTL;
  1190. if (0 <= info->indexFrameDisplay && info->indexFrameDisplay < (int)maxDecIndex)
  1191. info->dispFrame = pDecInfo->frameBufPool[val+info->indexFrameDisplay];
  1192. }
  1193. info->rdPtr = pDecInfo->streamRdPtr;
  1194. info->wrPtr = pDecInfo->streamWrPtr;
  1195. info->frameDisplayFlag = pDecInfo->frameDisplayFlag;
  1196. info->sequenceNo = pDecInfo->initialInfo.sequenceNo;
  1197. if (decodedIndex >= 0 && decodedIndex < MAX_GDI_IDX) {
  1198. pDecInfo->decOutInfo[decodedIndex] = *info;
  1199. }
  1200. if (displayIndex >= 0 && displayIndex < MAX_GDI_IDX) {
  1201. info->numOfTotMBs = info->numOfTotMBs;
  1202. info->numOfErrMBs = info->numOfErrMBs;
  1203. info->numOfTotMBsInDisplay = pDecInfo->decOutInfo[displayIndex].numOfTotMBs;
  1204. info->numOfErrMBsInDisplay = pDecInfo->decOutInfo[displayIndex].numOfErrMBs;
  1205. info->dispFrame.sequenceNo = info->sequenceNo;
  1206. }
  1207. else {
  1208. info->numOfTotMBsInDisplay = 0;
  1209. info->numOfErrMBsInDisplay = 0;
  1210. }
  1211. if (info->sequenceChanged != 0) {
  1212. if (!(pCodecInst->productId == PRODUCT_ID_960 || pCodecInst->productId == PRODUCT_ID_980 || pCodecInst->productId == PRODUCT_ID_7Q)) {
  1213. /* Update new sequence information */
  1214. osal_memcpy((void*)&pDecInfo->initialInfo, (void*)&pDecInfo->newSeqInfo, sizeof(DecInitialInfo));
  1215. }
  1216. if ((info->sequenceChanged & SEQ_CHANGE_INTER_RES_CHANGE) != SEQ_CHANGE_INTER_RES_CHANGE) {
  1217. pDecInfo->initialInfo.sequenceNo++;
  1218. }
  1219. }
  1220. if (pCodecInst->productId == PRODUCT_ID_412) {
  1221. if ((info->sequenceChanged & SEQ_CHANGE_INTER_RES_CHANGE) && info->indexInterFrameDecoded == -1) {
  1222. pDecInfo->initialInfo.sequenceNo--;
  1223. }
  1224. }
  1225. SetPendingInst(pCodecInst->coreIdx, 0);
  1226. LeaveLock(pCodecInst->coreIdx);
  1227. return RETCODE_SUCCESS;
  1228. }
  1229. RetCode VPU_DecFrameBufferFlush(DecHandle handle, DecOutputInfo* pRemainings, Uint32* retNum)
  1230. {
  1231. CodecInst* pCodecInst;
  1232. DecInfo* pDecInfo;
  1233. DecOutputInfo* pOut;
  1234. RetCode ret;
  1235. FramebufferIndex retIndex[MAX_GDI_IDX];
  1236. Uint32 retRemainings = 0;
  1237. Int32 i, index, val;
  1238. VpuAttr* pAttr = NULL;
  1239. ret = CheckDecInstanceValidity(handle);
  1240. if (ret != RETCODE_SUCCESS)
  1241. return ret;
  1242. pCodecInst = handle;
  1243. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  1244. EnterLock(pCodecInst->coreIdx);
  1245. if (GetPendingInst(pCodecInst->coreIdx)) {
  1246. LeaveLock(pCodecInst->coreIdx);
  1247. return RETCODE_FRAME_NOT_COMPLETE;
  1248. }
  1249. osal_memset((void*)retIndex, 0xff, sizeof(retIndex));
  1250. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  1251. if (pAttr->supportCommandQueue == FALSE) {
  1252. EnterDispFlagLock(pCodecInst->coreIdx);
  1253. val = pDecInfo->frameDisplayFlag;
  1254. val |= pDecInfo->setDisplayIndexes;
  1255. val &= ~(Uint32)(pDecInfo->clearDisplayIndexes);
  1256. VpuWriteReg(pCodecInst->coreIdx, pDecInfo->frameDisplayFlagRegAddr, val);
  1257. pDecInfo->clearDisplayIndexes = 0;
  1258. pDecInfo->setDisplayIndexes = 0;
  1259. LeaveDispFlagLock(pCodecInst->coreIdx);
  1260. }
  1261. if ((ret=ProductVpuDecFlush(pCodecInst, retIndex, MAX_GDI_IDX)) != RETCODE_SUCCESS) {
  1262. LeaveLock(pCodecInst->coreIdx);
  1263. return ret;
  1264. }
  1265. if (pRemainings != NULL) {
  1266. for (i=0; i<MAX_GDI_IDX; i++) {
  1267. index = (pDecInfo->wtlEnable == TRUE) ? retIndex[i].tiledIndex : retIndex[i].linearIndex;
  1268. if (index < 0)
  1269. break;
  1270. pRemainings[i] = pDecInfo->decOutInfo[index];
  1271. pOut = &pRemainings[i];
  1272. pOut->indexFrameDisplay = pOut->indexFrameDecoded;
  1273. pOut->indexFrameDisplayForTiled = pOut->indexFrameDecodedForTiled;
  1274. if (pDecInfo->wtlEnable == TRUE)
  1275. pOut->dispFrame = pDecInfo->frameBufPool[pDecInfo->numFbsForDecoding+retIndex[i].linearIndex];
  1276. else
  1277. pOut->dispFrame = pDecInfo->frameBufPool[index];
  1278. pOut->dispFrame.sequenceNo = pOut->sequenceNo;
  1279. if (pCodecInst->codecMode == C7_VP9_DEC || pCodecInst->codecMode == C7_AVS2_DEC) {
  1280. Uint32 regVal;
  1281. regVal = VpuReadReg(pCodecInst->coreIdx, W4_RET_DEC_DISPLAY_SIZE);
  1282. pOut->dispPicWidth = regVal>>16;
  1283. pOut->dispPicHeight = regVal&0xffff;
  1284. }
  1285. else {
  1286. pOut->dispPicWidth = pOut->decPicWidth;
  1287. pOut->dispPicHeight = pOut->decPicHeight;
  1288. }
  1289. if (pCodecInst->codecMode == VC1_DEC || pCodecInst->codecMode == C7_VC1_DEC) // vc1 rotates decoded frame buffer region. the other std rotated whole frame buffer region.
  1290. {
  1291. if (pDecInfo->rotationEnable && (pDecInfo->rotationAngle==90 || pDecInfo->rotationAngle==270))
  1292. {
  1293. pOut->rcDisplay.left = pDecInfo->decOutInfo[index].rcDecoded.top;
  1294. pOut->rcDisplay.right = pDecInfo->decOutInfo[index].rcDecoded.bottom;
  1295. pOut->rcDisplay.top = pDecInfo->decOutInfo[index].rcDecoded.left;
  1296. pOut->rcDisplay.bottom = pDecInfo->decOutInfo[index].rcDecoded.right;
  1297. }
  1298. else
  1299. {
  1300. pOut->rcDisplay.left = pDecInfo->decOutInfo[index].rcDecoded.left;
  1301. pOut->rcDisplay.right = pDecInfo->decOutInfo[index].rcDecoded.right;
  1302. pOut->rcDisplay.top = pDecInfo->decOutInfo[index].rcDecoded.top;
  1303. pOut->rcDisplay.bottom = pDecInfo->decOutInfo[index].rcDecoded.bottom;
  1304. }
  1305. }
  1306. else
  1307. {
  1308. if (pDecInfo->rotationEnable)
  1309. {
  1310. switch(pDecInfo->rotationAngle)
  1311. {
  1312. case 90:
  1313. pOut->rcDisplay.left = pDecInfo->decOutInfo[index].rcDecoded.top;
  1314. pOut->rcDisplay.right = pDecInfo->decOutInfo[index].rcDecoded.bottom;
  1315. pOut->rcDisplay.top = pOut->decPicWidth - pDecInfo->decOutInfo[index].rcDecoded.right;
  1316. pOut->rcDisplay.bottom = pOut->decPicWidth - pDecInfo->decOutInfo[index].rcDecoded.left;
  1317. break;
  1318. case 270:
  1319. pOut->rcDisplay.left = pOut->decPicHeight - pDecInfo->decOutInfo[index].rcDecoded.bottom;
  1320. pOut->rcDisplay.right = pOut->decPicHeight - pDecInfo->decOutInfo[index].rcDecoded.top;
  1321. pOut->rcDisplay.top = pDecInfo->decOutInfo[index].rcDecoded.left;
  1322. pOut->rcDisplay.bottom = pDecInfo->decOutInfo[index].rcDecoded.right;
  1323. break;
  1324. case 180:
  1325. pOut->rcDisplay.left = pDecInfo->decOutInfo[index].rcDecoded.left;
  1326. pOut->rcDisplay.right = pDecInfo->decOutInfo[index].rcDecoded.right;
  1327. pOut->rcDisplay.top = pOut->decPicHeight - pDecInfo->decOutInfo[index].rcDecoded.bottom;
  1328. pOut->rcDisplay.bottom = pOut->decPicHeight - pDecInfo->decOutInfo[index].rcDecoded.top;
  1329. break;
  1330. default:
  1331. pOut->rcDisplay.left = pDecInfo->decOutInfo[index].rcDecoded.left;
  1332. pOut->rcDisplay.right = pDecInfo->decOutInfo[index].rcDecoded.right;
  1333. pOut->rcDisplay.top = pDecInfo->decOutInfo[index].rcDecoded.top;
  1334. pOut->rcDisplay.bottom = pDecInfo->decOutInfo[index].rcDecoded.bottom;
  1335. break;
  1336. }
  1337. }
  1338. else
  1339. {
  1340. pOut->rcDisplay.left = pDecInfo->decOutInfo[index].rcDecoded.left;
  1341. pOut->rcDisplay.right = pDecInfo->decOutInfo[index].rcDecoded.right;
  1342. pOut->rcDisplay.top = pDecInfo->decOutInfo[index].rcDecoded.top;
  1343. pOut->rcDisplay.bottom = pDecInfo->decOutInfo[index].rcDecoded.bottom;
  1344. }
  1345. }
  1346. retRemainings++;
  1347. }
  1348. }
  1349. if (retNum) *retNum = retRemainings;
  1350. if (pCodecInst->loggingEnable)
  1351. vdi_log(pCodecInst->coreIdx, DEC_BUF_FLUSH, 0);
  1352. LeaveLock(pCodecInst->coreIdx);
  1353. return ret;
  1354. }
  1355. RetCode VPU_DecSetRdPtr(DecHandle handle, PhysicalAddress addr, int updateWrPtr)
  1356. {
  1357. CodecInst* pCodecInst;
  1358. CodecInst* pPendingInst;
  1359. DecInfo* pDecInfo;
  1360. RetCode ret;
  1361. ret = CheckDecInstanceValidity(handle);
  1362. if (ret != RETCODE_SUCCESS) {
  1363. return ret;
  1364. }
  1365. pCodecInst = (CodecInst*)handle;
  1366. ret = ProductVpuDecCheckCapability(pCodecInst);
  1367. if (ret != RETCODE_SUCCESS) {
  1368. return ret;
  1369. }
  1370. pCodecInst = handle;
  1371. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  1372. pPendingInst = GetPendingInst(pCodecInst->coreIdx);
  1373. if (pCodecInst == pPendingInst) {
  1374. VpuWriteReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr, addr);
  1375. }
  1376. else {
  1377. EnterLock(pCodecInst->coreIdx);
  1378. VpuWriteReg(pCodecInst->coreIdx, pDecInfo->streamRdPtrRegAddr, addr);
  1379. LeaveLock(pCodecInst->coreIdx);
  1380. }
  1381. pDecInfo->streamRdPtr = addr;
  1382. pDecInfo->prevFrameEndPos = addr;
  1383. if (updateWrPtr == TRUE) {
  1384. pDecInfo->streamWrPtr = addr;
  1385. }
  1386. pDecInfo->rdPtrValidFlag = 1;
  1387. return RETCODE_SUCCESS;
  1388. }
  1389. RetCode VPU_EncSetWrPtr(EncHandle handle, PhysicalAddress addr, int updateRdPtr)
  1390. {
  1391. CodecInst* pCodecInst;
  1392. CodecInst* pPendingInst;
  1393. EncInfo * pEncInfo;
  1394. RetCode ret;
  1395. ret = CheckEncInstanceValidity(handle);
  1396. if (ret != RETCODE_SUCCESS)
  1397. return ret;
  1398. pCodecInst = (CodecInst*)handle;
  1399. if (pCodecInst->productId == PRODUCT_ID_960 || pCodecInst->productId == PRODUCT_ID_980) {
  1400. return RETCODE_NOT_SUPPORTED_FEATURE;
  1401. }
  1402. pEncInfo = &handle->CodecInfo->encInfo;
  1403. pPendingInst = GetPendingInst(pCodecInst->coreIdx);
  1404. if (pCodecInst == pPendingInst) {
  1405. VpuWriteReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr, addr);
  1406. }
  1407. else {
  1408. EnterLock(pCodecInst->coreIdx);
  1409. VpuWriteReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr, addr);
  1410. LeaveLock(pCodecInst->coreIdx);
  1411. }
  1412. pEncInfo->streamWrPtr = addr;
  1413. if (updateRdPtr)
  1414. pEncInfo->streamRdPtr = addr;
  1415. return RETCODE_SUCCESS;
  1416. }
  1417. RetCode VPU_DecClrDispFlag(DecHandle handle, int index)
  1418. {
  1419. CodecInst* pCodecInst;
  1420. DecInfo* pDecInfo;
  1421. RetCode ret = RETCODE_SUCCESS;
  1422. Int32 endIndex;
  1423. VpuAttr* pAttr = NULL;
  1424. BOOL supportCommandQueue;
  1425. ret = CheckDecInstanceValidity(handle);
  1426. if (ret != RETCODE_SUCCESS)
  1427. return ret;
  1428. pCodecInst = handle;
  1429. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  1430. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  1431. endIndex = (pDecInfo->openParam.wtlEnable == TRUE) ? pDecInfo->numFbsForWTL : pDecInfo->numFbsForDecoding;
  1432. if ((index < 0) || (index > (endIndex - 1))) {
  1433. return RETCODE_INVALID_PARAM;
  1434. }
  1435. supportCommandQueue = (pAttr->supportCommandQueue == TRUE);
  1436. if (supportCommandQueue == TRUE) {
  1437. EnterLock(pCodecInst->coreIdx);
  1438. ret = ProductClrDispFlag(pCodecInst, index);
  1439. LeaveLock(pCodecInst->coreIdx);
  1440. }
  1441. else {
  1442. EnterDispFlagLock(pCodecInst->coreIdx);
  1443. pDecInfo->clearDisplayIndexes |= (1<<index);
  1444. LeaveDispFlagLock(pCodecInst->coreIdx);
  1445. }
  1446. return ret;
  1447. }
  1448. RetCode VPU_DecGiveCommand(DecHandle handle, CodecCommand cmd, void* param)
  1449. {
  1450. CodecInst* pCodecInst;
  1451. DecInfo* pDecInfo;
  1452. RetCode ret;
  1453. PhysicalAddress addr;
  1454. ret = CheckDecInstanceValidity(handle);
  1455. if (ret != RETCODE_SUCCESS)
  1456. return ret;
  1457. pCodecInst = handle;
  1458. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  1459. switch (cmd)
  1460. {
  1461. case ENABLE_ROTATION :
  1462. {
  1463. if (pDecInfo->rotatorStride == 0) {
  1464. return RETCODE_ROTATOR_STRIDE_NOT_SET;
  1465. }
  1466. pDecInfo->rotationEnable = 1;
  1467. break;
  1468. }
  1469. case DISABLE_ROTATION :
  1470. {
  1471. pDecInfo->rotationEnable = 0;
  1472. break;
  1473. }
  1474. case ENABLE_MIRRORING :
  1475. {
  1476. if (pDecInfo->rotatorStride == 0) {
  1477. return RETCODE_ROTATOR_STRIDE_NOT_SET;
  1478. }
  1479. pDecInfo->mirrorEnable = 1;
  1480. break;
  1481. }
  1482. case DISABLE_MIRRORING :
  1483. {
  1484. pDecInfo->mirrorEnable = 0;
  1485. break;
  1486. }
  1487. case SET_MIRROR_DIRECTION :
  1488. {
  1489. MirrorDirection mirDir;
  1490. if (param == 0) {
  1491. return RETCODE_INVALID_PARAM;
  1492. }
  1493. mirDir = *(MirrorDirection *)param;
  1494. if ( !(mirDir == MIRDIR_NONE) && !(mirDir==MIRDIR_HOR) && !(mirDir==MIRDIR_VER) && !(mirDir==MIRDIR_HOR_VER)) {
  1495. return RETCODE_INVALID_PARAM;
  1496. }
  1497. pDecInfo->mirrorDirection = mirDir;
  1498. break;
  1499. }
  1500. case SET_ROTATION_ANGLE :
  1501. {
  1502. int angle;
  1503. if (param == 0) {
  1504. return RETCODE_INVALID_PARAM;
  1505. }
  1506. angle = *(int *)param;
  1507. if (angle != 0 && angle != 90 &&
  1508. angle != 180 && angle != 270) {
  1509. return RETCODE_INVALID_PARAM;
  1510. }
  1511. if (pDecInfo->rotatorStride != 0) {
  1512. if (angle == 90 || angle ==270) {
  1513. if (pDecInfo->initialInfo.picHeight > pDecInfo->rotatorStride) {
  1514. return RETCODE_INVALID_PARAM;
  1515. }
  1516. } else {
  1517. if (pDecInfo->initialInfo.picWidth > pDecInfo->rotatorStride) {
  1518. return RETCODE_INVALID_PARAM;
  1519. }
  1520. }
  1521. }
  1522. pDecInfo->rotationAngle = angle;
  1523. break;
  1524. }
  1525. case SET_ROTATOR_OUTPUT :
  1526. {
  1527. FrameBuffer *frame;
  1528. if (param == 0) {
  1529. return RETCODE_INVALID_PARAM;
  1530. }
  1531. frame = (FrameBuffer *)param;
  1532. pDecInfo->rotatorOutput = *frame;
  1533. pDecInfo->rotatorOutputValid = 1;
  1534. break;
  1535. }
  1536. case SET_ROTATOR_STRIDE :
  1537. {
  1538. int stride;
  1539. if (param == 0) {
  1540. return RETCODE_INVALID_PARAM;
  1541. }
  1542. stride = *(int *)param;
  1543. if (stride % 8 != 0 || stride == 0) {
  1544. return RETCODE_INVALID_STRIDE;
  1545. }
  1546. if (pDecInfo->rotationAngle == 90 || pDecInfo->rotationAngle == 270) {
  1547. if (pDecInfo->initialInfo.picHeight > stride) {
  1548. return RETCODE_INVALID_STRIDE;
  1549. }
  1550. } else {
  1551. if (pDecInfo->initialInfo.picWidth > stride) {
  1552. return RETCODE_INVALID_STRIDE;
  1553. }
  1554. }
  1555. pDecInfo->rotatorStride = stride;
  1556. break;
  1557. }
  1558. case DEC_SET_SPS_RBSP:
  1559. {
  1560. if (pCodecInst->codecMode != AVC_DEC && pCodecInst->codecMode != C7_AVC_DEC) {
  1561. return RETCODE_INVALID_COMMAND;
  1562. }
  1563. if (param == 0) {
  1564. return RETCODE_INVALID_PARAM;
  1565. }
  1566. return SetParaSet(handle, 0, (DecParamSet *)param);
  1567. }
  1568. case DEC_SET_PPS_RBSP:
  1569. {
  1570. if (pCodecInst->codecMode != AVC_DEC && pCodecInst->codecMode != C7_AVC_DEC) {
  1571. return RETCODE_INVALID_COMMAND;
  1572. }
  1573. if (param == 0) {
  1574. return RETCODE_INVALID_PARAM;
  1575. }
  1576. return SetParaSet(handle, 1, (DecParamSet *)param);
  1577. }
  1578. case ENABLE_DERING :
  1579. {
  1580. if (pDecInfo->rotatorStride == 0) {
  1581. return RETCODE_ROTATOR_STRIDE_NOT_SET;
  1582. }
  1583. pDecInfo->deringEnable = 1;
  1584. break;
  1585. }
  1586. case DISABLE_DERING :
  1587. {
  1588. pDecInfo->deringEnable = 0;
  1589. break;
  1590. }
  1591. case SET_SEC_AXI:
  1592. {
  1593. SecAxiUse secAxiUse;
  1594. if (param == 0) {
  1595. return RETCODE_INVALID_PARAM;
  1596. }
  1597. secAxiUse = *(SecAxiUse *)param;
  1598. if (handle->productId == PRODUCT_ID_410 || handle->productId == PRODUCT_ID_4102 || handle->productId == PRODUCT_ID_420 ||
  1599. handle->productId == PRODUCT_ID_412 || handle->productId == PRODUCT_ID_420L || handle->productId == PRODUCT_ID_510 ||
  1600. handle->productId == PRODUCT_ID_512 || handle->productId == PRODUCT_ID_515 || handle->productId == PRODUCT_ID_520 ) {
  1601. pDecInfo->secAxiInfo.u.wave4.useIpEnable = secAxiUse.u.wave4.useIpEnable;
  1602. pDecInfo->secAxiInfo.u.wave4.useLfRowEnable = secAxiUse.u.wave4.useLfRowEnable;
  1603. pDecInfo->secAxiInfo.u.wave4.useBitEnable = secAxiUse.u.wave4.useBitEnable;
  1604. }
  1605. else if (handle->productId == PRODUCT_ID_7Q) {
  1606. if (handle->codecMode == C7_HEVC_DEC) {
  1607. pDecInfo->secAxiInfo.u.wave4.useIpEnable = secAxiUse.u.wave4.useIpEnable;
  1608. pDecInfo->secAxiInfo.u.wave4.useLfRowEnable = secAxiUse.u.wave4.useLfRowEnable;
  1609. pDecInfo->secAxiInfo.u.wave4.useBitEnable = secAxiUse.u.wave4.useBitEnable;
  1610. }
  1611. else {
  1612. pDecInfo->secAxiInfo.u.coda9.useBitEnable = secAxiUse.u.coda9.useBitEnable;
  1613. pDecInfo->secAxiInfo.u.coda9.useIpEnable = secAxiUse.u.coda9.useIpEnable;
  1614. pDecInfo->secAxiInfo.u.coda9.useDbkYEnable = secAxiUse.u.coda9.useDbkYEnable;
  1615. pDecInfo->secAxiInfo.u.coda9.useDbkCEnable = secAxiUse.u.coda9.useDbkCEnable;
  1616. pDecInfo->secAxiInfo.u.coda9.useOvlEnable = secAxiUse.u.coda9.useOvlEnable;
  1617. }
  1618. }
  1619. else {
  1620. pDecInfo->secAxiInfo.u.coda9.useBitEnable = secAxiUse.u.coda9.useBitEnable;
  1621. pDecInfo->secAxiInfo.u.coda9.useIpEnable = secAxiUse.u.coda9.useIpEnable;
  1622. pDecInfo->secAxiInfo.u.coda9.useDbkYEnable = secAxiUse.u.coda9.useDbkYEnable;
  1623. pDecInfo->secAxiInfo.u.coda9.useDbkCEnable = secAxiUse.u.coda9.useDbkCEnable;
  1624. pDecInfo->secAxiInfo.u.coda9.useOvlEnable = secAxiUse.u.coda9.useOvlEnable;
  1625. pDecInfo->secAxiInfo.u.coda9.useBtpEnable = secAxiUse.u.coda9.useBtpEnable;
  1626. }
  1627. break;
  1628. }
  1629. case ENABLE_REP_USERDATA:
  1630. {
  1631. if (!pDecInfo->userDataBufAddr) {
  1632. return RETCODE_USERDATA_BUF_NOT_SET;
  1633. }
  1634. if (pDecInfo->userDataBufSize == 0) {
  1635. return RETCODE_USERDATA_BUF_NOT_SET;
  1636. }
  1637. switch (pCodecInst->productId) {
  1638. case PRODUCT_ID_4102:
  1639. case PRODUCT_ID_410:
  1640. case PRODUCT_ID_412:
  1641. case PRODUCT_ID_7Q:
  1642. case PRODUCT_ID_510:
  1643. case PRODUCT_ID_512:
  1644. case PRODUCT_ID_515:
  1645. case PRODUCT_ID_420:
  1646. case PRODUCT_ID_420L:
  1647. pDecInfo->userDataEnable = *(Uint32*)param;
  1648. break;
  1649. case PRODUCT_ID_960:
  1650. case PRODUCT_ID_980:
  1651. pDecInfo->userDataEnable = TRUE;
  1652. break;
  1653. default:
  1654. VLOG(INFO, "%s(ENABLE_REP_DATA) invalid productId(%d)\n", __FUNCTION__, pCodecInst->productId);
  1655. return RETCODE_INVALID_PARAM;
  1656. }
  1657. break;
  1658. }
  1659. case DISABLE_REP_USERDATA:
  1660. {
  1661. pDecInfo->userDataEnable = 0;
  1662. break;
  1663. }
  1664. case SET_ADDR_REP_USERDATA:
  1665. {
  1666. PhysicalAddress userDataBufAddr;
  1667. if (param == 0) {
  1668. return RETCODE_INVALID_PARAM;
  1669. }
  1670. userDataBufAddr = *(PhysicalAddress *)param;
  1671. if (userDataBufAddr % 8 != 0 || userDataBufAddr == 0) {
  1672. return RETCODE_INVALID_PARAM;
  1673. }
  1674. pDecInfo->userDataBufAddr = userDataBufAddr;
  1675. break;
  1676. }
  1677. case SET_VIRT_ADDR_REP_USERDATA:
  1678. {
  1679. unsigned long userDataVirtAddr;
  1680. if (param == 0) {
  1681. return RETCODE_INVALID_PARAM;
  1682. }
  1683. if (!pDecInfo->userDataBufAddr) {
  1684. return RETCODE_USERDATA_BUF_NOT_SET;
  1685. }
  1686. if (pDecInfo->userDataBufSize == 0) {
  1687. return RETCODE_USERDATA_BUF_NOT_SET;
  1688. }
  1689. userDataVirtAddr = *(unsigned long *)param;
  1690. if (!userDataVirtAddr) {
  1691. return RETCODE_INVALID_PARAM;
  1692. }
  1693. pDecInfo->vbUserData.phys_addr = pDecInfo->userDataBufAddr;
  1694. pDecInfo->vbUserData.size = pDecInfo->userDataBufSize;
  1695. pDecInfo->vbUserData.virt_addr = (unsigned long)userDataVirtAddr;
  1696. if (vdi_attach_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbUserData) != 0) {
  1697. return RETCODE_INSUFFICIENT_RESOURCE;
  1698. }
  1699. break;
  1700. }
  1701. case SET_SIZE_REP_USERDATA:
  1702. {
  1703. PhysicalAddress userDataBufSize;
  1704. if (param == 0) {
  1705. return RETCODE_INVALID_PARAM;
  1706. }
  1707. userDataBufSize = *(PhysicalAddress *)param;
  1708. pDecInfo->userDataBufSize = userDataBufSize;
  1709. break;
  1710. }
  1711. case SET_USERDATA_REPORT_MODE:
  1712. {
  1713. int userDataMode;
  1714. userDataMode = *(int *)param;
  1715. if (userDataMode != 1 && userDataMode != 0) {
  1716. return RETCODE_INVALID_PARAM;
  1717. }
  1718. pDecInfo->userDataReportMode = userDataMode;
  1719. break;
  1720. }
  1721. /** WAVE4 CU DATA REPORT INTERFACE **/
  1722. case ENABLE_REP_CUDATA:
  1723. if (!pDecInfo->cuDataBufAddr) {
  1724. /* share error code with USERDATA */
  1725. return RETCODE_USERDATA_BUF_NOT_SET;
  1726. }
  1727. if (pDecInfo->cuDataBufSize == 0) {
  1728. /* share error code with USERDATA */
  1729. return RETCODE_USERDATA_BUF_NOT_SET;
  1730. }
  1731. pDecInfo->cuDataEnable = TRUE;
  1732. break;
  1733. case DISABLE_REP_CUDATA:
  1734. pDecInfo->cuDataEnable = FALSE;
  1735. break;
  1736. case SET_ADDR_REP_CUDATA:
  1737. if (param == 0) {
  1738. return RETCODE_INVALID_PARAM;
  1739. }
  1740. addr = *(PhysicalAddress *)param;
  1741. if ((addr % 8) != 0 || addr == 0) {
  1742. return RETCODE_INVALID_PARAM;
  1743. }
  1744. pDecInfo->cuDataBufAddr = addr;
  1745. break;
  1746. case SET_SIZE_REP_CUDATA:
  1747. if (param == 0) {
  1748. return RETCODE_INVALID_PARAM;
  1749. }
  1750. pDecInfo->cuDataBufSize = *(PhysicalAddress *)param;
  1751. break;
  1752. /************************************/
  1753. case SET_CACHE_CONFIG:
  1754. {
  1755. MaverickCacheConfig *mcCacheConfig;
  1756. if (param == 0) {
  1757. return RETCODE_INVALID_PARAM;
  1758. }
  1759. mcCacheConfig = (MaverickCacheConfig *)param;
  1760. pDecInfo->cacheConfig = *mcCacheConfig;
  1761. }
  1762. break;
  1763. case SET_LOW_DELAY_CONFIG:
  1764. {
  1765. LowDelayInfo *lowDelayInfo;
  1766. if (param == 0) {
  1767. return RETCODE_INVALID_PARAM;
  1768. }
  1769. if (pCodecInst->productId != PRODUCT_ID_980) {
  1770. return RETCODE_NOT_SUPPORTED_FEATURE;
  1771. }
  1772. lowDelayInfo = (LowDelayInfo *)param;
  1773. if (lowDelayInfo->lowDelayEn) {
  1774. if ( (pCodecInst->codecMode != AVC_DEC && pCodecInst->codecMode != C7_AVC_DEC) ||
  1775. pDecInfo->rotationEnable ||
  1776. pDecInfo->mirrorEnable ||
  1777. pDecInfo->tiled2LinearEnable ||
  1778. pDecInfo->deringEnable) {
  1779. return RETCODE_INVALID_PARAM;
  1780. }
  1781. }
  1782. pDecInfo->lowDelayInfo.lowDelayEn = lowDelayInfo->lowDelayEn;
  1783. pDecInfo->lowDelayInfo.numRows = lowDelayInfo->numRows;
  1784. }
  1785. break;
  1786. case SET_DECODE_FLUSH: // interrupt mode to pic_end
  1787. ret = ProductCpbFlush((CodecInst*)handle);
  1788. break;
  1789. case DEC_SET_FRAME_DELAY:
  1790. {
  1791. pDecInfo->frameDelay = *(int *)param;
  1792. break;
  1793. }
  1794. case DEC_ENABLE_REORDER:
  1795. {
  1796. if((handle->productId == PRODUCT_ID_980) || (handle->productId == PRODUCT_ID_960) || (handle->productId == PRODUCT_ID_950) || (handle->productId == PRODUCT_ID_7503) || (handle->productId == PRODUCT_ID_320))
  1797. {
  1798. if (pDecInfo->initialInfoObtained) {
  1799. return RETCODE_WRONG_CALL_SEQUENCE;
  1800. }
  1801. }
  1802. pDecInfo->reorderEnable = 1;
  1803. break;
  1804. }
  1805. case DEC_DISABLE_REORDER:
  1806. {
  1807. if((handle->productId == PRODUCT_ID_980) || (handle->productId == PRODUCT_ID_960) || (handle->productId == PRODUCT_ID_950) || (handle->productId == PRODUCT_ID_7503) || (handle->productId == PRODUCT_ID_320))
  1808. {
  1809. if (pDecInfo->initialInfoObtained) {
  1810. return RETCODE_WRONG_CALL_SEQUENCE;
  1811. }
  1812. if(pCodecInst->codecMode != AVC_DEC && pCodecInst->codecMode != VC1_DEC && pCodecInst->codecMode != AVS_DEC && pCodecInst->codecMode != C7_AVC_DEC && pCodecInst->codecMode != C7_VC1_DEC && pCodecInst->codecMode != C7_AVS_DEC) {
  1813. return RETCODE_INVALID_COMMAND;
  1814. }
  1815. }
  1816. pDecInfo->reorderEnable = 0;
  1817. break;
  1818. }
  1819. case DEC_SET_AVC_ERROR_CONCEAL_MODE:
  1820. {
  1821. if(pCodecInst->codecMode != AVC_DEC && pCodecInst->codecMode != C7_AVC_DEC) {
  1822. return RETCODE_INVALID_COMMAND;
  1823. }
  1824. pDecInfo->avcErrorConcealMode = *(int *)param;
  1825. break;
  1826. }
  1827. case DEC_FREE_FRAME_BUFFER:
  1828. {
  1829. int i;
  1830. if (pDecInfo->vbSlice.size)
  1831. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbSlice);
  1832. if (pDecInfo->vbFrame.size){
  1833. if (pDecInfo->frameAllocExt == 0)
  1834. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFrame);
  1835. }
  1836. for (i=0 ; i<MAX_REG_FRAME; i++) {
  1837. if (pDecInfo->vbFbcYTbl[i].size)
  1838. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcYTbl[i]);
  1839. if (pDecInfo->vbFbcCTbl[i].size)
  1840. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcCTbl[i]);
  1841. if (pDecInfo->vbMV[i].size)
  1842. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbMV[i]);
  1843. }
  1844. if (pDecInfo->vbPPU.size) {
  1845. if (pDecInfo->ppuAllocExt == 0)
  1846. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbPPU);
  1847. }
  1848. if (pDecInfo->wtlEnable) {
  1849. if (pDecInfo->vbWTL.size)
  1850. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbWTL);
  1851. }
  1852. break;
  1853. }
  1854. case DEC_GET_FRAMEBUF_INFO:
  1855. {
  1856. DecGetFramebufInfo* fbInfo = (DecGetFramebufInfo*)param;
  1857. Uint32 i;
  1858. fbInfo->vbFrame = pDecInfo->vbFrame;
  1859. fbInfo->vbWTL = pDecInfo->vbWTL;
  1860. for (i=0 ; i<MAX_REG_FRAME; i++)
  1861. {
  1862. fbInfo->vbFbcYTbl[i] = pDecInfo->vbFbcYTbl[i];
  1863. fbInfo->vbFbcCTbl[i] = pDecInfo->vbFbcCTbl[i];
  1864. fbInfo->vbMvCol[i] = pDecInfo->vbMV[i];
  1865. }
  1866. for (i=0; i<MAX_GDI_IDX*2; i++) {
  1867. fbInfo->framebufPool[i] = pDecInfo->frameBufPool[i];
  1868. }
  1869. }
  1870. break;
  1871. case DEC_RESET_FRAMEBUF_INFO:
  1872. {
  1873. int i;
  1874. pDecInfo->vbFrame.base = 0;
  1875. pDecInfo->vbFrame.phys_addr = 0;
  1876. pDecInfo->vbFrame.virt_addr = 0;
  1877. pDecInfo->vbFrame.size = 0;
  1878. pDecInfo->vbWTL.base = 0;
  1879. pDecInfo->vbWTL.phys_addr = 0;
  1880. pDecInfo->vbWTL.virt_addr = 0;
  1881. pDecInfo->vbWTL.size = 0;
  1882. for (i=0 ; i<MAX_REG_FRAME; i++)
  1883. {
  1884. pDecInfo->vbFbcYTbl[i].base = 0;
  1885. pDecInfo->vbFbcYTbl[i].phys_addr = 0;
  1886. pDecInfo->vbFbcYTbl[i].virt_addr = 0;
  1887. pDecInfo->vbFbcYTbl[i].size = 0;
  1888. pDecInfo->vbFbcCTbl[i].base = 0;
  1889. pDecInfo->vbFbcCTbl[i].phys_addr = 0;
  1890. pDecInfo->vbFbcCTbl[i].virt_addr = 0;
  1891. pDecInfo->vbFbcCTbl[i].size = 0;
  1892. pDecInfo->vbMV[i].base = 0;
  1893. pDecInfo->vbMV[i].phys_addr = 0;
  1894. pDecInfo->vbMV[i].virt_addr = 0;
  1895. pDecInfo->vbMV[i].size = 0;
  1896. }
  1897. pDecInfo->frameDisplayFlag = 0;
  1898. pDecInfo->setDisplayIndexes = 0;
  1899. pDecInfo->clearDisplayIndexes = 0;
  1900. break;
  1901. }
  1902. case DEC_GET_QUEUE_STATUS:
  1903. {
  1904. DecQueueStatusInfo* queueInfo = (DecQueueStatusInfo*)param;
  1905. queueInfo->instanceQueueCount = pDecInfo->instanceQueueCount;
  1906. queueInfo->totalQueueCount = pDecInfo->totalQueueCount;
  1907. break;
  1908. }
  1909. case ENABLE_DEC_THUMBNAIL_MODE:
  1910. {
  1911. pDecInfo->thumbnailMode = 1;
  1912. break;
  1913. }
  1914. case DEC_GET_SEQ_INFO:
  1915. {
  1916. DecInitialInfo* seqInfo = (DecInitialInfo*)param;
  1917. *seqInfo = pDecInfo->initialInfo;
  1918. break;
  1919. }
  1920. case DEC_GET_FIELD_PIC_TYPE:
  1921. {
  1922. return RETCODE_FAILURE;
  1923. }
  1924. case DEC_GET_DISPLAY_OUTPUT_INFO:
  1925. {
  1926. DecOutputInfo *pDecOutInfo = (DecOutputInfo *)param;
  1927. *pDecOutInfo = pDecInfo->decOutInfo[pDecOutInfo->indexFrameDisplay];
  1928. break;
  1929. }
  1930. case GET_TILEDMAP_CONFIG:
  1931. {
  1932. TiledMapConfig *pMapCfg = (TiledMapConfig *)param;
  1933. if (!pMapCfg) {
  1934. return RETCODE_INVALID_PARAM;
  1935. }
  1936. if (!pDecInfo->stride) {
  1937. return RETCODE_WRONG_CALL_SEQUENCE;
  1938. }
  1939. *pMapCfg = pDecInfo->mapCfg;
  1940. break;
  1941. }
  1942. case SET_DRAM_CONFIG:
  1943. {
  1944. DRAMConfig *cfg = (DRAMConfig *)param;
  1945. if (!cfg) {
  1946. return RETCODE_INVALID_PARAM;
  1947. }
  1948. pDecInfo->dramCfg = *cfg;
  1949. break;
  1950. }
  1951. case GET_DRAM_CONFIG:
  1952. {
  1953. DRAMConfig *cfg = (DRAMConfig *)param;
  1954. if (!cfg) {
  1955. return RETCODE_INVALID_PARAM;
  1956. }
  1957. *cfg = pDecInfo->dramCfg;
  1958. break;
  1959. }
  1960. case GET_LOW_DELAY_OUTPUT:
  1961. {
  1962. DecOutputInfo *lowDelayOutput;
  1963. if (param == 0) {
  1964. return RETCODE_INVALID_PARAM;
  1965. }
  1966. if (!pDecInfo->lowDelayInfo.lowDelayEn || pCodecInst->codecMode != AVC_DEC) {
  1967. return RETCODE_INVALID_COMMAND;
  1968. }
  1969. if (pCodecInst != GetPendingInst(pCodecInst->coreIdx)) {
  1970. return RETCODE_WRONG_CALL_SEQUENCE;
  1971. }
  1972. lowDelayOutput = (DecOutputInfo *)param;
  1973. GetLowDelayOutput(pCodecInst, lowDelayOutput);
  1974. }
  1975. break;
  1976. case ENABLE_LOGGING:
  1977. {
  1978. pCodecInst->loggingEnable = 1;
  1979. }
  1980. break;
  1981. case DISABLE_LOGGING:
  1982. {
  1983. pCodecInst->loggingEnable = 0;
  1984. }
  1985. break;
  1986. case DEC_SET_SEQ_CHANGE_MASK:
  1987. if (PRODUCT_ID_NOT_W_SERIES(pCodecInst->productId))
  1988. return RETCODE_INVALID_PARAM;
  1989. pDecInfo->seqChangeMask = *(int*)param;
  1990. break;
  1991. case DEC_SET_WTL_FRAME_FORMAT:
  1992. pDecInfo->wtlFormat = *(FrameBufferFormat*)param;
  1993. break;
  1994. case DEC_SET_DISPLAY_FLAG:
  1995. {
  1996. Int32 index;
  1997. VpuAttr* pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  1998. BOOL supportCommandQueue = FALSE;
  1999. if (param == 0) {
  2000. return RETCODE_INVALID_PARAM;
  2001. }
  2002. index = *(Int32 *)param;
  2003. supportCommandQueue = (pAttr->supportCommandQueue == TRUE);
  2004. if (supportCommandQueue == TRUE) {
  2005. EnterLock(pCodecInst->coreIdx);
  2006. ProductSetDispFlag(pCodecInst, index);
  2007. LeaveLock(pCodecInst->coreIdx);
  2008. }
  2009. else {
  2010. EnterDispFlagLock(pCodecInst->coreIdx);
  2011. pDecInfo->setDisplayIndexes |= (1<<index);
  2012. LeaveDispFlagLock(pCodecInst->coreIdx);
  2013. }
  2014. }
  2015. break;
  2016. #ifdef DRAM_TEST
  2017. case DRAM_READ_WRITE_TEST:
  2018. {
  2019. Uint32 dram_source_addr;
  2020. Uint32 dram_destination_addr;
  2021. Uint32 dram_data_size;
  2022. Uint32 result;
  2023. Uint32 core_idx;
  2024. unsigned int i;
  2025. //unsigned char probeData[64];
  2026. unsigned char *probeSourceData;
  2027. unsigned char *probeDestinationData;
  2028. dram_source_addr = 0x80000000;
  2029. dram_destination_addr = 0x90000000;
  2030. dram_data_size = 0x00000010;
  2031. core_idx = 0;
  2032. result = ExecDRAMReadWriteTest(core_idx, &dram_source_addr, &dram_destination_addr, &dram_data_size);
  2033. if (result == RETCODE_SUCCESS)
  2034. VLOG(INFO, "DRAM Read/Write Test is successful result = %x\r\n", result);
  2035. else
  2036. VLOG(INFO, "DRAM Read/Write Test is not successful result = %x\r\n", result);
  2037. probeSourceData = (unsigned char *)osal_malloc(dram_data_size*4);
  2038. probeDestinationData = (unsigned char *)osal_malloc(dram_data_size*4);
  2039. //osal_memset(probeData, 0xff, 64);
  2040. vdi_read_memory(core_idx, dram_source_addr, probeSourceData, dram_data_size*4, VDI_BIG_ENDIAN);
  2041. for (i=0; i < (dram_data_size*4); i=i+8)
  2042. {
  2043. printf("probeSourceData 0x%04xh: 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n", dram_source_addr+i, probeSourceData[i], probeSourceData[i+1], probeSourceData[i+2], probeSourceData[i+3], probeSourceData[i+4], probeSourceData[i+5], probeSourceData[i+6], probeSourceData[i+7]);
  2044. }
  2045. vdi_read_memory(core_idx, dram_destination_addr, probeDestinationData, dram_data_size*4, VDI_BIG_ENDIAN);
  2046. for (i=0; i < (dram_data_size*4); i=i+8)
  2047. {
  2048. printf("probeDestinationData 0x%04xh: 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n", dram_destination_addr+i, probeDestinationData[i], probeDestinationData[i+1], probeDestinationData[i+2], probeDestinationData[i+3], probeDestinationData[i+4], probeDestinationData[i+5], probeDestinationData[i+6], probeDestinationData[i+7]);
  2049. }
  2050. if(memcmp(probeSourceData, probeDestinationData, dram_data_size*4) == 0)
  2051. {
  2052. printf("Source Data and Destination Data are identical\r\n");
  2053. result = RETCODE_SUCCESS;
  2054. }
  2055. else
  2056. {
  2057. printf("Source Data and Destination Data are not identical\r\n");
  2058. result = RETCODE_FAILURE;
  2059. }
  2060. free(probeDestinationData);
  2061. free(probeSourceData);
  2062. break;
  2063. }
  2064. #endif /* SUPPORT DRAM_TEST */
  2065. case DEC_SET_TARGET_TEMPORAL_ID:
  2066. if (param == NULL) {
  2067. return RETCODE_INVALID_PARAM;
  2068. }
  2069. if (AVC_DEC == pCodecInst->codecMode || HEVC_DEC == pCodecInst->codecMode) {
  2070. Uint32 targetSublayerId = *(Uint32*)param;
  2071. Uint32 maxTargetId = (AVC_DEC == pCodecInst->codecMode) ? AVC_MAX_SUB_LAYER_ID : HEVC_MAX_SUB_LAYER_ID;
  2072. if (targetSublayerId > maxTargetId) {
  2073. ret = RETCODE_INVALID_PARAM;
  2074. }
  2075. else {
  2076. pDecInfo->targetSubLayerId = targetSublayerId;
  2077. }
  2078. }
  2079. else {
  2080. ret= RETCODE_NOT_SUPPORTED_FEATURE;
  2081. }
  2082. break;
  2083. case DEC_SET_BWB_CUR_FRAME_IDX:
  2084. pDecInfo->chBwbFrameIdx = *(Uint32*)param;
  2085. break;
  2086. case DEC_SET_FBC_CUR_FRAME_IDX:
  2087. pDecInfo->chFbcFrameIdx = *(Uint32*)param;
  2088. break;
  2089. case DEC_SET_INTER_RES_INFO_ON:
  2090. pDecInfo->interResChange = 1;
  2091. break;
  2092. case DEC_SET_INTER_RES_INFO_OFF:
  2093. pDecInfo->interResChange = 0;
  2094. break;
  2095. case DEC_FREE_FBC_TABLE_BUFFER:
  2096. {
  2097. Uint32 fbcCurFrameIdx = *(Uint32*)param;
  2098. if(pDecInfo->vbFbcYTbl[fbcCurFrameIdx].size > 0) {
  2099. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcYTbl[fbcCurFrameIdx]);
  2100. pDecInfo->vbFbcYTbl[fbcCurFrameIdx].size = 0;
  2101. }
  2102. if(pDecInfo->vbFbcCTbl[fbcCurFrameIdx].size > 0) {
  2103. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcCTbl[fbcCurFrameIdx]);
  2104. pDecInfo->vbFbcCTbl[fbcCurFrameIdx].size = 0;
  2105. }
  2106. }
  2107. break;
  2108. case DEC_FREE_MV_BUFFER:
  2109. {
  2110. Uint32 fbcCurFrameIdx = *(Uint32*)param;
  2111. if(pDecInfo->vbMV[fbcCurFrameIdx].size > 0) {
  2112. vdi_free_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbMV[fbcCurFrameIdx]);
  2113. pDecInfo->vbMV[fbcCurFrameIdx].size = 0;
  2114. }
  2115. }
  2116. break;
  2117. case DEC_ALLOC_MV_BUFFER:
  2118. {
  2119. Uint32 fbcCurFrameIdx = *(Uint32*)param;
  2120. Uint32 size;
  2121. size = WAVE4_DEC_VP9_MVCOL_BUF_SIZE(pDecInfo->initialInfo.picWidth, pDecInfo->initialInfo.picHeight);
  2122. pDecInfo->vbMV[fbcCurFrameIdx].phys_addr = 0;
  2123. pDecInfo->vbMV[fbcCurFrameIdx].size = ((size+4095)&~4095)+4096; /* 4096 is a margin */
  2124. if (vdi_allocate_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbMV[fbcCurFrameIdx]) < 0)
  2125. return RETCODE_INSUFFICIENT_RESOURCE;
  2126. }
  2127. break;
  2128. case DEC_ALLOC_FBC_Y_TABLE_BUFFER:
  2129. {
  2130. Uint32 fbcCurFrameIdx = *(Uint32*)param;
  2131. Uint32 size;
  2132. size = WAVE4_FBC_LUMA_TABLE_SIZE(VPU_ALIGN64(pDecInfo->initialInfo.picWidth), VPU_ALIGN64(pDecInfo->initialInfo.picHeight));
  2133. size = VPU_ALIGN16(size);
  2134. pDecInfo->vbFbcYTbl[fbcCurFrameIdx].phys_addr = 0;
  2135. pDecInfo->vbFbcYTbl[fbcCurFrameIdx].size = ((size+4095)&~4095)+4096;
  2136. if (vdi_allocate_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcYTbl[fbcCurFrameIdx]) < 0)
  2137. return RETCODE_INSUFFICIENT_RESOURCE;
  2138. }
  2139. break;
  2140. case DEC_ALLOC_FBC_C_TABLE_BUFFER:
  2141. {
  2142. Uint32 fbcCurFrameIdx = *(Uint32*)param;
  2143. Uint32 size;
  2144. size = WAVE4_FBC_CHROMA_TABLE_SIZE(VPU_ALIGN64(pDecInfo->initialInfo.picWidth), VPU_ALIGN64(pDecInfo->initialInfo.picHeight));
  2145. size = VPU_ALIGN16(size);
  2146. pDecInfo->vbFbcCTbl[fbcCurFrameIdx].phys_addr = 0;
  2147. pDecInfo->vbFbcCTbl[fbcCurFrameIdx].size = ((size+4095)&~4095)+4096;
  2148. if (vdi_allocate_dma_memory(pCodecInst->coreIdx, &pDecInfo->vbFbcCTbl[fbcCurFrameIdx]) < 0)
  2149. return RETCODE_INSUFFICIENT_RESOURCE;
  2150. }
  2151. break;
  2152. default:
  2153. return RETCODE_INVALID_COMMAND;
  2154. }
  2155. return ret;
  2156. }
  2157. RetCode VPU_DecAllocateFrameBuffer(DecHandle handle, FrameBufferAllocInfo info, FrameBuffer *frameBuffer)
  2158. {
  2159. CodecInst* pCodecInst;
  2160. DecInfo* pDecInfo;
  2161. RetCode ret;
  2162. Uint32 gdiIndex;
  2163. ret = CheckDecInstanceValidity(handle);
  2164. if (ret != RETCODE_SUCCESS)
  2165. return ret;
  2166. pCodecInst = handle;
  2167. pDecInfo = &pCodecInst->CodecInfo->decInfo;
  2168. if (!frameBuffer) {
  2169. return RETCODE_INVALID_PARAM;
  2170. }
  2171. if (info.type == FB_TYPE_PPU) {
  2172. if (pDecInfo->numFrameBuffers == 0)
  2173. return RETCODE_WRONG_CALL_SEQUENCE;
  2174. if (frameBuffer[0].updateFbInfo == TRUE) {
  2175. pDecInfo->ppuAllocExt = TRUE;
  2176. }
  2177. pDecInfo->ppuAllocExt = frameBuffer[0].updateFbInfo;
  2178. gdiIndex = pDecInfo->numFbsForDecoding;
  2179. ret = ProductVpuAllocateFramebuffer(
  2180. pCodecInst, frameBuffer, (TiledMapType)info.mapType, (Int32)info.num,
  2181. info.stride, info.height, info.format, info.cbcrInterleave, info.nv21, info.endian, &pDecInfo->vbPPU, gdiIndex, FB_TYPE_PPU);
  2182. }
  2183. else if (info.type == FB_TYPE_CODEC) {
  2184. gdiIndex = 0;
  2185. if (frameBuffer[0].updateFbInfo == TRUE) {
  2186. pDecInfo->frameAllocExt = TRUE;
  2187. }
  2188. ret = ProductVpuAllocateFramebuffer(
  2189. pCodecInst, frameBuffer, (TiledMapType)info.mapType, (Int32)info.num,
  2190. info.stride, info.height, info.format, info.cbcrInterleave, info.nv21, info.endian, &pDecInfo->vbFrame, gdiIndex, (FramebufferAllocType)info.type);
  2191. pDecInfo->mapCfg.tiledBaseAddr = pDecInfo->vbFrame.phys_addr;
  2192. }
  2193. return ret;
  2194. }
  2195. RetCode VPU_EncOpen(EncHandle* pHandle, EncOpenParam * pop)
  2196. {
  2197. CodecInst* pCodecInst;
  2198. EncInfo* pEncInfo;
  2199. RetCode ret;
  2200. if ((ret=ProductCheckEncOpenParam(pop)) != RETCODE_SUCCESS)
  2201. return ret;
  2202. EnterLock(pop->coreIdx);
  2203. if (VPU_IsInit(pop->coreIdx) == 0) {
  2204. LeaveLock(pop->coreIdx);
  2205. return RETCODE_NOT_INITIALIZED;
  2206. }
  2207. ret = GetCodecInstance(pop->coreIdx, &pCodecInst);
  2208. if (ret == RETCODE_FAILURE) {
  2209. *pHandle = 0;
  2210. LeaveLock(pop->coreIdx);
  2211. return RETCODE_FAILURE;
  2212. }
  2213. pCodecInst->isDecoder = FALSE;
  2214. *pHandle = pCodecInst;
  2215. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2216. osal_memset(pEncInfo, 0x00, sizeof(EncInfo));
  2217. pEncInfo->openParam = *pop;
  2218. SetClockGate(pop->coreIdx, TRUE);
  2219. if ((ret=ProductVpuEncBuildUpOpenParam(pCodecInst, pop)) != RETCODE_SUCCESS) {
  2220. *pHandle = 0;
  2221. }
  2222. SetClockGate(pop->coreIdx, FALSE);
  2223. LeaveLock(pCodecInst->coreIdx);
  2224. return ret;
  2225. }
  2226. RetCode VPU_EncClose(EncHandle handle)
  2227. {
  2228. CodecInst* pCodecInst;
  2229. EncInfo* pEncInfo;
  2230. RetCode ret;
  2231. ret = CheckEncInstanceValidity(handle);
  2232. if (ret != RETCODE_SUCCESS)
  2233. return ret;
  2234. pCodecInst = handle;
  2235. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2236. EnterLock(pCodecInst->coreIdx);
  2237. if (pEncInfo->initialInfoObtained) {
  2238. VpuWriteReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr, pEncInfo->streamWrPtr);
  2239. VpuWriteReg(pCodecInst->coreIdx, pEncInfo->streamRdPtrRegAddr, pEncInfo->streamRdPtr);
  2240. if ((ret=ProductVpuEncFiniSeq(pCodecInst)) != RETCODE_SUCCESS) {
  2241. if (pCodecInst->loggingEnable)
  2242. vdi_log(pCodecInst->coreIdx, ENC_SEQ_END, 0);
  2243. }
  2244. if (pCodecInst->loggingEnable)
  2245. vdi_log(pCodecInst->coreIdx, ENC_SEQ_END, 0);
  2246. pEncInfo->streamWrPtr = VpuReadReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr);
  2247. }
  2248. if (pEncInfo->vbScratch.size) {
  2249. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbScratch);
  2250. }
  2251. if (pEncInfo->vbWork.size) {
  2252. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbWork);
  2253. }
  2254. if (pEncInfo->vbFrame.size) {
  2255. if (pEncInfo->frameAllocExt == 0)
  2256. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbFrame);
  2257. }
  2258. if (pCodecInst->codecMode == HEVC_ENC) {
  2259. if (pEncInfo->vbSubSamBuf.size)
  2260. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbSubSamBuf);
  2261. if (pEncInfo->vbMV.size)
  2262. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbMV);
  2263. if (pEncInfo->vbFbcYTbl.size)
  2264. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbFbcYTbl);
  2265. if (pEncInfo->vbFbcCTbl.size)
  2266. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbFbcCTbl);
  2267. if (pEncInfo->vbTemp.size)
  2268. vdi_dettach_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbTemp);
  2269. }
  2270. if (pCodecInst->codecMode == C7_AVC_ENC) {
  2271. if (pEncInfo->vbFbcYTbl.size)
  2272. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbFbcYTbl);
  2273. if (pEncInfo->vbFbcCTbl.size)
  2274. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbFbcCTbl);
  2275. }
  2276. if (pEncInfo->vbPPU.size) {
  2277. if (pEncInfo->ppuAllocExt == 0)
  2278. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbPPU);
  2279. }
  2280. if (pEncInfo->vbSubSampFrame.size)
  2281. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbSubSampFrame);
  2282. if (pEncInfo->vbMvcSubSampFrame.size)
  2283. vdi_free_dma_memory(pCodecInst->coreIdx, &pEncInfo->vbMvcSubSampFrame);
  2284. LeaveLock(pCodecInst->coreIdx);
  2285. FreeCodecInstance(pCodecInst);
  2286. return ret;
  2287. }
  2288. RetCode VPU_EncGetInitialInfo(EncHandle handle, EncInitialInfo * info)
  2289. {
  2290. CodecInst* pCodecInst;
  2291. EncInfo* pEncInfo;
  2292. RetCode ret;
  2293. ret = CheckEncInstanceValidity(handle);
  2294. if (ret != RETCODE_SUCCESS)
  2295. return ret;
  2296. if (info == 0) {
  2297. return RETCODE_INVALID_PARAM;
  2298. }
  2299. pCodecInst = handle;
  2300. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2301. EnterLock(pCodecInst->coreIdx);
  2302. if (GetPendingInst(pCodecInst->coreIdx)) {
  2303. LeaveLock(pCodecInst->coreIdx);
  2304. return RETCODE_FRAME_NOT_COMPLETE;
  2305. }
  2306. if ((ret=ProductVpuEncSetup(pCodecInst)) != RETCODE_SUCCESS) {
  2307. LeaveLock(pCodecInst->coreIdx);
  2308. return ret;
  2309. }
  2310. if (pCodecInst->codecMode == AVC_ENC && pCodecInst->codecModeAux == AVC_AUX_MVC)
  2311. info->minFrameBufferCount = 3; // reconstructed frame + 2 reference frame
  2312. else if (pCodecInst->codecMode == C7_AVC_ENC && pCodecInst->codecModeAux == AVC_AUX_MVC)
  2313. info->minFrameBufferCount = 3; // reconstructed frame + 2 reference frame
  2314. else if(pCodecInst->codecMode == HEVC_ENC) {
  2315. info->minFrameBufferCount = pEncInfo->initialInfo.minFrameBufferCount;
  2316. info->minSrcFrameCount = pEncInfo->initialInfo.minSrcFrameCount;
  2317. }
  2318. else
  2319. info->minFrameBufferCount = 2; // reconstructed frame + reference frame
  2320. pEncInfo->initialInfo = *info;
  2321. pEncInfo->initialInfoObtained = TRUE;
  2322. LeaveLock(pCodecInst->coreIdx);
  2323. return RETCODE_SUCCESS;
  2324. }
  2325. RetCode VPU_EncRegisterFrameBuffer(EncHandle handle, FrameBuffer* bufArray, int num, int stride, int height, int mapType)
  2326. {
  2327. CodecInst* pCodecInst;
  2328. EncInfo* pEncInfo;
  2329. Int32 i;
  2330. RetCode ret;
  2331. EncOpenParam* openParam;
  2332. FrameBuffer* fb;
  2333. ret = CheckEncInstanceValidity(handle);
  2334. // FIXME temp
  2335. if (ret != RETCODE_SUCCESS)
  2336. return ret;
  2337. pCodecInst = handle;
  2338. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2339. openParam = &pEncInfo->openParam;
  2340. if (pEncInfo->stride)
  2341. return RETCODE_CALLED_BEFORE;
  2342. if (!pEncInfo->initialInfoObtained)
  2343. return RETCODE_WRONG_CALL_SEQUENCE;
  2344. if (num < pEncInfo->initialInfo.minFrameBufferCount)
  2345. return RETCODE_INSUFFICIENT_FRAME_BUFFERS;
  2346. if (stride == 0 || (stride % 8 != 0) || stride < 0)
  2347. return RETCODE_INVALID_STRIDE;
  2348. if (height == 0 || height < 0)
  2349. return RETCODE_INVALID_PARAM;
  2350. if (openParam->bitstreamFormat == STD_HEVC) {
  2351. if (stride % 32 != 0)
  2352. return RETCODE_INVALID_STRIDE;
  2353. }
  2354. EnterLock(pCodecInst->coreIdx);
  2355. if (GetPendingInst(pCodecInst->coreIdx)) {
  2356. LeaveLock(pCodecInst->coreIdx);
  2357. return RETCODE_FRAME_NOT_COMPLETE;
  2358. }
  2359. pEncInfo->numFrameBuffers = num;
  2360. pEncInfo->stride = stride;
  2361. pEncInfo->frameBufferHeight = height;
  2362. pEncInfo->mapType = mapType;
  2363. pEncInfo->mapCfg.productId = pCodecInst->productId;
  2364. if (bufArray) {
  2365. for(i=0; i<num; i++)
  2366. pEncInfo->frameBufPool[i] = bufArray[i];
  2367. }
  2368. if (pEncInfo->frameAllocExt == FALSE) {
  2369. fb = pEncInfo->frameBufPool;
  2370. if (bufArray) {
  2371. if (bufArray[0].bufCb == (Uint32)-1 && bufArray[0].bufCr == (Uint32)-1) {
  2372. Uint32 size;
  2373. pEncInfo->frameAllocExt = TRUE;
  2374. size = ProductCalculateFrameBufSize(pCodecInst->productId, stride, height,
  2375. (TiledMapType)mapType, (FrameBufferFormat)openParam->srcFormat,
  2376. (BOOL)openParam->cbcrInterleave, NULL);
  2377. if (mapType == LINEAR_FRAME_MAP)
  2378. {
  2379. pEncInfo->vbFrame.phys_addr = bufArray[0].bufY;
  2380. pEncInfo->vbFrame.size = size * num;
  2381. }
  2382. }
  2383. }
  2384. ret = ProductVpuAllocateFramebuffer(
  2385. pCodecInst, fb, (TiledMapType)mapType, num, stride, height, (FrameBufferFormat)openParam->srcFormat,
  2386. openParam->cbcrInterleave, FALSE, openParam->frameEndian, &pEncInfo->vbFrame, 0, FB_TYPE_CODEC);
  2387. if (ret != RETCODE_SUCCESS) {
  2388. SetPendingInst(pCodecInst->coreIdx, 0);
  2389. LeaveLock(pCodecInst->coreIdx);
  2390. return ret;
  2391. }
  2392. }
  2393. ret = ProductVpuRegisterFramebuffer(pCodecInst);
  2394. SetPendingInst(pCodecInst->coreIdx, 0);
  2395. LeaveLock(pCodecInst->coreIdx);
  2396. return ret;
  2397. }
  2398. RetCode VPU_EncGetFrameBuffer(
  2399. EncHandle handle,
  2400. int frameIdx,
  2401. FrameBuffer * frameBuf)
  2402. {
  2403. CodecInst * pCodecInst;
  2404. EncInfo * pEncInfo;
  2405. RetCode ret;
  2406. ret = CheckEncInstanceValidity(handle);
  2407. if (ret != RETCODE_SUCCESS)
  2408. return ret;
  2409. pCodecInst = handle;
  2410. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2411. if (frameIdx<0 || frameIdx>pEncInfo->numFrameBuffers)
  2412. return RETCODE_INVALID_PARAM;
  2413. if (frameBuf==0)
  2414. return RETCODE_INVALID_PARAM;
  2415. *frameBuf = pEncInfo->frameBufPool[frameIdx];
  2416. return RETCODE_SUCCESS;
  2417. }
  2418. RetCode VPU_EncGetBitstreamBuffer( EncHandle handle,
  2419. PhysicalAddress * prdPrt,
  2420. PhysicalAddress * pwrPtr,
  2421. int * size)
  2422. {
  2423. CodecInst * pCodecInst;
  2424. EncInfo * pEncInfo;
  2425. PhysicalAddress rdPtr;
  2426. PhysicalAddress wrPtr;
  2427. Uint32 room;
  2428. RetCode ret;
  2429. ret = CheckEncInstanceValidity(handle);
  2430. if (ret != RETCODE_SUCCESS)
  2431. return ret;
  2432. if ( prdPrt == 0 || pwrPtr == 0 || size == 0) {
  2433. return RETCODE_INVALID_PARAM;
  2434. }
  2435. pCodecInst = handle;
  2436. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2437. rdPtr = pEncInfo->streamRdPtr;
  2438. SetClockGate(pCodecInst->coreIdx, 1);
  2439. if (GetPendingInst(pCodecInst->coreIdx) == pCodecInst)
  2440. wrPtr = VpuReadReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr);
  2441. else
  2442. wrPtr = pEncInfo->streamWrPtr;
  2443. SetClockGate(pCodecInst->coreIdx, 0);
  2444. if(pEncInfo->ringBufferEnable == 1 || pEncInfo->lineBufIntEn == 1) {
  2445. if (wrPtr >= rdPtr) {
  2446. room = wrPtr - rdPtr;
  2447. }
  2448. else {
  2449. room = (pEncInfo->streamBufEndAddr - rdPtr) + (wrPtr - pEncInfo->streamBufStartAddr);
  2450. }
  2451. }
  2452. else {
  2453. if(wrPtr >= rdPtr)
  2454. room = wrPtr - rdPtr;
  2455. else
  2456. return RETCODE_INVALID_PARAM;
  2457. }
  2458. *prdPrt = rdPtr;
  2459. *pwrPtr = wrPtr;
  2460. *size = room;
  2461. return RETCODE_SUCCESS;
  2462. }
  2463. RetCode VPU_EncUpdateBitstreamBuffer(
  2464. EncHandle handle,
  2465. int size)
  2466. {
  2467. CodecInst * pCodecInst;
  2468. EncInfo * pEncInfo;
  2469. PhysicalAddress wrPtr;
  2470. PhysicalAddress rdPtr;
  2471. RetCode ret;
  2472. int room = 0;
  2473. ret = CheckEncInstanceValidity(handle);
  2474. if (ret != RETCODE_SUCCESS)
  2475. return ret;
  2476. pCodecInst = handle;
  2477. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2478. rdPtr = pEncInfo->streamRdPtr;
  2479. SetClockGate(pCodecInst->coreIdx, 1);
  2480. if (GetPendingInst(pCodecInst->coreIdx) == pCodecInst)
  2481. wrPtr = VpuReadReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr);
  2482. else
  2483. wrPtr = pEncInfo->streamWrPtr;
  2484. if ( rdPtr < wrPtr ) {
  2485. if ( rdPtr + size > wrPtr ) {
  2486. SetClockGate(pCodecInst->coreIdx, 0);
  2487. return RETCODE_INVALID_PARAM;
  2488. }
  2489. }
  2490. if (pEncInfo->ringBufferEnable == TRUE || pEncInfo->lineBufIntEn == TRUE) {
  2491. rdPtr += size;
  2492. if (rdPtr > pEncInfo->streamBufEndAddr) {
  2493. if (pEncInfo->lineBufIntEn == TRUE) {
  2494. return RETCODE_INVALID_PARAM;
  2495. }
  2496. room = rdPtr - pEncInfo->streamBufEndAddr;
  2497. rdPtr = pEncInfo->streamBufStartAddr;
  2498. rdPtr += room;
  2499. }
  2500. if (rdPtr == pEncInfo->streamBufEndAddr) {
  2501. rdPtr = pEncInfo->streamBufStartAddr;
  2502. }
  2503. }
  2504. else {
  2505. rdPtr = pEncInfo->streamBufStartAddr;
  2506. }
  2507. pEncInfo->streamRdPtr = rdPtr;
  2508. pEncInfo->streamWrPtr = wrPtr;
  2509. if (GetPendingInst(pCodecInst->coreIdx) == pCodecInst)
  2510. VpuWriteReg(pCodecInst->coreIdx, pEncInfo->streamRdPtrRegAddr, rdPtr);
  2511. if (pEncInfo->lineBufIntEn == TRUE) {
  2512. pEncInfo->streamRdPtr = pEncInfo->streamBufStartAddr;
  2513. }
  2514. SetClockGate(pCodecInst->coreIdx, 0);
  2515. return RETCODE_SUCCESS;
  2516. }
  2517. RetCode VPU_EncStartOneFrame(
  2518. EncHandle handle,
  2519. EncParam * param
  2520. )
  2521. {
  2522. CodecInst* pCodecInst;
  2523. EncInfo* pEncInfo;
  2524. RetCode ret;
  2525. VpuAttr* pAttr = NULL;
  2526. vpu_instance_pool_t* vip;
  2527. ret = CheckEncInstanceValidity(handle);
  2528. if (ret != RETCODE_SUCCESS)
  2529. return ret;
  2530. pCodecInst = handle;
  2531. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2532. vip = (vpu_instance_pool_t *)vdi_get_instance_pool(pCodecInst->coreIdx);
  2533. if (!vip) {
  2534. return RETCODE_INVALID_HANDLE;
  2535. }
  2536. if (pEncInfo->stride == 0) { // This means frame buffers have not been registered.
  2537. return RETCODE_WRONG_CALL_SEQUENCE;
  2538. }
  2539. ret = CheckEncParam(handle, param);
  2540. if (ret != RETCODE_SUCCESS) {
  2541. return ret;
  2542. }
  2543. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  2544. EnterLock(pCodecInst->coreIdx);
  2545. pEncInfo->ptsMap[param->srcIdx] = (pEncInfo->openParam.enablePTS == TRUE) ? GetTimestamp(handle) : param->pts;
  2546. if (GetPendingInst(pCodecInst->coreIdx)) {
  2547. LeaveLock(pCodecInst->coreIdx);
  2548. return RETCODE_FRAME_NOT_COMPLETE;
  2549. }
  2550. ret = ProductVpuEncode(pCodecInst, param);
  2551. if (pAttr->supportCommandQueue == TRUE) {
  2552. SetPendingInst(pCodecInst->coreIdx, NULL);
  2553. LeaveLock(pCodecInst->coreIdx);
  2554. }
  2555. else {
  2556. SetPendingInst(pCodecInst->coreIdx, pCodecInst);
  2557. }
  2558. return ret;
  2559. }
  2560. RetCode VPU_EncGetOutputInfo(
  2561. EncHandle handle,
  2562. EncOutputInfo* info
  2563. )
  2564. {
  2565. CodecInst* pCodecInst;
  2566. EncInfo* pEncInfo;
  2567. RetCode ret;
  2568. VpuAttr* pAttr;
  2569. ret = CheckEncInstanceValidity(handle);
  2570. if (ret != RETCODE_SUCCESS) {
  2571. return ret;
  2572. }
  2573. if (info == 0) {
  2574. return RETCODE_INVALID_PARAM;
  2575. }
  2576. pCodecInst = handle;
  2577. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2578. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  2579. if (pAttr->supportCommandQueue == TRUE) {
  2580. EnterLock(pCodecInst->coreIdx);
  2581. }
  2582. else {
  2583. if (pCodecInst != GetPendingInst(pCodecInst->coreIdx)) {
  2584. SetPendingInst(pCodecInst->coreIdx, 0);
  2585. LeaveLock(pCodecInst->coreIdx);
  2586. return RETCODE_WRONG_CALL_SEQUENCE;
  2587. }
  2588. }
  2589. ret = ProductVpuEncGetResult(pCodecInst, info);
  2590. if (ret == RETCODE_SUCCESS) {
  2591. info->pts = pEncInfo->ptsMap[info->encSrcIdx];
  2592. }
  2593. else {
  2594. info->pts = 0LL;
  2595. }
  2596. SetPendingInst(pCodecInst->coreIdx, 0);
  2597. LeaveLock(pCodecInst->coreIdx);
  2598. return ret;
  2599. }
  2600. RetCode VPU_EncGiveCommand(
  2601. EncHandle handle,
  2602. CodecCommand cmd,
  2603. void* param
  2604. )
  2605. {
  2606. CodecInst* pCodecInst;
  2607. EncInfo* pEncInfo;
  2608. RetCode ret;
  2609. ret = CheckEncInstanceValidity(handle);
  2610. if (ret != RETCODE_SUCCESS) {
  2611. return ret;
  2612. }
  2613. pCodecInst = handle;
  2614. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2615. switch (cmd)
  2616. {
  2617. case ENABLE_ROTATION :
  2618. {
  2619. pEncInfo->rotationEnable = 1;
  2620. }
  2621. break;
  2622. case DISABLE_ROTATION :
  2623. {
  2624. pEncInfo->rotationEnable = 0;
  2625. }
  2626. break;
  2627. case ENABLE_MIRRORING :
  2628. {
  2629. pEncInfo->mirrorEnable = 1;
  2630. }
  2631. break;
  2632. case DISABLE_MIRRORING :
  2633. {
  2634. pEncInfo->mirrorEnable = 0;
  2635. }
  2636. break;
  2637. case SET_MIRROR_DIRECTION :
  2638. {
  2639. MirrorDirection mirDir;
  2640. if (param == 0) {
  2641. return RETCODE_INVALID_PARAM;
  2642. }
  2643. mirDir = *(MirrorDirection *)param;
  2644. if ( !(mirDir == MIRDIR_NONE) && !(mirDir==MIRDIR_HOR) && !(mirDir==MIRDIR_VER) && !(mirDir==MIRDIR_HOR_VER)) {
  2645. return RETCODE_INVALID_PARAM;
  2646. }
  2647. pEncInfo->mirrorDirection = mirDir;
  2648. }
  2649. break;
  2650. case SET_ROTATION_ANGLE :
  2651. {
  2652. int angle;
  2653. if (param == 0) {
  2654. return RETCODE_INVALID_PARAM;
  2655. }
  2656. angle = *(int *)param;
  2657. if (angle != 0 && angle != 90 &&
  2658. angle != 180 && angle != 270) {
  2659. return RETCODE_INVALID_PARAM;
  2660. }
  2661. if (pEncInfo->initialInfoObtained && (angle == 90 || angle ==270)) {
  2662. return RETCODE_INVALID_PARAM;
  2663. }
  2664. pEncInfo->rotationAngle = angle;
  2665. }
  2666. break;
  2667. case SET_CACHE_CONFIG:
  2668. {
  2669. MaverickCacheConfig *mcCacheConfig;
  2670. if (param == 0) {
  2671. return RETCODE_INVALID_PARAM;
  2672. }
  2673. mcCacheConfig = (MaverickCacheConfig *)param;
  2674. pEncInfo->cacheConfig = *mcCacheConfig;
  2675. }
  2676. break;
  2677. case ENC_PUT_MP4_HEADER:
  2678. case ENC_PUT_AVC_HEADER:
  2679. case ENC_PUT_VIDEO_HEADER:
  2680. {
  2681. EncHeaderParam *encHeaderParam;
  2682. if (param == 0) {
  2683. return RETCODE_INVALID_PARAM;
  2684. }
  2685. encHeaderParam = (EncHeaderParam *)param;
  2686. if (pCodecInst->codecMode == MP4_ENC || pCodecInst->codecMode == C7_MP4_ENC ) {
  2687. if (!( VOL_HEADER<=encHeaderParam->headerType && encHeaderParam->headerType <= VIS_HEADER)) {
  2688. return RETCODE_INVALID_PARAM;
  2689. }
  2690. }
  2691. else if (pCodecInst->codecMode == AVC_ENC || pCodecInst->codecMode == C7_AVC_ENC) {
  2692. if (!( SPS_RBSP<=encHeaderParam->headerType && encHeaderParam->headerType <= SVC_RBSP_SEI)) {
  2693. return RETCODE_INVALID_PARAM;
  2694. }
  2695. }
  2696. else if (pCodecInst->codecMode == HEVC_ENC) {
  2697. if (!( CODEOPT_ENC_VPS<=encHeaderParam->headerType && encHeaderParam->headerType <= (CODEOPT_ENC_VPS|CODEOPT_ENC_SPS|CODEOPT_ENC_PPS))) {
  2698. return RETCODE_INVALID_PARAM;
  2699. }
  2700. if (pEncInfo->ringBufferEnable == 0 ) {
  2701. if (encHeaderParam->buf % 16 || encHeaderParam->size == 0)
  2702. return RETCODE_INVALID_PARAM;
  2703. }
  2704. if (encHeaderParam->headerType & CODEOPT_ENC_VCL) // ENC_PUT_VIDEO_HEADER encode only non-vcl header.
  2705. return RETCODE_INVALID_PARAM;
  2706. }
  2707. else
  2708. return RETCODE_INVALID_PARAM;
  2709. if (pEncInfo->ringBufferEnable == 0 ) {
  2710. if (encHeaderParam->buf % 8 || encHeaderParam->size == 0) {
  2711. return RETCODE_INVALID_PARAM;
  2712. }
  2713. }
  2714. if (pCodecInst->codecMode == HEVC_ENC) {
  2715. if (handle->productId == PRODUCT_ID_520)
  2716. return Wave5VpuEncGetHeader(handle, encHeaderParam);
  2717. else
  2718. return Wave4VpuEncGetHeader(handle, encHeaderParam);
  2719. }
  2720. else {
  2721. if (handle->productId == PRODUCT_ID_7Q)
  2722. return Coda7qVpuEncGetHeader(handle, encHeaderParam);
  2723. else
  2724. return GetEncHeader(handle, encHeaderParam);
  2725. }
  2726. }
  2727. case ENC_SET_GOP_NUMBER:
  2728. {
  2729. int *pGopNumber =(int *)param;
  2730. if (pCodecInst->codecMode != MP4_ENC && pCodecInst->codecMode != AVC_ENC && pCodecInst->codecMode != C7_MP4_ENC && pCodecInst->codecMode != C7_AVC_ENC ) {
  2731. return RETCODE_INVALID_COMMAND;
  2732. }
  2733. if (*pGopNumber < 0)
  2734. return RETCODE_INVALID_PARAM;
  2735. pEncInfo->openParam.gopSize = *pGopNumber;
  2736. SetGopNumber(handle, (Uint32 *)pGopNumber);
  2737. }
  2738. break;
  2739. case ENC_SET_INTRA_QP:
  2740. {
  2741. int *pIntraQp =(int *)param;
  2742. if (pCodecInst->codecMode != MP4_ENC && pCodecInst->codecMode != AVC_ENC && pCodecInst->codecMode != C7_MP4_ENC && pCodecInst->codecMode != C7_AVC_ENC) {
  2743. return RETCODE_INVALID_COMMAND;
  2744. }
  2745. if (pCodecInst->codecMode == MP4_ENC || pCodecInst->codecMode == C7_MP4_ENC)
  2746. {
  2747. if(*pIntraQp<1 || *pIntraQp>31)
  2748. return RETCODE_INVALID_PARAM;
  2749. }
  2750. if (pCodecInst->codecMode == AVC_ENC || pCodecInst->codecMode == C7_AVC_ENC)
  2751. {
  2752. if(*pIntraQp<0 || *pIntraQp>51)
  2753. return RETCODE_INVALID_PARAM;
  2754. }
  2755. SetIntraQp(handle, (Uint32 *)pIntraQp);
  2756. }
  2757. break;
  2758. case ENC_SET_BITRATE:
  2759. {
  2760. int *pBitrate = (int *)param;
  2761. if (pCodecInst->codecMode != MP4_ENC && pCodecInst->codecMode != AVC_ENC && pCodecInst->codecMode != C7_MP4_ENC && pCodecInst->codecMode != C7_AVC_ENC) {
  2762. return RETCODE_INVALID_COMMAND;
  2763. }
  2764. {
  2765. if (*pBitrate < 0 || *pBitrate> 32767) {
  2766. return RETCODE_INVALID_PARAM;
  2767. }
  2768. }
  2769. SetBitrate(handle, (Uint32 *)pBitrate);
  2770. }
  2771. break;
  2772. case ENC_SET_FRAME_RATE:
  2773. {
  2774. int *pFramerate = (int *)param;
  2775. if (pCodecInst->codecMode != MP4_ENC && pCodecInst->codecMode != AVC_ENC && pCodecInst->codecMode != C7_MP4_ENC && pCodecInst->codecMode != C7_AVC_ENC) {
  2776. return RETCODE_INVALID_COMMAND;
  2777. }
  2778. if (*pFramerate <= 0) {
  2779. return RETCODE_INVALID_PARAM;
  2780. }
  2781. SetFramerate(handle, (Uint32 *)pFramerate);
  2782. }
  2783. break;
  2784. case ENC_SET_INTRA_MB_REFRESH_NUMBER:
  2785. {
  2786. int *pIntraRefreshNum =(int *)param;
  2787. SetIntraRefreshNum(handle, (Uint32 *)pIntraRefreshNum);
  2788. }
  2789. break;
  2790. case ENC_SET_SLICE_INFO:
  2791. {
  2792. EncSliceMode *pSliceMode = (EncSliceMode *)param;
  2793. if(pSliceMode->sliceMode<0 || pSliceMode->sliceMode>1)
  2794. {
  2795. return RETCODE_INVALID_PARAM;
  2796. }
  2797. if(pSliceMode->sliceSizeMode<0 || pSliceMode->sliceSizeMode>1)
  2798. {
  2799. return RETCODE_INVALID_PARAM;
  2800. }
  2801. SetSliceMode(handle, (EncSliceMode *)pSliceMode);
  2802. }
  2803. break;
  2804. case ENC_ENABLE_HEC:
  2805. {
  2806. if (pCodecInst->codecMode != MP4_ENC && pCodecInst->codecMode != C7_MP4_ENC) {
  2807. return RETCODE_INVALID_COMMAND;
  2808. }
  2809. SetHecMode(handle, 1);
  2810. }
  2811. break;
  2812. case ENC_DISABLE_HEC:
  2813. {
  2814. if (pCodecInst->codecMode != MP4_ENC && pCodecInst->codecMode != C7_MP4_ENC) {
  2815. return RETCODE_INVALID_COMMAND;
  2816. }
  2817. SetHecMode(handle, 0);
  2818. }
  2819. break;
  2820. case SET_SEC_AXI:
  2821. {
  2822. SecAxiUse secAxiUse;
  2823. if (param == 0) {
  2824. return RETCODE_INVALID_PARAM;
  2825. }
  2826. secAxiUse = *(SecAxiUse *)param;
  2827. if (handle->productId == PRODUCT_ID_410 || handle->productId == PRODUCT_ID_4102 || handle->productId == PRODUCT_ID_420 ||
  2828. handle->productId == PRODUCT_ID_412 || handle->productId == PRODUCT_ID_420L || handle->productId == PRODUCT_ID_510 ||
  2829. handle->productId == PRODUCT_ID_512 || handle->productId == PRODUCT_ID_515) {
  2830. if (handle->codecMode == HEVC_DEC) {
  2831. pEncInfo->secAxiInfo.u.wave4.useIpEnable = secAxiUse.u.wave4.useIpEnable;
  2832. pEncInfo->secAxiInfo.u.wave4.useLfRowEnable = secAxiUse.u.wave4.useLfRowEnable;
  2833. pEncInfo->secAxiInfo.u.wave4.useBitEnable = secAxiUse.u.wave4.useBitEnable;
  2834. }
  2835. else {
  2836. pEncInfo->secAxiInfo.u.wave4.useEncImdEnable = secAxiUse.u.wave4.useEncImdEnable;
  2837. pEncInfo->secAxiInfo.u.wave4.useEncRdoEnable = secAxiUse.u.wave4.useEncRdoEnable;
  2838. pEncInfo->secAxiInfo.u.wave4.useEncLfEnable = secAxiUse.u.wave4.useEncLfEnable;
  2839. }
  2840. }
  2841. else if (handle->productId == PRODUCT_ID_520) {
  2842. pEncInfo->secAxiInfo.u.wave4.useEncRdoEnable = secAxiUse.u.wave4.useEncRdoEnable;
  2843. pEncInfo->secAxiInfo.u.wave4.useEncLfEnable = secAxiUse.u.wave4.useEncLfEnable;
  2844. }
  2845. else { // coda9 or coda7q or ...
  2846. pEncInfo->secAxiInfo.u.coda9.useBitEnable = secAxiUse.u.coda9.useBitEnable;
  2847. pEncInfo->secAxiInfo.u.coda9.useIpEnable = secAxiUse.u.coda9.useIpEnable;
  2848. pEncInfo->secAxiInfo.u.coda9.useDbkYEnable = secAxiUse.u.coda9.useDbkYEnable;
  2849. pEncInfo->secAxiInfo.u.coda9.useDbkCEnable = secAxiUse.u.coda9.useDbkCEnable;
  2850. pEncInfo->secAxiInfo.u.coda9.useOvlEnable = secAxiUse.u.coda9.useOvlEnable;
  2851. pEncInfo->secAxiInfo.u.coda9.useBtpEnable = secAxiUse.u.coda9.useBtpEnable;
  2852. }
  2853. }
  2854. break;
  2855. case GET_TILEDMAP_CONFIG:
  2856. {
  2857. TiledMapConfig *pMapCfg = (TiledMapConfig *)param;
  2858. if (!pMapCfg) {
  2859. return RETCODE_INVALID_PARAM;
  2860. }
  2861. *pMapCfg = pEncInfo->mapCfg;
  2862. break;
  2863. }
  2864. case SET_DRAM_CONFIG:
  2865. {
  2866. DRAMConfig *cfg = (DRAMConfig *)param;
  2867. if (!cfg) {
  2868. return RETCODE_INVALID_PARAM;
  2869. }
  2870. pEncInfo->dramCfg = *cfg;
  2871. break;
  2872. }
  2873. case GET_DRAM_CONFIG:
  2874. {
  2875. DRAMConfig *cfg = (DRAMConfig *)param;
  2876. if (!cfg) {
  2877. return RETCODE_INVALID_PARAM;
  2878. }
  2879. *cfg = pEncInfo->dramCfg;
  2880. break;
  2881. }
  2882. case ENABLE_LOGGING:
  2883. {
  2884. pCodecInst->loggingEnable = 1;
  2885. }
  2886. break;
  2887. case DISABLE_LOGGING:
  2888. {
  2889. pCodecInst->loggingEnable = 0;
  2890. }
  2891. break;
  2892. case ENC_SET_PARA_CHANGE:
  2893. {
  2894. EncChangeParam* option = (EncChangeParam*)param;
  2895. if (handle->productId == PRODUCT_ID_520)
  2896. return Wave5VpuEncParaChange(handle, option);
  2897. else
  2898. return Wave4VpuEncParaChange(handle, option);
  2899. }
  2900. break;
  2901. case ENC_SET_SEI_NAL_DATA:
  2902. {
  2903. HevcSEIDataEnc* option = (HevcSEIDataEnc*)param;
  2904. pEncInfo->prefixSeiNalEnable = option->prefixSeiNalEnable;
  2905. pEncInfo->prefixSeiDataSize = option->prefixSeiDataSize;
  2906. pEncInfo->prefixSeiDataEncOrder = option->prefixSeiDataEncOrder;
  2907. pEncInfo->prefixSeiNalAddr = option->prefixSeiNalAddr;
  2908. pEncInfo->suffixSeiNalEnable = option->suffixSeiNalEnable;
  2909. pEncInfo->suffixSeiDataSize = option->suffixSeiDataSize;
  2910. pEncInfo->suffixSeiDataEncOrder = option->suffixSeiDataEncOrder;
  2911. pEncInfo->suffixSeiNalAddr = option->suffixSeiNalAddr;
  2912. }
  2913. break;
  2914. #ifdef SUPPORT_W5ENC_BW_REPORT
  2915. case ENC_GET_BW_REPORT :
  2916. {
  2917. EncBwMonitor *encBwMon;
  2918. if (param == 0) {
  2919. return RETCODE_INVALID_PARAM;
  2920. }
  2921. if (handle->productId != PRODUCT_ID_520)
  2922. return RETCODE_INVALID_COMMAND;
  2923. encBwMon = (EncBwMonitor *)param;
  2924. return Wave5VpuEncGetBwReport(handle, encBwMon);
  2925. }
  2926. break;
  2927. #endif
  2928. default:
  2929. return RETCODE_INVALID_COMMAND;
  2930. }
  2931. return RETCODE_SUCCESS;
  2932. }
  2933. RetCode VPU_EncAllocateFrameBuffer(EncHandle handle, FrameBufferAllocInfo info, FrameBuffer *frameBuffer)
  2934. {
  2935. CodecInst* pCodecInst;
  2936. EncInfo* pEncInfo;
  2937. RetCode ret;
  2938. int gdiIndex;
  2939. ret = CheckEncInstanceValidity(handle);
  2940. if (ret != RETCODE_SUCCESS)
  2941. return ret;
  2942. pCodecInst = handle;
  2943. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  2944. if (!frameBuffer) {
  2945. return RETCODE_INVALID_PARAM;
  2946. }
  2947. if (info.num == 0 || info.num < 0) {
  2948. return RETCODE_INVALID_PARAM;
  2949. }
  2950. if (info.stride == 0 || info.stride < 0) {
  2951. return RETCODE_INVALID_PARAM;
  2952. }
  2953. if (info.height == 0 || info.height < 0) {
  2954. return RETCODE_INVALID_PARAM;
  2955. }
  2956. if (info.type == FB_TYPE_PPU) {
  2957. if (pEncInfo->numFrameBuffers == 0) {
  2958. return RETCODE_WRONG_CALL_SEQUENCE;
  2959. }
  2960. pEncInfo->ppuAllocExt = frameBuffer[0].updateFbInfo;
  2961. gdiIndex = pEncInfo->numFrameBuffers;
  2962. ret = ProductVpuAllocateFramebuffer(pCodecInst, frameBuffer, (TiledMapType)info.mapType, (Int32)info.num,
  2963. info.stride, info.height, info.format, info.cbcrInterleave, info.nv21,
  2964. info.endian, &pEncInfo->vbPPU, gdiIndex, (FramebufferAllocType)info.type);
  2965. }
  2966. else if (info.type == FB_TYPE_CODEC) {
  2967. gdiIndex = 0;
  2968. pEncInfo->frameAllocExt = frameBuffer[0].updateFbInfo;
  2969. ret = ProductVpuAllocateFramebuffer(
  2970. pCodecInst, frameBuffer, (TiledMapType)info.mapType, (Int32)info.num,
  2971. info.stride, info.height, info.format, info.cbcrInterleave, FALSE, info.endian, &pEncInfo->vbFrame, gdiIndex, (FramebufferAllocType)info.type);
  2972. }
  2973. else {
  2974. ret = RETCODE_INVALID_PARAM;
  2975. }
  2976. return ret;
  2977. }
  2978. RetCode VPU_EncIssueSeqInit(EncHandle handle)
  2979. {
  2980. CodecInst* pCodecInst;
  2981. RetCode ret;
  2982. VpuAttr* pAttr;
  2983. ret = CheckEncInstanceValidity(handle);
  2984. if (ret != RETCODE_SUCCESS)
  2985. return ret;
  2986. pCodecInst = handle;
  2987. EnterLock(pCodecInst->coreIdx);
  2988. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  2989. if (GetPendingInst(pCodecInst->coreIdx)) {
  2990. LeaveLock(pCodecInst->coreIdx);
  2991. return RETCODE_FRAME_NOT_COMPLETE;
  2992. }
  2993. ret = ProductVpuEncInitSeq(handle);
  2994. if (ret == RETCODE_SUCCESS) {
  2995. SetPendingInst(pCodecInst->coreIdx, pCodecInst);
  2996. }
  2997. if (pAttr->supportCommandQueue == TRUE) {
  2998. SetPendingInst(pCodecInst->coreIdx, NULL);
  2999. LeaveLock(pCodecInst->coreIdx);
  3000. }
  3001. return ret;
  3002. }
  3003. RetCode VPU_EncCompleteSeqInit(EncHandle handle, EncInitialInfo * info)
  3004. {
  3005. CodecInst* pCodecInst;
  3006. EncInfo* pEncInfo;
  3007. RetCode ret;
  3008. VpuAttr* pAttr;
  3009. ret = CheckEncInstanceValidity(handle);
  3010. if (ret != RETCODE_SUCCESS) {
  3011. return ret;
  3012. }
  3013. if (info == 0) {
  3014. return RETCODE_INVALID_PARAM;
  3015. }
  3016. pCodecInst = handle;
  3017. pEncInfo = &pCodecInst->CodecInfo->encInfo;
  3018. pAttr = &g_VpuCoreAttributes[pCodecInst->coreIdx];
  3019. if (pAttr->supportCommandQueue == TRUE) {
  3020. EnterLock(pCodecInst->coreIdx);
  3021. }
  3022. else {
  3023. if (pCodecInst != GetPendingInst(pCodecInst->coreIdx)) {
  3024. SetPendingInst(pCodecInst->coreIdx, 0);
  3025. LeaveLock(pCodecInst->coreIdx);
  3026. return RETCODE_WRONG_CALL_SEQUENCE;
  3027. }
  3028. }
  3029. ret = ProductVpuEncGetSeqInfo(handle, info);
  3030. if (ret == RETCODE_SUCCESS) {
  3031. pEncInfo->initialInfoObtained = 1;
  3032. }
  3033. //info->rdPtr = VpuReadReg(pCodecInst->coreIdx, pEncInfo->streamRdPtrRegAddr);
  3034. //info->wrPtr = VpuReadReg(pCodecInst->coreIdx, pEncInfo->streamWrPtrRegAddr);
  3035. //pEncInfo->prevFrameEndPos = info->rdPtr;
  3036. pEncInfo->initialInfo = *info;
  3037. SetPendingInst(pCodecInst->coreIdx, NULL);
  3038. LeaveLock(pCodecInst->coreIdx);
  3039. return ret;
  3040. }