vpuerror.h 13 KB

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  1. //SPDX-License-Identifier: LGPL-2.1 OR BSD-3-Clause
  2. /*
  3. * Copyright (c) 2019, Chips&Media
  4. * All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions are met:
  8. *
  9. * 1. Redistributions of source code must retain the above copyright notice, this
  10. * list of conditions and the following disclaimer.
  11. * 2. Redistributions in binary form must reproduce the above copyright notice,
  12. * this list of conditions and the following disclaimer in the documentation
  13. * and/or other materials provided with the distribution.
  14. *
  15. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  16. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  17. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  18. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
  19. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  20. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  21. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  22. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  23. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  24. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25. */
  26. #ifndef ERROR_CODE_H_INCLUDED
  27. #define ERROR_CODE_H_INCLUDED
  28. /*
  29. * WAVE5
  30. */
  31. /************************************************************************/
  32. /* WAVE5 SYSTEM ERROR (FAIL_REASON) */
  33. /************************************************************************/
  34. #define WAVE5_QUEUEING_FAIL 0x00000001
  35. #define WAVE5_SYSERR_ACCESS_VIOLATION_HW 0x00000040
  36. #define WAVE5_RESULT_NOT_READY 0x00000800
  37. #define WAVE5_VPU_STILL_RUNNING 0x00001000
  38. #define WAVE5_INSTANCE_DESTROYED 0x00004000
  39. #define WAVE5_SYSERR_DEC_VLC_BUF_FULL 0x00010000
  40. #define WAVE5_SYSERR_WATCHDOG_TIMEOUT 0x00020000
  41. #define WAVE5_ERROR_FW_FATAL 0x00200000
  42. /************************************************************************/
  43. /* WAVE5 ERROR ON ENCODER (ERR_INFO) */
  44. /************************************************************************/
  45. #define WAVE5_SYSERR_ENC_VLC_BUF_FULL 0x00000100
  46. /************************************************************************/
  47. /* WAVE5 ERROR ON DECODER (ERR_INFO) */
  48. /************************************************************************/
  49. #define WAVE5_SPSERR_SEQ_PARAMETER_SET_ID 0x00001000
  50. #define WAVE5_SPSERR_CHROMA_FORMAT_IDC 0x00001001
  51. #define WAVE5_SPSERR_PIC_WIDTH_IN_LUMA_SAMPLES 0x00001002
  52. #define WAVE5_SPSERR_PIC_HEIGHT_IN_LUMA_SAMPLES 0x00001003
  53. #define WAVE5_SPSERR_CONF_WIN_LEFT_OFFSET 0x00001004
  54. #define WAVE5_SPSERR_CONF_WIN_RIGHT_OFFSET 0x00001005
  55. #define WAVE5_SPSERR_CONF_WIN_TOP_OFFSET 0x00001006
  56. #define WAVE5_SPSERR_CONF_WIN_BOTTOM_OFFSET 0x00001007
  57. #define WAVE5_SPSERR_BIT_DEPTH_LUMA_MINUS8 0x00001008
  58. #define WAVE5_SPSERR_BIT_DEPTH_CHROMA_MINUS8 0x00001009
  59. #define WAVE5_SPSERR_LOG2_MAX_PIC_ORDER_CNT_LSB_MINUS4 0x0000100A
  60. #define WAVE5_SPSERR_SPS_MAX_DEC_PIC_BUFFERING 0x0000100B
  61. #define WAVE5_SPSERR_SPS_MAX_NUM_REORDER_PICS 0x0000100C
  62. #define WAVE5_SPSERR_SPS_MAX_LATENCY_INCREASE 0x0000100D
  63. #define WAVE5_SPSERR_LOG2_MIN_LUMA_CODING_BLOCK_SIZE_MINUS3 0x0000100E
  64. #define WAVE5_SPSERR_LOG2_DIFF_MAX_MIN_LUMA_CODING_BLOCK_SIZE 0x0000100F
  65. #define WAVE5_SPSERR_LOG2_MIN_TRANSFORM_BLOCK_SIZE_MINUS2 0x00001010
  66. #define WAVE5_SPSERR_LOG2_DIFF_MAX_MIN_TRANSFORM_BLOCK_SIZE 0x00001011
  67. #define WAVE5_SPSERR_MAX_TRANSFORM_HIERARCHY_DEPTH_INTER 0x00001012
  68. #define WAVE5_SPSERR_MAX_TRANSFORM_HIERARCHY_DEPTH_INTRA 0x00001013
  69. #define WAVE5_SPSERR_SCALING_LIST 0x00001014
  70. #define WAVE5_SPSERR_LOG2_DIFF_MIN_PCM_LUMA_CODING_BLOCK_SIZE_MINUS3 0x00001015
  71. #define WAVE5_SPSERR_LOG2_DIFF_MAX_MIN_PCM_LUMA_CODING_BLOCK_SIZE 0x00001016
  72. #define WAVE5_SPSERR_NUM_SHORT_TERM_REF_PIC_SETS 0x00001017
  73. #define WAVE5_SPSERR_NUM_LONG_TERM_REF_PICS_SPS 0x00001018
  74. #define WAVE5_SPSERR_GBU_PARSING_ERROR 0x00001019
  75. #define WAVE5_SPSERR_RANGE_EXTENSION_FLAG 0x0000101A
  76. #define WAVE5_SPSERR_VUI_ERROR 0x0000101B
  77. #define WAVE5_SPSERR_ACTIVATE_SPS 0x0000101C
  78. #define WAVE5_PPSERR_PPS_PIC_PARAMETER_SET_ID 0x00002000
  79. #define WAVE5_PPSERR_PPS_SEQ_PARAMETER_SET_ID 0x00002001
  80. #define WAVE5_PPSERR_NUM_REF_IDX_L0_DEFAULT_ACTIVE_MINUS1 0x00002002
  81. #define WAVE5_PPSERR_NUM_REF_IDX_L1_DEFAULT_ACTIVE_MINUS1 0x00002003
  82. #define WAVE5_PPSERR_INIT_QP_MINUS26 0x00002004
  83. #define WAVE5_PPSERR_DIFF_CU_QP_DELTA_DEPTH 0x00002005
  84. #define WAVE5_PPSERR_PPS_CB_QP_OFFSET 0x00002006
  85. #define WAVE5_PPSERR_PPS_CR_QP_OFFSET 0x00002007
  86. #define WAVE5_PPSERR_NUM_TILE_COLUMNS_MINUS1 0x00002008
  87. #define WAVE5_PPSERR_NUM_TILE_ROWS_MINUS1 0x00002009
  88. #define WAVE5_PPSERR_COLUMN_WIDTH_MINUS1 0x0000200A
  89. #define WAVE5_PPSERR_ROW_HEIGHT_MINUS1 0x0000200B
  90. #define WAVE5_PPSERR_PPS_BETA_OFFSET_DIV2 0x0000200C
  91. #define WAVE5_PPSERR_PPS_TC_OFFSET_DIV2 0x0000200D
  92. #define WAVE5_PPSERR_SCALING_LIST 0x0000200E
  93. #define WAVE5_PPSERR_LOG2_PARALLEL_MERGE_LEVEL_MINUS2 0x0000200F
  94. #define WAVE5_PPSERR_NUM_TILE_COLUMNS_RANGE_OUT 0x00002010
  95. #define WAVE5_PPSERR_NUM_TILE_ROWS_RANGE_OUT 0x00002011
  96. #define WAVE5_PPSERR_MORE_RBSP_DATA_ERROR 0x00002012
  97. #define WAVE5_PPSERR_PPS_PIC_PARAMETER_SET_ID_RANGE_OUT 0x00002013
  98. #define WAVE5_PPSERR_PPS_SEQ_PARAMETER_SET_ID_RANGE_OUT 0x00002014
  99. #define WAVE5_PPSERR_NUM_REF_IDX_L0_DEFAULT_ACTIVE_MINUS1_RANGE_OUT 0x00002015
  100. #define WAVE5_PPSERR_NUM_REF_IDX_L1_DEFAULT_ACTIVE_MINUS1_RANGE_OUT 0x00002016
  101. #define WAVE5_PPSERR_PPS_CB_QP_OFFSET_RANGE_OUT 0x00002017
  102. #define WAVE5_PPSERR_PPS_CR_QP_OFFSET_RANGE_OUT 0x00002018
  103. #define WAVE5_PPSERR_COLUMN_WIDTH_MINUS1_RANGE_OUT 0x00002019
  104. #define WAVE5_PPSERR_ROW_HEIGHT_MINUS1_RANGE_OUT 0x00002020
  105. #define WAVE5_PPSERR_PPS_BETA_OFFSET_DIV2_RANGE_OUT 0x00002021
  106. #define WAVE5_PPSERR_PPS_TC_OFFSET_DIV2_RANGE_OUT 0x00002022
  107. #define WAVE5_SHERR_SLICE_PIC_PARAMETER_SET_ID 0x00003000
  108. #define WAVE5_SHERR_ACTIVATE_PPS 0x00003001
  109. #define WAVE5_SHERR_ACTIVATE_SPS 0x00003002
  110. #define WAVE5_SHERR_SLICE_TYPE 0x00003003
  111. #define WAVE5_SHERR_FIRST_SLICE_IS_DEPENDENT_SLICE 0x00003004
  112. #define WAVE5_SHERR_SHORT_TERM_REF_PIC_SET_SPS_FLAG 0x00003005
  113. #define WAVE5_SHERR_SHORT_TERM_REF_PIC_SET 0x00003006
  114. #define WAVE5_SHERR_SHORT_TERM_REF_PIC_SET_IDX 0x00003007
  115. #define WAVE5_SHERR_NUM_LONG_TERM_SPS 0x00003008
  116. #define WAVE5_SHERR_NUM_LONG_TERM_PICS 0x00003009
  117. #define WAVE5_SHERR_LT_IDX_SPS_IS_OUT_OF_RANGE 0x0000300A
  118. #define WAVE5_SHERR_DELTA_POC_MSB_CYCLE_LT 0x0000300B
  119. #define WAVE5_SHERR_NUM_REF_IDX_L0_ACTIVE_MINUS1 0x0000300C
  120. #define WAVE5_SHERR_NUM_REF_IDX_L1_ACTIVE_MINUS1 0x0000300D
  121. #define WAVE5_SHERR_COLLOCATED_REF_IDX 0x0000300E
  122. #define WAVE5_SHERR_PRED_WEIGHT_TABLE 0x0000300F
  123. #define WAVE5_SHERR_FIVE_MINUS_MAX_NUM_MERGE_CAND 0x00003010
  124. #define WAVE5_SHERR_SLICE_QP_DELTA 0x00003011
  125. #define WAVE5_SHERR_SLICE_QP_DELTA_IS_OUT_OF_RANGE 0x00003012
  126. #define WAVE5_SHERR_SLICE_CB_QP_OFFSET 0x00003013
  127. #define WAVE5_SHERR_SLICE_CR_QP_OFFSET 0x00003014
  128. #define WAVE5_SHERR_SLICE_BETA_OFFSET_DIV2 0x00003015
  129. #define WAVE5_SHERR_SLICE_TC_OFFSET_DIV2 0x00003016
  130. #define WAVE5_SHERR_NUM_ENTRY_POINT_OFFSETS 0x00003017
  131. #define WAVE5_SHERR_OFFSET_LEN_MINUS1 0x00003018
  132. #define WAVE5_SHERR_SLICE_SEGMENT_HEADER_EXTENSION_LENGTH 0x00003019
  133. #define WAVE5_SPECERR_OVER_PICTURE_WIDTH_SIZE 0x00004000
  134. #define WAVE5_SPECERR_OVER_PICTURE_HEIGHT_SIZE 0x00004001
  135. #define WAVE5_SPECERR_OVER_CHROMA_FORMAT 0x00004002
  136. #define WAVE5_SPECERR_OVER_BIT_DEPTH 0x00004003
  137. #define WAVE5_ETCERR_INIT_SEQ_SPS_NOT_FOUND 0x00005000
  138. #define WAVE5_ETCERR_DEC_PIC_VCL_NOT_FOUND 0x00005001
  139. #define WAVE5_ETCERR_NO_VALID_SLICE_IN_AU 0x00005002
  140. /************************************************************************/
  141. /* WAVE5 WARNING ON DECODER (WARN_INFO) */
  142. /************************************************************************/
  143. #define WAVE5_SPSWARN_MAX_SUB_LAYERS_MINUS1 0x00000001
  144. #define WAVE5_SPSWARN_GENERAL_RESERVED_ZERO_44BITS 0x00000002
  145. #define WAVE5_SPSWARN_RESERVED_ZERO_2BITS 0x00000004
  146. #define WAVE5_SPSWARN_SUB_LAYER_RESERVED_ZERO_44BITS 0x00000008
  147. #define WAVE5_SPSWARN_GENERAL_LEVEL_IDC 0x00000010
  148. #define WAVE5_SPSWARN_SPS_MAX_DEC_PIC_BUFFERING_VALUE_OVER 0x00000020
  149. #define WAVE5_SPSWARN_RBSP_TRAILING_BITS 0x00000040
  150. #define WAVE5_SPSWARN_ST_RPS_UE_ERROR 0x00000080
  151. #define WAVE5_PPSWARN_RBSP_TRAILING_BITS 0x00000100
  152. #define WAVE5_SHWARN_FIRST_SLICE_SEGMENT_IN_PIC_FLAG 0x00001000
  153. #define WAVE5_SHWARN_NO_OUTPUT_OF_PRIOR_PICS_FLAG 0x00002000
  154. #define WAVE5_SHWARN_PIC_OUTPUT_FLAG 0x00004000
  155. #define WAVE5_ETCWARN_INIT_SEQ_VCL_NOT_FOUND 0x00010000
  156. #define WAVE5_ETCWARN_MISSING_REFERENCE_PICTURE 0x00020000
  157. #define WAVE5_ETCWARN_WRONG_TEMPORAL_ID 0x00040000
  158. #define WAVE5_ETCWARN_ERROR_PICTURE_IS_REFERENCED 0x00080000
  159. #define WAVE5_SPECWARN_OVER_PROFILE 0x00100000
  160. #define WAVE5_SPECWARN_OVER_LEVEL 0x00200000
  161. /************************************************************************/
  162. /* WAVE5 debug info (PRI_REASON) */
  163. /************************************************************************/
  164. #define WAVE5_DEC_VCORE_VCE_HANGUP 0x0001
  165. #define WAVE5_DEC_VCORE_UNDETECTED_SYNTAX_ERR 0x0002
  166. #define WAVE5_DEC_VCORE_MIB_BUSY 0x0003
  167. #define WAVE5_DEC_VCORE_VLC_BUSY 0x0004
  168. #endif /* ERROR_CODE_H_INCLUDED */