x530.h 2.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2018 Allied Telesis Labs
  4. */
  5. #ifndef _CONFIG_X530_H
  6. #define _CONFIG_X530_H
  7. /*
  8. * High Level Configuration Options (easy to change)
  9. */
  10. #define CONFIG_DISPLAY_BOARDINFO_LATE
  11. #define CONFIG_SYS_TCLK 250000000 /* 250MHz */
  12. /*
  13. * NS16550 Configuration
  14. */
  15. #define CONFIG_SYS_NS16550_SERIAL
  16. #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
  17. #if !defined(CONFIG_DM_SERIAL)
  18. #define CONFIG_SYS_NS16550_REG_SIZE (-4)
  19. #define CONFIG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE
  20. #endif
  21. /*
  22. * Serial Port configuration
  23. * The following definitions let you select what serial you want to use
  24. * for your console driver.
  25. */
  26. /* NAND */
  27. #define CONFIG_SYS_NAND_ONFI_DETECTION
  28. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  29. #define BBT_CUSTOM_SCAN
  30. #define BBT_CUSTOM_SCAN_PAGE 0
  31. #define BBT_CUSTOM_SCAN_POSITION 2048
  32. /* SPI NOR flash default params, used by sf commands */
  33. #define MTDIDS_DEFAULT "nand0=nand"
  34. #define MTDPARTS_DEFAULT "mtdparts=nand:240M(user),8M(errlog),8M(nand-bbt)"
  35. #define MTDPARTS_MTDOOPS "errlog"
  36. /* Partition support */
  37. /* Additional FS support/configuration */
  38. /* USB/EHCI configuration */
  39. #define CONFIG_EHCI_IS_TDI
  40. /* Environment in SPI NOR flash */
  41. #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
  42. /* PCIe support */
  43. #ifndef CONFIG_SPL_BUILD
  44. #define CONFIG_PCI_SCAN_SHOW
  45. #endif
  46. /* NAND */
  47. #define CONFIG_SYS_NAND_ONFI_DETECTION
  48. #define CONFIG_SYS_MALLOC_LEN (4 << 20)
  49. #include <asm/arch/config.h>
  50. /*
  51. * Other required minimal configurations
  52. */
  53. #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
  54. /* Keep device tree and initrd in low memory so the kernel can access them */
  55. #define CONFIG_EXTRA_ENV_SETTINGS \
  56. "fdt_high=0x10000000\0" \
  57. "initrd_high=0x10000000\0"
  58. #define CONFIG_SYS_LOAD_ADDR 0x1000000
  59. #define CONFIG_UBI_PART user
  60. #define CONFIG_UBIFS_VOLUME user
  61. /* SPL */
  62. /* Defines for SPL */
  63. #define CONFIG_SPL_SIZE (140 << 10)
  64. #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030)
  65. #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
  66. #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
  67. #ifdef CONFIG_SPL_BUILD
  68. #define CONFIG_SYS_MALLOC_SIMPLE
  69. #endif
  70. #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
  71. #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
  72. /* SPL related SPI defines */
  73. #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
  74. #endif /* _CONFIG_X530_H */