0006-change-memcpy_vector-LMUL-to-m8.patch 906 B

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  1. From 8c1459b734f8cfe1562d72ad302d3dfa55fa85e7 Mon Sep 17 00:00:00 2001
  2. From: "max.ma" <max.ma@starfivetech.com>
  3. Date: Mon, 28 Feb 2022 18:49:58 -0800
  4. Subject: [PATCH 06/19] change memcpy_vector LMUL to m8
  5. ---
  6. sysdeps/riscv/rv64/multiarch/memcpy_vector.S | 4 ++--
  7. 1 file changed, 2 insertions(+), 2 deletions(-)
  8. diff --git a/sysdeps/riscv/rv64/multiarch/memcpy_vector.S b/sysdeps/riscv/rv64/multiarch/memcpy_vector.S
  9. index 2319647de8..bae330f6e0 100644
  10. --- a/sysdeps/riscv/rv64/multiarch/memcpy_vector.S
  11. +++ b/sysdeps/riscv/rv64/multiarch/memcpy_vector.S
  12. @@ -34,14 +34,14 @@ ENTRY (memcpy)
  13. li a6, 16
  14. beqz a5, .loop_cpy
  15. sub a5, a6, a5
  16. - vsetvli t0, a5, e8, m4
  17. + vsetvli t0, a5, e8, m8
  18. vle8.v v0, (a1)
  19. add a1, a1, t0
  20. sub a2, a2, t0
  21. vse8.v v0, (a3)
  22. add a3, a3, t0
  23. .loop_cpy:
  24. - vsetvli t0, a2, e8, m4
  25. + vsetvli t0, a2, e8, m8
  26. vle8.v v0, (a1)
  27. add a1, a1, t0
  28. sub a2, a2, t0
  29. --
  30. 2.25.1