0020-Cost-model-for-zbb-extension.patch 1.4 KB

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  1. From c1eaf07b4e8a7ea6c3f053003a8ebd9a1e933f22 Mon Sep 17 00:00:00 2001
  2. From: "yilun.xie" <yilun.xie@starfivetech.com>
  3. Date: Thu, 18 Nov 2021 15:37:45 +0800
  4. Subject: [PATCH 20/26] Cost model for zbb extension
  5. ---
  6. gcc/config/riscv/riscv.c | 18 ++++++++++++++++++
  7. 1 file changed, 18 insertions(+)
  8. diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c
  9. index 7d5e22d9fe2..bf91d8c7371 100644
  10. --- a/gcc/config/riscv/riscv.c
  11. +++ b/gcc/config/riscv/riscv.c
  12. @@ -1684,6 +1684,16 @@ riscv_extend_cost (rtx op, bool unsigned_p)
  13. if (TARGET_ZBA && TARGET_64BIT && unsigned_p && GET_MODE (op) == SImode)
  14. return COSTS_N_INSNS (1);
  15. + /* ZBB provide zext.h, sext.b and sext.h. */
  16. + if (TARGET_ZBB)
  17. + {
  18. + if (!unsigned_p && GET_MODE (op) == QImode)
  19. + return COSTS_N_INSNS (1);
  20. +
  21. + if (GET_MODE (op) == HImode)
  22. + return COSTS_N_INSNS (1);
  23. + }
  24. +
  25. if (!unsigned_p && GET_MODE (op) == SImode)
  26. /* We can use SEXT.W. */
  27. return COSTS_N_INSNS (1);
  28. @@ -1775,6 +1785,14 @@ riscv_rtx_costs (rtx x, machine_mode mode, int outer_code, int opno ATTRIBUTE_UN
  29. case IOR:
  30. case XOR:
  31. + /* orn, andn and xorn pattern for zbb. */
  32. + if (TARGET_ZBB
  33. + && GET_CODE (XEXP (x, 0)) == NOT)
  34. + {
  35. + *total = riscv_binary_cost (x, 1, 2);
  36. + return true;
  37. + }
  38. +
  39. /* Double-word operations use two single-word operations. */
  40. *total = riscv_binary_cost (x, 1, 2);
  41. return false;
  42. --
  43. 2.33.1